From nobody Mon Dec 1 22:35:43 2025 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6D0002620E4 for ; Wed, 26 Nov 2025 10:46:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764154011; cv=none; b=A+KCydikr/C1vmXnKy4X14jYptUsaCkLxBJuVgHooExrX+lSrd6gtumDFFl+SC576CeSxQMCLIrUxNkjv5gXzf2U2syb5wg6m6jwDAb4P98rLaIh/KcDsmxCBd/kdv/Oxq52G2YKAz2DtWrbV8CvKOZc1wK3nTRMSHEeyGQfiNU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764154011; c=relaxed/simple; bh=QMhG/0jhakuaZrCFcax2pEPoKx4GMav9oHIrsDzUx9c=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Y7H/V3mOqwX2f5w+exTgdySMo2OXMNVdAyFU848aD0s779v6ZaJmggNUVofGNWV1BcRMYTGComUxWaNNAupemoEfnhEsCLtBb4UOLYdrmRr+kbD/ZYzOEAQ1LCx7SNE5PWS1vF1hALX9yONuc1RS11TDExgMLrlerU4kOqUP/wY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=RcIp/aue; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="RcIp/aue" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id A15EB4E418DE; Wed, 26 Nov 2025 10:46:45 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 7749A60721; Wed, 26 Nov 2025 10:46:45 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 89593102F08C9; Wed, 26 Nov 2025 11:46:42 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1764154004; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=NvumRa6Nk5FY/qYCbY/ZM5BWU9fnNCjKXXsILsQItok=; b=RcIp/auev14qyTZ3560muoYZERZ8ow7wHWFG3L6cG8Cap3Um0FB0SJeaJWRP+ghGHepPlk zhCbrzR9+UMM3ryGAB20VdOvA0sK9mQ/1+0oZ6/0ylogEb2heNweiu4ci6ua3E1QjtVtYQ 3yTxD8Acwkr+i85ybzi+Et923qljUC60n1HU+dZO6IjdOWZQvL40Tpqd7Dl6UCl2xSkrt+ Tdl5oQxawenoWuWLcIUB7F6sUK1gcqAla2Cuw6mr1Hn0aZTcUJDbzhBjXn518WFRD355T7 GSVsvYVcuDVCKnEPVBEScxYKE1mqijI0F12HPlNevM+Aj+FMay/7Fdn2wAL6Sg== From: =?utf-8?q?Beno=C3=AEt_Monin?= Date: Wed, 26 Nov 2025 11:46:24 +0100 Subject: [PATCH v4 1/7] dt-bindings: i2c: dw: Add Mobileye I2C controllers Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251126-i2c-dw-v4-1-b0654598e7c5@bootlin.com> References: <20251126-i2c-dw-v4-0-b0654598e7c5@bootlin.com> In-Reply-To: <20251126-i2c-dw-v4-0-b0654598e7c5@bootlin.com> To: Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jarkko Nikula , Mika Westerberg , Andy Shevchenko , Jan Dabros , Sebastian Andrzej Siewior , Clark Williams , Steven Rostedt Cc: Thomas Petazzoni , Gregory CLEMENT , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Vladimir Kondratiev , Dmitry Guzman , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, =?utf-8?q?Beno=C3=AEt_Monin?= , Krzysztof Kozlowski X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Add compatible string for the DesignWare-based I2C controllers present in Mobileye Eyeq6Lplus SoC, with a fallback to the default compatible. The same controllers are also present in the EyeQ7H, so add a compatible for those with a fallback to the Eyeq6Lplus compatible. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Beno=C3=AEt Monin Acked-by: Mika Westerberg --- Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml= b/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml index d904191bb0c6..914200188809 100644 --- a/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml @@ -34,8 +34,15 @@ properties: - const: snps,designware-i2c - description: Baikal-T1 SoC System I2C controller const: baikal,bt1-sys-i2c + - description: Mobileye EyeQ DesignWare I2C controller + items: + - enum: + - mobileye,eyeq7h-i2c + - const: mobileye,eyeq6lplus-i2c + - const: snps,designware-i2c - items: - enum: + - mobileye,eyeq6lplus-i2c - mscc,ocelot-i2c - sophgo,sg2044-i2c - thead,th1520-i2c --=20 2.52.0 From nobody Mon Dec 1 22:35:43 2025 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 811432FB990 for ; Wed, 26 Nov 2025 10:46:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764154012; cv=none; b=mK3i1yL/anGReGnH2DzziHf0TKLS2BkNL3S8ptVYKwft3jt9I5QVcjlsvQljphCEtCL8IooGobgzcrETTkn61PyKeOhwqGKPyWijOE+p/n17mPjoAeAJbXr7x3g81+N0RS1vPMicKSwNvkTxxRf4TGmVpicxx2ORiOFeyqF2Gzk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764154012; c=relaxed/simple; bh=SHaKcdbxVrKoU8qMVpKry86uYp0Zz4Sh9gmZSF9TBD0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SOizAkbO5AH/2S2wt/YrkyT/TzudQnqxApyxH7AIk+12Auqupife3JCXjlG7I5LUa1aqhwMu1Vo8LTvnfH9TAgHDw3B6t5KWLodDumRV1XilMFSBhbU5fpsKrHYp7O2AZV/aUy7YjjXTVQUmWAQpvadpQmZ1XuyJngEH6aw1iEE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=07ckD+4n; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="07ckD+4n" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id CA8731A1D70; Wed, 26 Nov 2025 10:46:47 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id A03E760721; Wed, 26 Nov 2025 10:46:47 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 70B2C102F08D6; Wed, 26 Nov 2025 11:46:44 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1764154006; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=8xK61RZHCK25RRSsygPfCpMDLwLhjqbk8IWk2PRlvNk=; b=07ckD+4nujRzYAjSA/9XK5j92QymrWnxonHsPPskd9a/2qt5ZX3j5JkUG8nn2kfvCMKLCz F1YpN9FYghG1Oo32uupISMt8rQfgruKXKBrXHs3IbNAX+vpilE8OOJW2/uilmmFEAPNGZ0 8rRydHxJP9m0P26tqsC2m/+CsLp8TkmF9Av/AvxruGiPaxNtW4iM8/LPns833Fe28XFDy7 pw6QOStXRjZ6kOAYDQB5tLYBru8ghKsiv0/W0jNeFv5AwpHZ1+Jr1FFSfZBxXOwAHIxCGc 3ztji7tAmzlRqndHeM5HJg/vVlRXTx5c/LTvS9XatK6MKHRZzGJwHjiFih5doQ== From: =?utf-8?q?Beno=C3=AEt_Monin?= Date: Wed, 26 Nov 2025 11:46:25 +0100 Subject: [PATCH v4 2/7] i2c: designware: Optimize flag reading in i2c_dw_read() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251126-i2c-dw-v4-2-b0654598e7c5@bootlin.com> References: <20251126-i2c-dw-v4-0-b0654598e7c5@bootlin.com> In-Reply-To: <20251126-i2c-dw-v4-0-b0654598e7c5@bootlin.com> To: Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jarkko Nikula , Mika Westerberg , Andy Shevchenko , Jan Dabros , Sebastian Andrzej Siewior , Clark Williams , Steven Rostedt Cc: Thomas Petazzoni , Gregory CLEMENT , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Vladimir Kondratiev , Dmitry Guzman , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, =?utf-8?q?Beno=C3=AEt_Monin?= X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Optimize the i2c_dw_read() function by reading the message flags only once per message, rather than for every byte. The message flags are accessed both in the outer loop and the inner loop, so move the declaration of the local flags variable to the outer loop. The message index is only modified by the outer loop, so reading the flags in the inner loop was always getting the same value. Reviewed-by: Andy Shevchenko Signed-off-by: Beno=C3=AEt Monin Acked-by: Mika Westerberg --- drivers/i2c/busses/i2c-designware-master.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busse= s/i2c-designware-master.c index 41e9b5ecad20..ec4fc2708d03 100644 --- a/drivers/i2c/busses/i2c-designware-master.c +++ b/drivers/i2c/busses/i2c-designware-master.c @@ -586,11 +586,12 @@ i2c_dw_read(struct dw_i2c_dev *dev) unsigned int rx_valid; =20 for (; dev->msg_read_idx < dev->msgs_num; dev->msg_read_idx++) { + u32 flags =3D msgs[dev->msg_read_idx].flags; unsigned int tmp; u32 len; u8 *buf; =20 - if (!(msgs[dev->msg_read_idx].flags & I2C_M_RD)) + if (!(flags & I2C_M_RD)) continue; =20 if (!(dev->status & STATUS_READ_IN_PROGRESS)) { @@ -604,8 +605,6 @@ i2c_dw_read(struct dw_i2c_dev *dev) regmap_read(dev->map, DW_IC_RXFLR, &rx_valid); =20 for (; len > 0 && rx_valid > 0; len--, rx_valid--) { - u32 flags =3D msgs[dev->msg_read_idx].flags; - regmap_read(dev->map, DW_IC_DATA_CMD, &tmp); tmp &=3D DW_IC_DATA_CMD_DAT; /* Ensure length byte is a valid value */ --=20 2.52.0 From nobody Mon Dec 1 22:35:43 2025 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 64E65230D14; Wed, 26 Nov 2025 10:46:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764154013; cv=none; b=g8Be8h2/613IPc1neWRJ4yBIewbcvWHKAq5oMpY2zJMEWwxA1bIHJOmQn1tWi7LvS15CohPD+m2NbJ1nt5g0L85oT4t3IVi7Kmqy77pwMloRwjWZIbbQ/U4YmPl2+0e6w2hzvZPP0yEQ14mIou/lJ5N3gJO01xfLU5jgRLGUYeg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764154013; c=relaxed/simple; bh=60y3wscYu+FR1/Eo9esnvUOIDONBxy4TZK9bJ7oCWd8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251126-i2c-dw-v4-3-b0654598e7c5@bootlin.com> References: <20251126-i2c-dw-v4-0-b0654598e7c5@bootlin.com> In-Reply-To: <20251126-i2c-dw-v4-0-b0654598e7c5@bootlin.com> To: Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jarkko Nikula , Mika Westerberg , Andy Shevchenko , Jan Dabros , Sebastian Andrzej Siewior , Clark Williams , Steven Rostedt Cc: Thomas Petazzoni , Gregory CLEMENT , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Vladimir Kondratiev , Dmitry Guzman , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, =?utf-8?q?Beno=C3=AEt_Monin?= X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Reorder the of_device_id structures so that they are in alphabetical order. Also drop the unneeded inner trailing comma in the "snps,designware-i2c" struct. Reviewed-by: Andy Shevchenko Signed-off-by: Beno=C3=AEt Monin Acked-by: Mika Westerberg --- drivers/i2c/busses/i2c-designware-platdrv.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/buss= es/i2c-designware-platdrv.c index 34d881572351..d7d764f7554d 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -345,9 +345,9 @@ static void dw_i2c_plat_remove(struct platform_device *= pdev) } =20 static const struct of_device_id dw_i2c_of_match[] =3D { - { .compatible =3D "snps,designware-i2c", }, - { .compatible =3D "mscc,ocelot-i2c", .data =3D (void *)MODEL_MSCC_OCELOT = }, { .compatible =3D "baikal,bt1-sys-i2c", .data =3D (void *)MODEL_BAIKAL_BT= 1 }, + { .compatible =3D "mscc,ocelot-i2c", .data =3D (void *)MODEL_MSCC_OCELOT = }, + { .compatible =3D "snps,designware-i2c" }, {} }; MODULE_DEVICE_TABLE(of, dw_i2c_of_match); --=20 2.52.0 From nobody Mon Dec 1 22:35:43 2025 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CD0DB31ED95; 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arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="FruETx42" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 6631D4E418E6; Wed, 26 Nov 2025 10:46:52 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 3BBE560721; Wed, 26 Nov 2025 10:46:52 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id B1850102F08C9; Wed, 26 Nov 2025 11:46:48 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1764154011; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=OzKkisXvKa5epQi/flHcP9O680bWIEN4eKFcAiNCdnY=; b=FruETx429Dm1XWoZUET/07FOXP5A5GSr4il2sEDlyaL3jjcHVkEkM7YV8JQ4otYKXQqxIO k/P0Zv7IgYNht2NOzIYAJ0+EjqcabgaIBLdNekgFOLxjfU+vk3A4qz+dAziMpaM0lAQOcT h/V8M2YvA5w9dfB1E4bIch7VxDGORlXfyMbFVbpZKyDZN8I2G1X41bupnCZtUrXF89oPEm 4efxMg+ZS0/DkVnQYa0wN4eS8Wptum9wPx8yY7Y7yb60oxI4lkZgp1iZZ1GUbj7Cn0y+dd KyjaIijxSqhIBE5wmbE/YbTpUNaY9mNk2QPHaFfuODpBp2lE9pXuh9aheiEoUg== From: =?utf-8?q?Beno=C3=AEt_Monin?= Date: Wed, 26 Nov 2025 11:46:27 +0100 Subject: [PATCH v4 4/7] i2c: designware: Add dedicated algorithm for AMD NAVI Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251126-i2c-dw-v4-4-b0654598e7c5@bootlin.com> References: <20251126-i2c-dw-v4-0-b0654598e7c5@bootlin.com> In-Reply-To: <20251126-i2c-dw-v4-0-b0654598e7c5@bootlin.com> To: Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jarkko Nikula , Mika Westerberg , Andy Shevchenko , Jan Dabros , Sebastian Andrzej Siewior , Clark Williams , Steven Rostedt Cc: Thomas Petazzoni , Gregory CLEMENT , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Vladimir Kondratiev , Dmitry Guzman , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, =?utf-8?q?Beno=C3=AEt_Monin?= X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Apart from runtime PM, there is nothing in common between i2c_dw_xfer() and amd_i2c_dw_xfer_quirk(), so give AMD NAVI controller its own algorithm instead of calling the quirk from i2c_dw_xfer(). Add runtime PM handling to amd_i2c_dw_xfer_quirk() and a dedicated i2c_algorithm for AMD NAVI controllers. The adapter algorithm is set during probe based on the device model. This way we avoid checking for the device model at the start of every transfer. Reviewed-by: Andy Shevchenko Signed-off-by: Beno=C3=AEt Monin Acked-by: Mika Westerberg --- drivers/i2c/busses/i2c-designware-master.c | 22 +++++++++++++--------- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busse= s/i2c-designware-master.c index ec4fc2708d03..c33198ab5018 100644 --- a/drivers/i2c/busses/i2c-designware-master.c +++ b/drivers/i2c/busses/i2c-designware-master.c @@ -354,6 +354,10 @@ static int amd_i2c_dw_xfer_quirk(struct i2c_adapter *a= dap, struct i2c_msg *msgs, u8 *tx_buf; unsigned int val; =20 + ACQUIRE(pm_runtime_active_auto_try, pm)(dev->dev); + if (ACQUIRE_ERR(pm_runtime_active_auto_try, &pm)) + return -ENXIO; + /* * In order to enable the interrupt for UCSI i.e. AMD NAVI GPU card, * it is mandatory to set the right value in specific register @@ -813,14 +817,6 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg m= sgs[], int num) =20 pm_runtime_get_sync(dev->dev); =20 - switch (dev->flags & MODEL_MASK) { - case MODEL_AMD_NAVI_GPU: - ret =3D amd_i2c_dw_xfer_quirk(adap, msgs, num); - goto done_nolock; - default: - break; - } - reinit_completion(&dev->cmd_complete); dev->msgs =3D msgs; dev->msgs_num =3D num; @@ -910,6 +906,11 @@ static const struct i2c_algorithm i2c_dw_algo =3D { .functionality =3D i2c_dw_func, }; =20 +static const struct i2c_algorithm amd_i2c_dw_algo =3D { + .xfer =3D amd_i2c_dw_xfer_quirk, + .functionality =3D i2c_dw_func, +}; + static const struct i2c_adapter_quirks i2c_dw_quirks =3D { .flags =3D I2C_AQ_NO_ZERO_LEN, }; @@ -1045,7 +1046,10 @@ int i2c_dw_probe_master(struct dw_i2c_dev *dev) scnprintf(adap->name, sizeof(adap->name), "Synopsys DesignWare I2C adapter"); adap->retries =3D 3; - adap->algo =3D &i2c_dw_algo; + if ((dev->flags & MODEL_MASK) =3D=3D MODEL_AMD_NAVI_GPU) + adap->algo =3D &amd_i2c_dw_algo; + else + adap->algo =3D &i2c_dw_algo; adap->quirks =3D &i2c_dw_quirks; adap->dev.parent =3D dev->dev; i2c_set_adapdata(adap, dev); --=20 2.52.0 From nobody Mon Dec 1 22:35:43 2025 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4FE3A2FB990 for ; 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arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="IbuBHPUD" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id BDCB24E418E7; Wed, 26 Nov 2025 10:46:54 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 91C0560721; Wed, 26 Nov 2025 10:46:54 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 51F2A102F08DB; Wed, 26 Nov 2025 11:46:51 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1764154013; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=5qqsKMoS1Gv3QCTB0XeC9vkdS6QI+B8KXlMKGLnPhtw=; b=IbuBHPUDEGctGOtQsaLG69XiPbt0Kn9fMrISI3oQPAygiXB3fKUq1P/Mr68iOOU3Tw99oM br4/0uVsj8+ZKbAldkt/22PEsoV+eG0Wn5Bn/xSze9XvzrOwtICEO+tmd8c+ISdDgwQxqt P29yNEHSfgpXNNQlPEQAH4IV0jawzmlfv13lpdXiU6yQFyGFezF8tqEx0FdoEeYfopbvSs Ce7H0/oG//A4cmlu21lzWamZrLVl69AzRyNIYwODRvGNhPK0jMzFQhR6UJ4CAuNiXADsEM w69YUKAnXTAsUMoXa/z6+Wo1IWq3VKpPdpyJ9PcsOnWpzJdB5MVngv1x2hQalQ== From: =?utf-8?q?Beno=C3=AEt_Monin?= Date: Wed, 26 Nov 2025 11:46:28 +0100 Subject: [PATCH v4 5/7] i2c: designware: Implement I2C_M_STOP support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251126-i2c-dw-v4-5-b0654598e7c5@bootlin.com> References: <20251126-i2c-dw-v4-0-b0654598e7c5@bootlin.com> In-Reply-To: <20251126-i2c-dw-v4-0-b0654598e7c5@bootlin.com> To: Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jarkko Nikula , Mika Westerberg , Andy Shevchenko , Jan Dabros , Sebastian Andrzej Siewior , Clark Williams , Steven Rostedt Cc: Thomas Petazzoni , Gregory CLEMENT , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Vladimir Kondratiev , Dmitry Guzman , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, =?utf-8?q?Beno=C3=AEt_Monin?= X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Add the support of the I2C_M_STOP flag in i2c_msg by splitting i2c_dw_xfer() in two: __i2c_dw_xfer_one_part() for the core transfer logic and i2c_dw_xfer() for handling the high-level transaction management. In detail __i2c_dw_xfer_one_part() starts a transaction and wait for its completion, either with a STOP on the bus or an error. i2c_dw_xfer() loops over the messages to search for the I2C_M_STOP flag and calls __i2c_dw_xfer_one_part() for each part of the messages up to a STOP or the end of the messages array. i2c_dw_xfer() takes care of runtime PM and holds the hardware lock on the bus while calling __i2c_dw_xfer_one_part(), this allows grouping multiple accesses to device that support a STOP in a transaction when done via i2c_dev I2C_RDWR ioctl. Also, now that we have a lookup of the messages in i2c_dw_xfer() prior to each transaction, we use it to make sure the messages are valid for the transaction, via a new function i2c_dw_msg_is_valid(). We check that the target address does not change before starting the transaction instead of aborting the transfer while it is happening, as it was done in i2c_dw_xfer_msg(). The target address can only be changed after an I2C_M_STOP flag, i.e after a STOP on the i2c bus. The I2C_FUNC_PROTOCOL_MANGLING flag is added to the list of functionalities supported by the controller, except for the AMD NAVI i2c controller which uses its own xfer() function and is left untouched. Signed-off-by: Beno=C3=AEt Monin Acked-by: Mika Westerberg --- drivers/i2c/busses/i2c-designware-master.c | 130 ++++++++++++++++++++-----= ---- 1 file changed, 90 insertions(+), 40 deletions(-) diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busse= s/i2c-designware-master.c index c33198ab5018..f3c87f447dd5 100644 --- a/drivers/i2c/busses/i2c-designware-master.c +++ b/drivers/i2c/busses/i2c-designware-master.c @@ -435,7 +435,6 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev) struct i2c_msg *msgs =3D dev->msgs; u32 intr_mask; int tx_limit, rx_limit; - u32 addr =3D msgs[dev->msg_write_idx].addr; u32 buf_len =3D dev->tx_buf_len; u8 *buf =3D dev->tx_buf; bool need_restart =3D false; @@ -446,18 +445,6 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev) for (; dev->msg_write_idx < dev->msgs_num; dev->msg_write_idx++) { u32 flags =3D msgs[dev->msg_write_idx].flags; =20 - /* - * If target address has changed, we need to - * reprogram the target address in the I2C - * adapter when we are done with this transfer. - */ - if (msgs[dev->msg_write_idx].addr !=3D addr) { - dev_err(dev->dev, - "%s: invalid target address\n", __func__); - dev->msg_err =3D -EINVAL; - break; - } - if (!(dev->status & STATUS_WRITE_IN_PROGRESS)) { /* new i2c_msg */ buf =3D msgs[dev->msg_write_idx].buf; @@ -805,18 +792,15 @@ static int i2c_dw_wait_transfer(struct dw_i2c_dev *de= v) } =20 /* - * Prepare controller for a transaction and call i2c_dw_xfer_msg. + * Prepare controller for a transaction, start the transfer of the msgs + * and wait for completion, either a STOP or a error. + * Return the number of messages transferred or a negative error code. */ static int -i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) +__i2c_dw_xfer_one_part(struct dw_i2c_dev *dev, struct i2c_msg *msgs, size_= t num) { - struct dw_i2c_dev *dev =3D i2c_get_adapdata(adap); int ret; =20 - dev_dbg(dev->dev, "%s: msgs: %d\n", __func__, num); - - pm_runtime_get_sync(dev->dev); - reinit_completion(&dev->cmd_complete); dev->msgs =3D msgs; dev->msgs_num =3D num; @@ -828,13 +812,9 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg m= sgs[], int num) dev->abort_source =3D 0; dev->rx_outstanding =3D 0; =20 - ret =3D i2c_dw_acquire_lock(dev); - if (ret) - goto done_nolock; - ret =3D i2c_dw_wait_bus_not_busy(dev); if (ret < 0) - goto done; + return ret; =20 /* Start the transfers */ i2c_dw_xfer_init(dev); @@ -846,7 +826,7 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg ms= gs[], int num) /* i2c_dw_init_master() implicitly disables the adapter */ i2c_recover_bus(&dev->adapter); i2c_dw_init_master(dev); - goto done; + return ret; } =20 /* @@ -869,28 +849,93 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg = msgs[], int num) */ __i2c_dw_disable_nowait(dev); =20 - if (dev->msg_err) { - ret =3D dev->msg_err; - goto done; - } + if (dev->msg_err) + return dev->msg_err; =20 /* No error */ - if (likely(!dev->cmd_err && !dev->status)) { - ret =3D num; - goto done; - } + if (likely(!dev->cmd_err && !dev->status)) + return num; =20 /* We have an error */ - if (dev->cmd_err =3D=3D DW_IC_ERR_TX_ABRT) { - ret =3D i2c_dw_handle_tx_abort(dev); - goto done; - } + if (dev->cmd_err =3D=3D DW_IC_ERR_TX_ABRT) + return i2c_dw_handle_tx_abort(dev); =20 if (dev->status) dev_err(dev->dev, "transfer terminated early - interrupt latency too high?\n"); =20 - ret =3D -EIO; + return -EIO; +} + +/* + * Verify that the message at index @idx can be processed as part + * of a single transaction. The @msgs array contains the messages + * of the transaction. The message is checked against its predecessor + * to ensure that it respects the limitation of the controller. + */ +static inline bool +i2c_dw_msg_is_valid(struct dw_i2c_dev *dev, const struct i2c_msg *msgs, si= ze_t idx) +{ + /* + * The first message of a transaction is valid, + * no constraint from a previous message. + */ + if (!idx) + return true; + + /* + * We cannot change the target address during a transaction, so make + * sure the address is identical to the one of the previous message. + */ + if (msgs[idx - 1].addr !=3D msgs[idx].addr) { + dev_err(dev->dev, "invalid target address\n"); + return false; + } + + return true; +} + +static int +i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) +{ + struct dw_i2c_dev *dev =3D i2c_get_adapdata(adap); + struct i2c_msg *msgs_part; + size_t cnt; + int ret; + + dev_dbg(dev->dev, "msgs: %d\n", num); + + pm_runtime_get_sync(dev->dev); + + ret =3D i2c_dw_acquire_lock(dev); + if (ret) + goto done_nolock; + + /* + * If the I2C_M_STOP is present in some the messages, + * we do one transaction for each part up to the STOP. + */ + for (msgs_part =3D msgs; msgs_part < msgs + num; msgs_part +=3D cnt) { + /* + * Count the messages in a transaction, up to a STOP + * or the end of the msgs. + */ + for (cnt =3D 1; ; cnt++) { + if (!i2c_dw_msg_is_valid(dev, msgs_part, cnt - 1)) { + ret =3D -EINVAL; + goto done; + } + + if ((msgs_part[cnt - 1].flags & I2C_M_STOP) || + (msgs_part + cnt =3D=3D msgs + num)) + break; + } + + /* transfer one part up to a STOP */ + ret =3D __i2c_dw_xfer_one_part(dev, msgs_part, cnt); + if (ret < 0) + break; + } =20 done: i2c_dw_release_lock(dev); @@ -898,7 +943,9 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg ms= gs[], int num) done_nolock: pm_runtime_put_autosuspend(dev->dev); =20 - return ret; + if (ret < 0) + return ret; + return num; } =20 static const struct i2c_algorithm i2c_dw_algo =3D { @@ -921,6 +968,9 @@ void i2c_dw_configure_master(struct dw_i2c_dev *dev) =20 dev->functionality =3D I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY; =20 + if ((dev->flags & MODEL_MASK) !=3D MODEL_AMD_NAVI_GPU) + dev->functionality |=3D I2C_FUNC_PROTOCOL_MANGLING; + dev->master_cfg =3D DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE | DW_IC_CON_RESTART_EN; =20 --=20 2.52.0 From nobody Mon Dec 1 22:35:43 2025 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 577B5322A25; Wed, 26 Nov 2025 10:46:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764154020; cv=none; b=tyVVPxjsZJ3biHvsaZbidltXGXReYKzs89cCFcdKdrd2HpRq+qxFpS+k1sMBGoMAYJFe/+LevxxP6knGqvBJLejagKLmx0ktQL5DqHH6KyXjiW62IW70S30iMIaqpvAFcjx3T6cWerDtaC3Ul4NIT4IFu2dPhWwiUTVu9DlAIWA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764154020; c=relaxed/simple; bh=wnj9fWPMt20YBlywpsShCammpl06YijBh7wCQtHItaI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251126-i2c-dw-v4-6-b0654598e7c5@bootlin.com> References: <20251126-i2c-dw-v4-0-b0654598e7c5@bootlin.com> In-Reply-To: <20251126-i2c-dw-v4-0-b0654598e7c5@bootlin.com> To: Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jarkko Nikula , Mika Westerberg , Andy Shevchenko , Jan Dabros , Sebastian Andrzej Siewior , Clark Williams , Steven Rostedt Cc: Thomas Petazzoni , Gregory CLEMENT , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Vladimir Kondratiev , Dmitry Guzman , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, =?utf-8?q?Beno=C3=AEt_Monin?= X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Simplify runtime PM handling in i2c_dw_xfer() by using the pm_runtime_active_auto_try guard. This adds the proper handling for runtime PM resume errors and allows us to get rid of the done and done_nolock labels. Signed-off-by: Beno=C3=AEt Monin Acked-by: Mika Westerberg --- drivers/i2c/busses/i2c-designware-master.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busse= s/i2c-designware-master.c index f3c87f447dd5..907597c7a05c 100644 --- a/drivers/i2c/busses/i2c-designware-master.c +++ b/drivers/i2c/busses/i2c-designware-master.c @@ -905,11 +905,13 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg = *msgs, int num) =20 dev_dbg(dev->dev, "msgs: %d\n", num); =20 - pm_runtime_get_sync(dev->dev); + ACQUIRE(pm_runtime_active_auto_try, pm)(dev->dev); + if (ACQUIRE_ERR(pm_runtime_active_auto_try, &pm)) + return -ENXIO; =20 ret =3D i2c_dw_acquire_lock(dev); if (ret) - goto done_nolock; + return ret; =20 /* * If the I2C_M_STOP is present in some the messages, @@ -923,13 +925,15 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg = *msgs, int num) for (cnt =3D 1; ; cnt++) { if (!i2c_dw_msg_is_valid(dev, msgs_part, cnt - 1)) { ret =3D -EINVAL; - goto done; + break; } =20 if ((msgs_part[cnt - 1].flags & I2C_M_STOP) || (msgs_part + cnt =3D=3D msgs + num)) break; } + if (ret < 0) + break; =20 /* transfer one part up to a STOP */ ret =3D __i2c_dw_xfer_one_part(dev, msgs_part, cnt); @@ -937,12 +941,8 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg *= msgs, int num) break; } =20 -done: i2c_dw_release_lock(dev); =20 -done_nolock: - pm_runtime_put_autosuspend(dev->dev); - if (ret < 0) return ret; return num; --=20 2.52.0 From nobody Mon Dec 1 22:35:43 2025 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8D2AB31D371 for ; Wed, 26 Nov 2025 10:47:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764154022; cv=none; b=N/HCad+rNj2sCJS54u9aIe5c0UYwY7Kvbd1vl+ZhL9rWwTdsL7Flg2GcpHmybTKiol/YgB+bSZtxrcpgeHKruewmUCewl8C0ohNuhWcwpUERrySmXYja49l3IsGNtyZ0S24GxxpxiNTFS7YJcK18Y+qTkfEzRu97nrYFr2J7T+U= ARC-Message-Signature: i=1; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251126-i2c-dw-v4-7-b0654598e7c5@bootlin.com> References: <20251126-i2c-dw-v4-0-b0654598e7c5@bootlin.com> In-Reply-To: <20251126-i2c-dw-v4-0-b0654598e7c5@bootlin.com> To: Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jarkko Nikula , Mika Westerberg , Andy Shevchenko , Jan Dabros , Sebastian Andrzej Siewior , Clark Williams , Steven Rostedt Cc: Thomas Petazzoni , Gregory CLEMENT , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Vladimir Kondratiev , Dmitry Guzman , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, =?utf-8?q?Beno=C3=AEt_Monin?= X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 If IC_EMPTYFIFO_HOLD_MASTER_EN parameter is 0, "Stop" and "Repeated Start" bits in command register does not exist, thus it is impossible to send several consecutive write messages in a single hardware batch. The existing implementation worked with such configuration incorrectly: all consecutive write messages are joined into a single message without any Start/Stop or Repeated Start conditions. For example, the following command: i2ctransfer -y 0 w1@0x55 0x00 w1@0x55 0x01 does the same as i2ctransfer -y 0 w2@0x55 0x00 0x01 In i2c_dw_msg_is_valid(), we ensure that we do not have such sequence of messages requiring a RESTART, aborting the transfer on controller that cannot emit them explicitly. This behavior is activated by compatible entries because the state of the IC_EMPTYFIFO_HOLD_MASTER_EN parameter cannot be detected at runtime. The new flag emptyfifo_hold_master reflects the state of the parameter, it is set to true for all controllers except those found in Mobileye SoCs. For now, the controllers in Mobileye SoCs are the only ones known to need the workaround. The behavior of the driver is left unmodified for other controllers. There is another possible problem with this controller configuration: When the CPU is putting commands to the FIFO, this process must not be interrupted because if FIFO buffer gets empty, the controller finishes the I2C transaction and generates STOP condition on the bus. If we continue writing the remainder of the message to the FIFO, the controller will start emitting a new transaction with those data. This turns a single a single message into multiple I2C transactions. To protect against FIFO underrun, two changes are done: First we flag the interrupt with IRQF_NO_THREAD, to prevent it from running in a thread on PREEMPT-RT kernel. This ensures that we are not interrupted when filling the FIFO as it is very time-senstive. For example, being preempted after writing a single byte in the FIFO with a 1MHz bus gives us only 18=C2=B5s before an underrun. Second in i2c_dw_process_transfer(), we abort if a STOP is detected while a read or a write is in progress. This can occur when processing a message larger than the FIFO. In that case the message is processed in parts, and rely on the TX EMPTY interrupt to refill the FIFO when it gets below a threshold. If servicing this interrupt is delayed for too long, it can trigger a FIFO underrun, thus an unwanted STOP. Originally-by: Dmitry Guzman Signed-off-by: Beno=C3=AEt Monin Acked-by: Mika Westerberg --- drivers/i2c/busses/i2c-designware-common.c | 6 ++++++ drivers/i2c/busses/i2c-designware-core.h | 3 +++ drivers/i2c/busses/i2c-designware-master.c | 32 +++++++++++++++++++++++++= ++++ drivers/i2c/busses/i2c-designware-platdrv.c | 1 + 4 files changed, 42 insertions(+) diff --git a/drivers/i2c/busses/i2c-designware-common.c b/drivers/i2c/busse= s/i2c-designware-common.c index 5b1e8f74c4ac..446d567eafeb 100644 --- a/drivers/i2c/busses/i2c-designware-common.c +++ b/drivers/i2c/busses/i2c-designware-common.c @@ -388,6 +388,12 @@ int i2c_dw_fw_parse_and_configure(struct dw_i2c_dev *d= ev) =20 dev->clk_freq_optimized =3D device_property_read_bool(device, "snps,clk-f= req-optimized"); =20 + /* Mobileye controllers do not hold the clock on empty FIFO */ + if (device_is_compatible(device, "mobileye,eyeq6lplus-i2c")) + dev->emptyfifo_hold_master =3D false; + else + dev->emptyfifo_hold_master =3D true; + i2c_dw_adjust_bus_speed(dev); =20 if (is_of_node(fwnode)) diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/= i2c-designware-core.h index 347843b4f5dd..620472b15730 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -246,6 +246,8 @@ struct reset_control; * @clk_freq_optimized: if this value is true, it means the hardware reduc= es * its internal clock frequency by reducing the internal latency required * to generate the high period and low period of SCL line. + * @emptyfifo_hold_master: true if the controller acting as master holds + * the clock when the Tx FIFO is empty instead of emitting a stop. * * HCNT and LCNT parameters can be used if the platform knows more accurate * values than the one computed based only on the input clock frequency. @@ -305,6 +307,7 @@ struct dw_i2c_dev { struct i2c_bus_recovery_info rinfo; u32 bus_capacitance_pF; bool clk_freq_optimized; + bool emptyfifo_hold_master; }; =20 #define ACCESS_INTR_MASK BIT(0) diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busse= s/i2c-designware-master.c index 907597c7a05c..cef2231a2571 100644 --- a/drivers/i2c/busses/i2c-designware-master.c +++ b/drivers/i2c/busses/i2c-designware-master.c @@ -710,6 +710,14 @@ static void i2c_dw_process_transfer(struct dw_i2c_dev = *dev, unsigned int stat) if (stat & DW_IC_INTR_TX_EMPTY) i2c_dw_xfer_msg(dev); =20 + /* Abort if we detect a STOP in the middle of a read or a write */ + if ((stat & DW_IC_INTR_STOP_DET) && + (dev->status & (STATUS_READ_IN_PROGRESS | STATUS_WRITE_IN_PROGRESS)))= { + dev_err(dev->dev, "spurious STOP detected\n"); + dev->rx_outstanding =3D 0; + dev->msg_err =3D -EIO; + } + /* * No need to modify or disable the interrupt mask here. * i2c_dw_xfer_msg() will take care of it according to @@ -892,6 +900,16 @@ i2c_dw_msg_is_valid(struct dw_i2c_dev *dev, const stru= ct i2c_msg *msgs, size_t i return false; } =20 + /* + * Make sure we don't need explicit RESTART between two messages + * in the same direction for controllers that cannot emit them. + */ + if (!dev->emptyfifo_hold_master && + (msgs[idx - 1].flags & I2C_M_RD) =3D=3D (msgs[idx].flags & I2C_M_RD))= { + dev_err(dev->dev, "cannot emit RESTART\n"); + return false; + } + return true; } =20 @@ -1110,6 +1128,20 @@ int i2c_dw_probe_master(struct dw_i2c_dev *dev) irq_flags =3D IRQF_SHARED | IRQF_COND_SUSPEND; } =20 + /* + * The first writing to TX FIFO buffer causes transmission start. + * If IC_EMPTYFIFO_HOLD_MASTER_EN is not set, when TX FIFO gets + * empty, I2C controller finishes the transaction. If writing to + * FIFO is interrupted, FIFO can get empty and the transaction will + * be finished prematurely. FIFO buffer is filled in IRQ handler, + * but in PREEMPT_RT kernel IRQ handler by default is executed + * in thread that can be preempted with another higher priority + * thread or an interrupt. So, IRQF_NO_THREAD flag is required in + * order to prevent any preemption when filling the FIFO. + */ + if (!dev->emptyfifo_hold_master) + irq_flags |=3D IRQF_NO_THREAD; + ret =3D i2c_dw_acquire_lock(dev); if (ret) return ret; diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/buss= es/i2c-designware-platdrv.c index d7d764f7554d..f1714d287462 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -346,6 +346,7 @@ static void dw_i2c_plat_remove(struct platform_device *= pdev) =20 static const struct of_device_id dw_i2c_of_match[] =3D { { .compatible =3D "baikal,bt1-sys-i2c", .data =3D (void *)MODEL_BAIKAL_BT= 1 }, + { .compatible =3D "mobileye,eyeq6lplus-i2c" }, { .compatible =3D "mscc,ocelot-i2c", .data =3D (void *)MODEL_MSCC_OCELOT = }, { .compatible =3D "snps,designware-i2c" }, {} --=20 2.52.0