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Wed, 26 Nov 2025 11:09:18 -0600 (CST) Received: from LNDCL34533.neenah.na.plexus.com (unknown [10.255.48.203]) by intranet-smtp.plexus.com (Postfix) with ESMTP id C26643C87C; Wed, 26 Nov 2025 11:09:17 -0600 (CST) From: Danny Kaehn Date: Wed, 26 Nov 2025 11:05:24 -0600 Subject: [PATCH v12 1/3] dt-bindings: i2c: Add CP2112 HID USB to SMBus Bridge Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251126-cp2112-dt-v12-1-2cdba6481db3@plexus.com> References: <20251126-cp2112-dt-v12-0-2cdba6481db3@plexus.com> In-Reply-To: <20251126-cp2112-dt-v12-0-2cdba6481db3@plexus.com> To: Rob Herring , Krzysztof Kozlowski , Benjamin Tissoires , Andy Shevchenko , Danny Kaehn , Andi Shyti , Conor Dooley Cc: Jiri Kosina , devicetree@vger.kernel.org, linux-input@vger.kernel.org, Dmitry Torokhov , Bartosz Golaszewski , Ethan Twardy , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, Leo Huang , Arun D Patil , Willie Thai , Ting-Kai Chen X-Mailer: b4 0.14-dev-d4707 X-Developer-Signature: v=1; a=ed25519-sha256; t=1764176728; l=3253; i=danny.kaehn@plexus.com; s=20251118; h=from:subject:message-id; bh=HZ2zj59plR7MYLmDD2b/Zaq0ljbWALyTUquIne+xL34=; b=VD4OjURPCEgERc8EF6mzw97eyqSHUJubgm0tITKiI4zxnIh+sW0Uf3hpdjNnIwWIlUz8Elu4n FEUkOqb8rPrAOPSnu884oaaVfPbg6GWFPyU7NWTtI5sRFWqEemVJ7E5 X-Developer-Key: i=danny.kaehn@plexus.com; a=ed25519; pk=br2sOmMe9QhpVp1uJw6IxgSNRKZO5khHotS2b+/bX14= X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTI2MDE0MCBTYWx0ZWRfX03utHbD5tBuS Banwmn9XkEa1l0sszAchQDYAF1BrR7hmgzZeV2Pspl30zXmbdYqJ2Z8nCixe2+wemZNHn30k3C0 V3BaEQGSIzJVa6cfbrsihMLH167kal6RqD8CaZEQKwYiDIyMf5mkiEeJ6Nd8MZ2a7rhupkahGjz ri39PDwZ+2hr1LDLBk8/P3rv4GQc7FKfsKAeXLrWPHOa69Zv3Mr3kRlvU6+t4OR156UH5ZaJPJT zmNMEyOmRSNh2BPYi130qw1OAPIIWOIxrzkHP6frsvW5B3VJBj9JLYXOA+X1U3lveUGRY4yXdtb iAcHIr4mLA+1pA4g4z372Dc7//8RymjgI5NH7AK3A7AfiuaXIgluMwkdL47Ce8UsqtH9rbnYOx8 9qSyBsmmN32yDhYoblOPpU80yMisQA== X-Proofpoint-ORIG-GUID: hEQQiYXl4UGJ1d4CHNIvQqyKu6z2NDfl X-Authority-Analysis: v=2.4 cv=BouQAIX5 c=1 sm=1 tr=0 ts=6927343f cx=c_pps a=356DXeqjepxy6lyVU6o3hA==:117 a=356DXeqjepxy6lyVU6o3hA==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=VkNPw1HP01LnGYTKEx00:22 a=gEfo2CItAAAA:8 a=Y_joWELsAAAA:8 a=a1k9qEM8g4OboYts1TMA:9 a=QEXdDO2ut3YA:10 a=sptkURWiP4Gy88Gu7hUp:22 a=g_BQsM8wYJVSTWLOHH1t:22 X-Proofpoint-GUID: WJpUYwx2AWcUYNKq3XPwZAvWHEMJyc4J X-Proofpoint-Spam-Reason: orgsafe This is a USB HID device which includes an I2C controller and 8 GPIO pins. The binding allows describing the chip's gpio and i2c controller in DT, with the i2c controller being bound to a subnode named "i2c". This is intended to be used in configurations where the CP2112 is permanently connected in hardware. Signed-off-by: Danny Kaehn --- .../devicetree/bindings/i2c/silabs,cp2112.yaml | 107 +++++++++++++++++= ++++ 1 file changed, 107 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/silabs,cp2112.yaml b/Doc= umentation/devicetree/bindings/i2c/silabs,cp2112.yaml new file mode 100644 index 000000000000..4b5c1af3673d --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/silabs,cp2112.yaml @@ -0,0 +1,107 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/silabs,cp2112.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: CP2112 HID USB to SMBus/I2C Bridge + +maintainers: + - Danny Kaehn + +description: + The CP2112 is a USB HID device which includes an integrated I2C controll= er + and 8 GPIO pins. Its GPIO pins can each be configured as inputs, open-dr= ain + outputs, or push-pull outputs. + +properties: + compatible: + const: usb10c4,ea90 + + reg: + maxItems: 1 + description: The USB port number + + interrupt-controller: true + "#interrupt-cells": + const: 2 + + gpio-controller: true + "#gpio-cells": + const: 2 + + gpio-line-names: + minItems: 1 + maxItems: 8 + + i2c: + description: The SMBus/I2C controller node for the CP2112 + $ref: /schemas/i2c/i2c-controller.yaml# + unevaluatedProperties: false + + properties: + sda-gpios: + maxItems: 1 + + scl-gpios: + maxItems: 1 + + clock-frequency: + minimum: 10000 + default: 100000 + maximum: 400000 + +patternProperties: + "-hog(-[0-9]+)?$": + type: object + + required: + - gpio-hog + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + #include + + usb { + #address-cells =3D <1>; + #size-cells =3D <0>; + + cp2112: device@1 { + compatible =3D "usb10c4,ea90"; + reg =3D <1>; + + gpio-controller; + interrupt-controller; + #interrupt-cells =3D <2>; + #gpio-cells =3D <2>; + gpio-line-names =3D "CP2112_SDA", "CP2112_SCL", "TEST2", + "TEST3","TEST4", "TEST5", "TEST6"; + + fan-rst-hog { + gpio-hog; + gpios =3D <7 GPIO_ACTIVE_HIGH>; + output-high; + line-name =3D "FAN_RST"; + }; + + i2c { + #address-cells =3D <1>; + #size-cells =3D <0>; + sda-gpios =3D <&cp2112 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios =3D <&cp2112 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + temp@48 { + compatible =3D "national,lm75"; + reg =3D <0x48>; + }; + }; + + }; + }; --=20 2.25.1