From nobody Tue Dec 2 00:04:39 2025 Received: from mail-ej1-f53.google.com (mail-ej1-f53.google.com [209.85.218.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DA9122D060E for ; Tue, 25 Nov 2025 20:23:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764102193; cv=none; b=OxlvMHFJgQbTpKdCuigbuSjgqt7qwrPrpP6c8xbXLxt42C4W/xiA4FMBaaVSIxAXF/YSHO4paCGbGpgXSKPAjy5xknmu8fIogOQbz5uVyN2L8u9OzCb76oKWKU7oxVVzN15iiRKHx9qGyZbKs3/VDwnPq40ExuE3yuNx9JgwnHk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764102193; c=relaxed/simple; bh=Xb/mqp4+YwITWlbn8v8dEwFHqYPu9zYkndT2tCfzi90=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=PrwSetSVfFEzh17hLWIP6fFwZVGCioFFDHLWw8kli41RRphJFgGIir7Uq14SR7xlq95mQADKjPO2Rs0ymc/PurvXg8LcSoDX2kcCRplHbrfNuJYo326bJQsgCwPAa9O82z7HLzsb/G08bY22cNrxC0DXKPvJMno9D4hL7N6wsaQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=MgiM+INT; arc=none smtp.client-ip=209.85.218.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="MgiM+INT" Received: by mail-ej1-f53.google.com with SMTP id a640c23a62f3a-b735e278fa1so592722766b.0 for ; Tue, 25 Nov 2025 12:23:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1764102190; x=1764706990; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8Ib0drqFrjnDrbAYTSSfxv4es9CvzBMVOslQd6EXaRk=; b=MgiM+INTWMEjj5TL/Y6K42VIPQ35oJPQNO8uOTrmiWCitqdiSbhLZFdB7PBoU/qCd6 mEZq4flDo8PfbdvCNvKVehtSOnJVlrb+UrGmhHsuL8KBANNwabegvfc2BWWV+f5cz0Vh rzPkuJ7kdAwKH/+ouJzJTf82TieEDZqJmIJSDJwDGW8BA+s7wTsVUg47jhpmogsSFaUF MP+p/9hXOevJd11fLiWW7+IiWBPFLwSN0L2Hh4X1W/4ajx19wpBegOKdRR5FMtBiXeMp d3eX/EyooK8lVhOLdjo++k33CeCYdGoni152nb1FGX+XXbaZQvT+RtAFsHeA8IQWRxT8 +CzQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1764102190; x=1764706990; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=8Ib0drqFrjnDrbAYTSSfxv4es9CvzBMVOslQd6EXaRk=; b=CmmiwjPcg3l701fgb9ag7Et8jfwSQTj9RW3T/ajddfbj2jFWThfLDylCd1Jq31Hqvx 82+xL9AZCK2kl/KRQueQ2ZicOc2VxrtN1GLT0q/YtQtIwB14MK0aDpkJgvt2xlUD3CMX svBmxeY88S4zNmOpC4G/8Pp82X1d3ljSl0YHOCAecAEdTxWS89IaT8ESFJb5B3uSxvpU JggRXBdG0sk2vTx9/FNWuVCE430YGAn8cZqwmx6cIDFlOeSKCZfl2YBdBd7+BrOErhu5 vj7XmeDL6FHQDWl+OmqAWW03rawjSKStrHI32Z6dv7CiAU/nNwtYqxYR09iDYrln8Es3 KQ5g== X-Forwarded-Encrypted: i=1; AJvYcCXsLzSdweKbn3+P54pxZrHY3y2xWKNDmI1nKuXMeJ/5LZfW1B0U18/f5oin1+OQmRaX/F4YMjHq4sLIaLs=@vger.kernel.org X-Gm-Message-State: AOJu0YzGpJC/mdnxXk2g3cainlubNDD0xabtwU+fDP7dElY61kJaKT7Y xnmUiaSFcsdrUCBejuBMfYQWKzgWUOii7hDEJRHPohXbPvsMOqALlupQ1ypTmbXcWG8= X-Gm-Gg: ASbGnctHCKz62EZ4akpUpya40Mui1h3y+aLzfeP/EKuhHlIj/0u3tOHnyNJmRg6zfM9 lrtXJboDtNE0RYV/NFjyxF2ivPOqFuu+3Cux4+raYldGCjyIvqXL9AgK/a59rdqpVfWqlMuUV54 QwkOWcvS8dXZcVoA0Jc5H4wOoIpAdjv3GTHVF0zy5qawMh3oSc0ZCdE0r59GAich0BSIMD3KKgA GN2jmYDFQlUpgTHIbYsUmlaf/ir/ZnYq9WVOqf2iSNETIOcich8NH0HkNaKxKMzfvpE+/5MUsW6 5aA82hCiJnqeGQf/NA7g+61GQgTMvaH2X5XWLOHTmOO7huzIkDoCtyOQz/oSM7/CqhL7sM6HRZU rmIyq8g+8LYqTCVuPL7hyMcCIxz+dx6uzxY98ZnoGf6r7lggWr2H/9TVRizt316CYUN4sc4oeEp ns7A== X-Google-Smtp-Source: AGHT+IGmtQaLA/Uc4OF4O4nDM/5+lEJ34paMjp1QNcJa/UK+uZ+msJKQDzBQKODh/ewuat38K/Z4PA== X-Received: by 2002:a17:907:744:b0:b73:b0eb:16f5 with SMTP id a640c23a62f3a-b76c55f4037mr512604466b.31.1764102190146; Tue, 25 Nov 2025 12:23:10 -0800 (PST) Received: from localhost ([151.35.128.119]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b765c1379ddsm1583680466b.0.2025.11.25.12.23.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Nov 2025 12:23:09 -0800 (PST) From: Francesco Lavra To: Lorenzo Bianconi , Jonathan Cameron , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Andy Shevchenko Subject: [PATCH v3 1/9] iio: imu: st_lsm6dsx: fix iio_chan_spec for sensors without event detection Date: Tue, 25 Nov 2025 21:22:59 +0100 Message-Id: <20251125202307.4033346-2-flavra@baylibre.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251125202307.4033346-1-flavra@baylibre.com> References: <20251125202307.4033346-1-flavra@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2615; i=flavra@baylibre.com; h=from:subject; bh=Xb/mqp4+YwITWlbn8v8dEwFHqYPu9zYkndT2tCfzi90=; b=owEB7QES/pANAwAKAe3xO3POlDZfAcsmYgBpJhACb7PSvMCE4FL2AoX2G7rJWV6MWZPzu6uCj zuR4kzIvpiJAbMEAAEKAB0WIQSGV4VPlTvcox7DFObt8TtzzpQ2XwUCaSYQAgAKCRDt8TtzzpQ2 X032C/4nr+nfvc3LvitKlpUfYNuGChz6j9VHNrts/2ML7zBvEZbr2bf+mgUJM3NRJu439PRLxm5 TR6jyO8W809+M8QORepMjECfKhVAprfkRUa+QZMkn6gvyyQ3f70Rn8tN5LXFpV3WdSyUcxU4U3I o4UOGkdA9nYRGB5x0f8iX5X9T4FHGf2UUv8XVX0v84kty3LtqPoQM78oOa0edMM8SuKXlCvQ9ao YTHri8qWoNV/ov2hlMJgrsxjDKTJ4cYg5r0/A8RfUqlzxoa+eQcl9X3QBlK+668855qRRDsAzRe dXQQ8znDKyjcdre090FAc5JyWl70bl9GfM57zYpsLIYyt+F+gsEsLqi3fcQlu2vfdJx+ZTFVg3T d6SqVFXiBEaGenHn2fSIJL5rIqXRu99+dQUWif+SJkveP3Ra9dCu/M7URSfghJ0LlXSQ0H6qSz7 QEB5QJvpvef5o6QBwHWcWUkm/vQaYHT8nAxsIJ7fJYfMWYKXexBY2yy2bviRt/1i78aq0= X-Developer-Key: i=flavra@baylibre.com; a=openpgp; fpr=8657854F953BDCA31EC314E6EDF13B73CE94365F Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The st_lsm6dsx_acc_channels array of struct iio_chan_spec has a non-NULL event_spec field, indicating support for IIO events. However, event detection is not supported for all sensors, and if userspace tries to configure accelerometer wakeup events on a sensor device that does not support them (e.g. LSM6DS0), st_lsm6dsx_write_event() dereferences a NULL pointer when trying to write to the wakeup register. Define an additional struct iio_chan_spec array whose members have a NULL event_spec field, and use this array instead of st_lsm6dsx_acc_channels for sensors without event detection capability. Fixes: b5969abfa8b8 ("iio: imu: st_lsm6dsx: add motion events") Signed-off-by: Francesco Lavra Reviewed-by: Andy Shevchenko Acked-by: Lorenzo Bianconi --- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu= /st_lsm6dsx/st_lsm6dsx_core.c index 216160549b5a..a09df9d772dd 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c @@ -103,6 +103,13 @@ static const struct iio_chan_spec st_lsm6dsx_acc_chann= els[] =3D { IIO_CHAN_SOFT_TIMESTAMP(3), }; =20 +static const struct iio_chan_spec st_lsm6ds0_acc_channels[] =3D { + ST_LSM6DSX_CHANNEL(IIO_ACCEL, 0x28, IIO_MOD_X, 0), + ST_LSM6DSX_CHANNEL(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1), + ST_LSM6DSX_CHANNEL(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2), + IIO_CHAN_SOFT_TIMESTAMP(3), +}; + static const struct iio_chan_spec st_lsm6dsx_gyro_channels[] =3D { ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x22, IIO_MOD_X, 0), ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x24, IIO_MOD_Y, 1), @@ -144,8 +151,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sens= or_settings[] =3D { }, .channels =3D { [ST_LSM6DSX_ID_ACC] =3D { - .chan =3D st_lsm6dsx_acc_channels, - .len =3D ARRAY_SIZE(st_lsm6dsx_acc_channels), + .chan =3D st_lsm6ds0_acc_channels, + .len =3D ARRAY_SIZE(st_lsm6ds0_acc_channels), }, [ST_LSM6DSX_ID_GYRO] =3D { .chan =3D st_lsm6ds0_gyro_channels, @@ -1445,8 +1452,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_se= nsor_settings[] =3D { }, .channels =3D { [ST_LSM6DSX_ID_ACC] =3D { - .chan =3D st_lsm6dsx_acc_channels, - .len =3D ARRAY_SIZE(st_lsm6dsx_acc_channels), + .chan =3D st_lsm6ds0_acc_channels, + .len =3D ARRAY_SIZE(st_lsm6ds0_acc_channels), }, [ST_LSM6DSX_ID_GYRO] =3D { .chan =3D st_lsm6dsx_gyro_channels, --=20 2.39.5 From nobody Tue Dec 2 00:04:39 2025 Received: from mail-ed1-f44.google.com (mail-ed1-f44.google.com [209.85.208.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EACB731ED65 for ; Tue, 25 Nov 2025 20:23:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764102195; cv=none; b=Vv/Ku/Igi//9dW1CYMZ+ED6K8v/UXo+RTSz1TrXDvf6SyEe2TwDyMKpkt2uo9NYZprv3FIuzXF/iofg7UcmdeEbmiHzMfImm7telxv9+focK4wREoh+mF2myLOM6+t5lMsxVLRSLxgmvB1XQfNPyiy2drf861N1bocAYYglNNlw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764102195; c=relaxed/simple; bh=n+tWKmHDIKPoB17m8PDbku2hGkPzuoaQtqpngbiJb08=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=B7t25+UgeT6vqoSDdVw6526dLSMraQr8Jc4+wrxPSOXPiSA+jtZSDPVIXKZAKrAqzUgpXzDIORuG6xGdfvk5z44qZQ50lkZExSuceTMLzGHPZ0lkES2oyvnEMb2zwVMppEac5irPsTQoYMTuEbXpKPlfCj/kkqQBS5NmmRgJCzw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=HuztxCei; arc=none smtp.client-ip=209.85.208.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="HuztxCei" Received: by mail-ed1-f44.google.com with SMTP id 4fb4d7f45d1cf-6419aaced59so8254948a12.0 for ; Tue, 25 Nov 2025 12:23:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1764102191; x=1764706991; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BOpKIjBtp3jglLtC7+Xd90dUysNa5e26fWUT0wH80JA=; b=HuztxCeiVe92DKROSPOp2IvlK5b4QDJL/SzE9O1GIOTlIFFp6BZzxhkFElJAJKVDg3 qkWPSiuVSmPdSAbsvAZ60ydZp+9M1Pggq/fp+coTjG7t00MIPW0UxibtsLBKAKEpacnp gtmKGJA+uKDU1p9b+hl2gegti88datzNW8sDs8DA8Uia2Jd31UedKK+WuVKcNNms5zpe fKjUKCcZteYVtOIjO78bWSqSzFpcrlkaMZWzUhKExkNwW1OkpOb9EwBFnP9qK+NsVjzR pxMce8RPwTz2+1o/kGB4MJ/wiJz1MnW6/Sw2P3AFYDbTDcOQVpsXQQi+sEQp5rWyqiSi FaVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1764102191; x=1764706991; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=BOpKIjBtp3jglLtC7+Xd90dUysNa5e26fWUT0wH80JA=; b=sjTnpU2iD+gYoKn34ZgJRDaWqArqbzepNeDOlzLDCr6yX7VnFwCTbsNU37rTSsxz1s GwtgMUFfrpZKXMVTPNJ1rID/gEgmHlW4hyWHJXRIPTDWGBRTWl+XDtJJob392WuLQYPj JfHORMGfjTSIV6maI1IEEShJ8oErK+8NJwL4Ll/ELiORbU2rdPsshPrkdHPp1GonKRZY +jGmvt5McdUJHxMy4w+EpcZTeRDWkW9sFQeIVxQKAgsnGMQEZw7x7cwqZ5ce9yrczFm1 31+1H0S+EvchIDYSeLJlc8n4hYziLPdqwek3Ofzc+jl+AKgZIBe+uUTQ7QOySyBnDS2G db4A== X-Forwarded-Encrypted: i=1; AJvYcCUZYq3jo7bvD6mLCa1IPq+J3A4vSYsH7Yip6P4fRMiArmpNzIMtsS5ysdyNqZFnYsnT4YyeNA4/9MFT16M=@vger.kernel.org X-Gm-Message-State: AOJu0YwQ77S5bCZqCxEOs8k0Z+S6JOAoBaaM48Eeb+iuYzkun+LYJ0qD cCWUJ/xU/7tJWrwOtPPCnce8G1xauJ6a4HmB9jiomDpi/D4VQ6f0BEWW9+XNC/ipf71j4662IZL SezbA X-Gm-Gg: ASbGncsiIOS9WgB67BsDHq8pPEznIOXPuQq1tF96IFunILRhOiWWa+kWxuSEjYSqdUd FzUheWS5JSdRjoSEZ8/yLD7X0i3/iPSXojnhT/mtG6td1IJjwSsLsJpIb8qrcaKjB7HDcZC+BKo OQMk2iFSWb9g0RFqImqJs90zxbKmP9/t4Ji/3ucHwW4d+rb+hyuP85PxLFgv42JGpXYNgw/6PQP cYP4Xk3qx56POS1b/70b8LoOJuTfLKmHypMrupHY9tTVFeGof9ecg+XkpW7cpKQbxNGWh214zL6 MYnNu/3pyNm2e9ZdvB7UndO7dXL/k1GBX8eXT9NkGC+Wpm4zGDtTIdmHoCFHB6/wrRrZ/dnFlvx QYHxdSy7lXID79nCP5xl5oVkxHJC+wsXgAebRNZdoJxvSCAzCBTtOR7vtmsoo77CYteWv X-Google-Smtp-Source: AGHT+IFED+wA1aUsDmv+jMUwUksL6v6VocPD4iFOHhGx7FNewLdGFJ4OwYIvMKUrk83F0B/Ohwgvaw== X-Received: by 2002:a17:907:9610:b0:b73:4d06:bc8 with SMTP id a640c23a62f3a-b76718c224fmr1795378666b.53.1764102191277; Tue, 25 Nov 2025 12:23:11 -0800 (PST) Received: from localhost ([151.35.128.119]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b7654d7cbebsm1682751666b.29.2025.11.25.12.23.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Nov 2025 12:23:11 -0800 (PST) From: Francesco Lavra To: Lorenzo Bianconi , Jonathan Cameron , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Andy Shevchenko Subject: [PATCH v3 2/9] iio: imu: st_lsm6dsx: make event_settings more generic Date: Tue, 25 Nov 2025 21:23:00 +0100 Message-Id: <20251125202307.4033346-3-flavra@baylibre.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251125202307.4033346-1-flavra@baylibre.com> References: <20251125202307.4033346-1-flavra@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=8599; i=flavra@baylibre.com; h=from:subject; bh=n+tWKmHDIKPoB17m8PDbku2hGkPzuoaQtqpngbiJb08=; b=owEB7QES/pANAwAKAe3xO3POlDZfAcsmYgBpJhACqZsTWGnvQ5y4mMPFAjXdt7beAc/oZJiro kTDzMLWF1KJAbMEAAEKAB0WIQSGV4VPlTvcox7DFObt8TtzzpQ2XwUCaSYQAgAKCRDt8TtzzpQ2 X2bLC/9pm2QXnG8WLW278XKBGD245lf6bs11d/RI8bOF4kmYtxeth624IcXdXncZ/WG/LqTwf6/ MBgbxnImSh028iKu2K+cGCHnSj3RR2S6dBl2a7ctjFFLbECMsldd3fCc2J9k4sIwiqCbIrph4ZA /QXlRJ3l4orhqXyX9IfJuhprcVvnhO16Nn5vI+XnFoQJ6a1mrg0Gw28eJoivyzRwm1UTMTeZYgG XnUs/+C0VR2kyz6TOqcF+3QPNrm1TazgC47sT+SLh8nigFJpHbodc0aDJ4Z3t1egaj3H+Ecu3+7 T5aPTgPB0f97bgo/dcSvOFTYbJrMDlp3ZSzY66hrL5AynuhCKIU3+KcU7PvrFwOICmlE9Qf2JPR LEr0cmJ4vmvKK2SY34eJqLwl1DQld1wOUsKfjLrvnLhadJQaAo02yzEciKVBRVn9ze+mw+Etoya ionr8juGD1O+a2OolRs13yMRv+OuHrdpbOkergtjcaal3uUmrvNeskatjFDfMEYyF9ZBw= X-Developer-Key: i=flavra@baylibre.com; a=openpgp; fpr=8657854F953BDCA31EC314E6EDF13B73CE94365F Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The st_lsm6dsx_event_settings structure contains fields specific for one event type (wakeup). In preparation for adding support for more event types, introduce an event id enum and a generic event source structure, and replace wakeup-specific data in struct st_lsm6dsx_event_settings with an array of event source structures. Signed-off-by: Francesco Lavra Reviewed-by: Andy Shevchenko Acked-by: Lorenzo Bianconi --- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h | 20 ++- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c | 146 ++++++++++++------- 2 files changed, 106 insertions(+), 60 deletions(-) diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h b/drivers/iio/imu/st_l= sm6dsx/st_lsm6dsx.h index a4f558899767..80bc5686454b 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h @@ -242,14 +242,22 @@ struct st_lsm6dsx_shub_settings { u8 pause; }; =20 +enum st_lsm6dsx_event_id { + ST_LSM6DSX_EVENT_WAKEUP, + ST_LSM6DSX_EVENT_MAX +}; + +struct st_lsm6dsx_event_src { + struct st_lsm6dsx_reg value; + struct st_lsm6dsx_reg status; + u8 status_x_mask; + u8 status_y_mask; + u8 status_z_mask; +}; + struct st_lsm6dsx_event_settings { struct st_lsm6dsx_reg enable_reg; - struct st_lsm6dsx_reg wakeup_reg; - u8 wakeup_src_reg; - u8 wakeup_src_status_mask; - u8 wakeup_src_z_mask; - u8 wakeup_src_y_mask; - u8 wakeup_src_x_mask; + struct st_lsm6dsx_event_src sources[ST_LSM6DSX_EVENT_MAX]; }; =20 enum st_lsm6dsx_ext_sensor_id { diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu= /st_lsm6dsx/st_lsm6dsx_core.c index a09df9d772dd..e8f0a2ff91be 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c @@ -388,15 +388,21 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_se= nsor_settings[] =3D { }, }, .event_settings =3D { - .wakeup_reg =3D { - .addr =3D 0x5B, - .mask =3D GENMASK(5, 0), + .sources =3D { + [ST_LSM6DSX_EVENT_WAKEUP] =3D { + .value =3D { + .addr =3D 0x5b, + .mask =3D GENMASK(5, 0), + }, + .status =3D { + .addr =3D 0x1b, + .mask =3D BIT(3), + }, + .status_z_mask =3D BIT(0), + .status_y_mask =3D BIT(1), + .status_x_mask =3D BIT(2), + }, }, - .wakeup_src_reg =3D 0x1b, - .wakeup_src_status_mask =3D BIT(3), - .wakeup_src_z_mask =3D BIT(0), - .wakeup_src_y_mask =3D BIT(1), - .wakeup_src_x_mask =3D BIT(2), }, }, { @@ -554,15 +560,21 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_se= nsor_settings[] =3D { }, }, .event_settings =3D { - .wakeup_reg =3D { - .addr =3D 0x5B, - .mask =3D GENMASK(5, 0), + .sources =3D { + [ST_LSM6DSX_EVENT_WAKEUP] =3D { + .value =3D { + .addr =3D 0x5b, + .mask =3D GENMASK(5, 0), + }, + .status =3D { + .addr =3D 0x1b, + .mask =3D BIT(3), + }, + .status_z_mask =3D BIT(0), + .status_y_mask =3D BIT(1), + .status_x_mask =3D BIT(2), + }, }, - .wakeup_src_reg =3D 0x1b, - .wakeup_src_status_mask =3D BIT(3), - .wakeup_src_z_mask =3D BIT(0), - .wakeup_src_y_mask =3D BIT(1), - .wakeup_src_x_mask =3D BIT(2), }, }, { @@ -791,15 +803,21 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_se= nsor_settings[] =3D { .addr =3D 0x58, .mask =3D BIT(7), }, - .wakeup_reg =3D { - .addr =3D 0x5B, - .mask =3D GENMASK(5, 0), + .sources =3D { + [ST_LSM6DSX_EVENT_WAKEUP] =3D { + .value =3D { + .addr =3D 0x5b, + .mask =3D GENMASK(5, 0), + }, + .status =3D { + .addr =3D 0x1b, + .mask =3D BIT(3), + }, + .status_z_mask =3D BIT(0), + .status_y_mask =3D BIT(1), + .status_x_mask =3D BIT(2), + }, }, - .wakeup_src_reg =3D 0x1b, - .wakeup_src_status_mask =3D BIT(3), - .wakeup_src_z_mask =3D BIT(0), - .wakeup_src_y_mask =3D BIT(1), - .wakeup_src_x_mask =3D BIT(2), }, }, { @@ -1028,15 +1046,21 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_= sensor_settings[] =3D { .addr =3D 0x58, .mask =3D BIT(7), }, - .wakeup_reg =3D { - .addr =3D 0x5b, - .mask =3D GENMASK(5, 0), + .sources =3D { + [ST_LSM6DSX_EVENT_WAKEUP] =3D { + .value =3D { + .addr =3D 0x5b, + .mask =3D GENMASK(5, 0), + }, + .status =3D { + .addr =3D 0x1b, + .mask =3D BIT(3), + }, + .status_z_mask =3D BIT(0), + .status_y_mask =3D BIT(1), + .status_x_mask =3D BIT(2), + }, }, - .wakeup_src_reg =3D 0x1b, - .wakeup_src_status_mask =3D BIT(3), - .wakeup_src_z_mask =3D BIT(0), - .wakeup_src_y_mask =3D BIT(1), - .wakeup_src_x_mask =3D BIT(2), }, }, { @@ -1209,15 +1233,21 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_= sensor_settings[] =3D { .addr =3D 0x58, .mask =3D BIT(7), }, - .wakeup_reg =3D { - .addr =3D 0x5B, - .mask =3D GENMASK(5, 0), + .sources =3D { + [ST_LSM6DSX_EVENT_WAKEUP] =3D { + .value =3D { + .addr =3D 0x5b, + .mask =3D GENMASK(5, 0), + }, + .status =3D { + .addr =3D 0x1b, + .mask =3D BIT(3), + }, + .status_z_mask =3D BIT(0), + .status_y_mask =3D BIT(1), + .status_x_mask =3D BIT(2), + }, }, - .wakeup_src_reg =3D 0x1b, - .wakeup_src_status_mask =3D BIT(3), - .wakeup_src_z_mask =3D BIT(0), - .wakeup_src_y_mask =3D BIT(1), - .wakeup_src_x_mask =3D BIT(2), }, }, { @@ -1415,15 +1445,21 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_= sensor_settings[] =3D { .addr =3D 0x50, .mask =3D BIT(7), }, - .wakeup_reg =3D { - .addr =3D 0x5b, - .mask =3D GENMASK(5, 0), + .sources =3D { + [ST_LSM6DSX_EVENT_WAKEUP] =3D { + .value =3D { + .addr =3D 0x5b, + .mask =3D GENMASK(5, 0), + }, + .status =3D { + .addr =3D 0x45, + .mask =3D BIT(3), + }, + .status_z_mask =3D BIT(0), + .status_y_mask =3D BIT(1), + .status_x_mask =3D BIT(2), + }, }, - .wakeup_src_reg =3D 0x45, - .wakeup_src_status_mask =3D BIT(3), - .wakeup_src_z_mask =3D BIT(0), - .wakeup_src_y_mask =3D BIT(1), - .wakeup_src_x_mask =3D BIT(2), }, }, { @@ -1935,7 +1971,7 @@ st_lsm6dsx_write_event(struct iio_dev *iio_dev, if (val < 0 || val > 31) return -EINVAL; =20 - reg =3D &hw->settings->event_settings.wakeup_reg; + reg =3D &hw->settings->event_settings.sources[ST_LSM6DSX_EVENT_WAKEUP].va= lue; data =3D ST_LSM6DSX_SHIFT_VAL(val, reg->mask); err =3D st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data); @@ -2420,6 +2456,7 @@ static bool st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *hw) { const struct st_lsm6dsx_event_settings *event_settings; + const struct st_lsm6dsx_event_src *src; int err, data; s64 timestamp; =20 @@ -2427,13 +2464,14 @@ st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw= *hw) return false; =20 event_settings =3D &hw->settings->event_settings; - err =3D st_lsm6dsx_read_locked(hw, event_settings->wakeup_src_reg, + src =3D &event_settings->sources[ST_LSM6DSX_EVENT_WAKEUP]; + err =3D st_lsm6dsx_read_locked(hw, src->status.addr, &data, sizeof(data)); if (err < 0) return false; =20 timestamp =3D iio_get_time_ns(hw->iio_devs[ST_LSM6DSX_ID_ACC]); - if ((data & hw->settings->event_settings.wakeup_src_z_mask) && + if ((data & src->status_z_mask) && (hw->enable_event & BIT(IIO_MOD_Z))) iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], IIO_MOD_EVENT_CODE(IIO_ACCEL, @@ -2443,7 +2481,7 @@ st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *= hw) IIO_EV_DIR_EITHER), timestamp); =20 - if ((data & hw->settings->event_settings.wakeup_src_y_mask) && + if ((data & src->status_y_mask) && (hw->enable_event & BIT(IIO_MOD_Y))) iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], IIO_MOD_EVENT_CODE(IIO_ACCEL, @@ -2453,7 +2491,7 @@ st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *= hw) IIO_EV_DIR_EITHER), timestamp); =20 - if ((data & hw->settings->event_settings.wakeup_src_x_mask) && + if ((data & src->status_x_mask) && (hw->enable_event & BIT(IIO_MOD_X))) iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], IIO_MOD_EVENT_CODE(IIO_ACCEL, @@ -2463,7 +2501,7 @@ st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *= hw) IIO_EV_DIR_EITHER), timestamp); =20 - return data & event_settings->wakeup_src_status_mask; + return data & src->status.mask; } =20 static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private) --=20 2.39.5 From nobody Tue Dec 2 00:04:39 2025 Received: from mail-ej1-f43.google.com (mail-ej1-f43.google.com [209.85.218.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D462333B979 for ; Tue, 25 Nov 2025 20:23:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764102196; cv=none; b=G0syLs/sw+4TaYBgSaIKDdkgZhoyXB87J8vbZh/1GiwkTGTwkLA05q7j9brhBeTAeU7j7WWSi8N1vggPUQxax53cPJu6q8NTHRoIu8IHPEkljbCY/LVIkn5B6THrWvfnXyDhOk9TR6l6h5usmPk1LY4Grb64pQQoMIaFXkMNVlI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764102196; c=relaxed/simple; bh=h/L2zhPfn2Gbd634jm4+Ta6MvmpxMumLED/InTCkazs=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=nXdIKo+VJFNTebrho3SJdqt9P2pkb3lU122lzqVCpXUeD4GgD2wWT6A5s6fl1h2icjCyf2//VgrYQclOqKplVmd/Te50iHNNGOElLh+QngPaP4Ovv7poMqlAX9kXV2orpZxPxZZOnInsKJGqKzodhl7ms81Dud9tX5YXT25eEFk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=NtgUY5kd; arc=none smtp.client-ip=209.85.218.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="NtgUY5kd" Received: by mail-ej1-f43.google.com with SMTP id a640c23a62f3a-b73875aa527so957388166b.3 for ; Tue, 25 Nov 2025 12:23:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1764102193; x=1764706993; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vttCzqYG+Cs7YHIz7IHkrbbgN3J8iVBx1Ck/rBWwG+E=; b=NtgUY5kdTOL2oAU6Vix5LuEHdjCsNxPGcMYAb9/igzUTu9XM5ONLM+qCk58vcWO0JB VzbwT/KfIRcdi/13xCfRZNX1CWUlVkqKb3wUTeO0aY7Kx0TRsmoIoLlAqfgJ5KMDilmr nVrn0heZF/JO9FZZjPUsWMOypbUYMTNf6EcYAKjGkP5LgcCwSu/oj4/t3MveIG8Ntuf1 iYHjHxg3uW1j5n46VRjM4xgwqqGvJvsvMwk1qENNgrwn589c8CW7EeYsLdZxQMbJd+s5 vJjldG+9OfZH+rnPOYMf/yKzo0E6DBd/jTT4Cg5VChbzH6wEuKCfiGfIkvYjJXgoPg7Y xi9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1764102193; x=1764706993; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=vttCzqYG+Cs7YHIz7IHkrbbgN3J8iVBx1Ck/rBWwG+E=; b=dzFAhu1osfmFsNgZEsVF7yWiIcG8NItRWucIKUbenSHAt+R4Zf2pBBCTNLF0o97kor evHhuyhoT2id/ttvgwUPeUJPvKScjo4JsNoo87ZUHMtoXU9KiIw+2WnP5zl/w/bPnIkT Q+h5JK4ryzAM14F5oyPFewhQTqAgJlFi/DeT9K8kd6MZRazPOWGHAVI5nDngUccq6cgy tq+Hd0XbyOMYz5CnDA3SbJkyD/J7pQQY2coyD+cZm6MNe2lnxee0i0TAPbb7CHZHJ1u0 eWjtriG6vTenOjgs5dJpkOb/nttfZDkLHEdU26p4RVgw0hBnUwo9le4E87y/K/eI10hm 61sQ== X-Forwarded-Encrypted: i=1; AJvYcCUg9zIY7C+C+2/3RW52SUqFUkn2kK8C7eSIRwMrqUlXhhcbYHPzPplcs3BwtnAq5WeLaE4xn42AgxLL8RI=@vger.kernel.org X-Gm-Message-State: AOJu0YysMU2c4A28h3C/4SyYPm5i+RXaN15Py/T83F/8TZiNwZe4mY7k GQRbS0cEtkJlaAhsavQffUwJEN1LGhZ3xi4Sib6+lAGndSF5OKLvFApsMGe18mXZNd4= X-Gm-Gg: ASbGncvFHu9Rj0mYEjfQ8BhelyTP+RMVl2JfT0j9S2s5EnZGKsO+5+k21+HZJ/RhEm6 4AAybmnw1SYTs1eZSs702QRkb2x/cyi7JaQTz58bx8Obz1X1oIc1c/c7gJompGso1kE8GdwiG+3 eLGr5WLTF7OVteSejTB7bmK+wUqtAYxKPsNTui/luhEF+hUeD0lDDyh8RLn4xAeXzMe5mG/rm1p OEVtbBs/UBdjzFibXizo0tiVd4jbsDREron1qme5nzbD3MQKFmedXGLiXTd953Y9jI/UxDmL+T0 ZS+I1RsD8R0GbtFSS7PUNzR+MlzihYgNAXIOSNhR7Bznp9bN3IimgKe5osUGltuDsRb3mPc8aUv 2HZXp1LvVY1ocsM90xrXU8eyWvuzcG2r1GE3nQag447t7VQN3KQlTqRLu81rJ2dgGA3YZhtpsMF oDGg== X-Google-Smtp-Source: AGHT+IEwart1K70Q3xXtXpl06Gau6o0XlxmPQ5x1c27gnod+RvTriYDy8X1oG5B3wY1ZU8APCJnKOw== X-Received: by 2002:a17:906:7310:b0:b73:667e:bb29 with SMTP id a640c23a62f3a-b7671558abcmr1505927566b.8.1764102192891; Tue, 25 Nov 2025 12:23:12 -0800 (PST) Received: from localhost ([151.35.128.119]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b765502840csm1658891866b.59.2025.11.25.12.23.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Nov 2025 12:23:12 -0800 (PST) From: Francesco Lavra To: Lorenzo Bianconi , Jonathan Cameron , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Andy Shevchenko Subject: [PATCH v3 3/9] iio: imu: st_lsm6dsx: move wakeup event enable mask to event_src Date: Tue, 25 Nov 2025 21:23:01 +0100 Message-Id: <20251125202307.4033346-4-flavra@baylibre.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251125202307.4033346-1-flavra@baylibre.com> References: <20251125202307.4033346-1-flavra@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=7475; i=flavra@baylibre.com; h=from:subject; bh=h/L2zhPfn2Gbd634jm4+Ta6MvmpxMumLED/InTCkazs=; b=owEB7QES/pANAwAKAe3xO3POlDZfAcsmYgBpJhADIWxqnj1iMqMM7C1xI7zGHft1pA3TgJ8Du 3wXagqwTE6JAbMEAAEKAB0WIQSGV4VPlTvcox7DFObt8TtzzpQ2XwUCaSYQAwAKCRDt8TtzzpQ2 X3tHC/4xczSi8fr+pIP4kEK6iyJ+Yvg3q24BTBTB577oKwktl+HXXniqS4L5JOQkoaDNr9CbqsG w+Pvp2Lp/QPT1xUwgnrC0Clu23KFi9ClxWqxx7o2i+7RKvQ+u7yRZmAw7qa+jXxwq/7rrNfITm8 yvhIloTrc0OiFJPKIHQlISrxJ/4Gzxzl+sxzz2h1XQjlFPnTVf1BPL56IAwrUhFNP5/VQBAsTmf rDBWlURRwzPtoUbiVjtqtmcIg6br9cZ0w2aKXhEU3OnRGt76PZWSbaPCKsWtoaA7DDi9e0Sh0UK bWbfBeHmZ/W48gv+Gz1nmzvhdRmPRp99NAtURAkOw3yA3lDd7vcx72o141c5LYNg7L7AGDQhERK 1ludZpK9vZ2ga3RhSUpkPrSaGWVyeVDugFFr3NwqBD8EkU90s6CEqLBlQW0zud945n2+BRRQ/Md vguVr3zP5CNlBLHTpI2h+RFi13TbYWQqT2bHiPRVnwovxjO7Tmc+xH6bCPKo9vJsH5geM= X-Developer-Key: i=flavra@baylibre.com; a=openpgp; fpr=8657854F953BDCA31EC314E6EDF13B73CE94365F Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The mask value being assigned to the irq1_func and irq2_func fields of the irq_config struct is specific to a single event source (i.e. the wakeup event), and as such it should be separate from the definition of the interrupt function registers, which cover multiple event sources. In preparation for adding support for more event types, change the irq1_func and irq2_func type from an {address, mask} pair to an address, and move the mask value to a new field of struct st_lsm6dsx_event_src. No functional changes. Signed-off-by: Francesco Lavra Reviewed-by: Andy Shevchenko Acked-by: Lorenzo Bianconi --- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h | 7 +- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c | 80 +++++++------------- 2 files changed, 30 insertions(+), 57 deletions(-) diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h b/drivers/iio/imu/st_l= sm6dsx/st_lsm6dsx.h index 80bc5686454b..4200e5231950 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h @@ -249,6 +249,7 @@ enum st_lsm6dsx_event_id { =20 struct st_lsm6dsx_event_src { struct st_lsm6dsx_reg value; + u8 enable_mask; struct st_lsm6dsx_reg status; u8 status_x_mask; u8 status_y_mask; @@ -343,8 +344,8 @@ struct st_lsm6dsx_settings { struct { struct st_lsm6dsx_reg irq1; struct st_lsm6dsx_reg irq2; - struct st_lsm6dsx_reg irq1_func; - struct st_lsm6dsx_reg irq2_func; + u8 irq1_func; + u8 irq2_func; struct st_lsm6dsx_reg lir; struct st_lsm6dsx_reg clear_on_read; struct st_lsm6dsx_reg hla; @@ -443,7 +444,7 @@ struct st_lsm6dsx_hw { u8 ts_sip; u8 sip; =20 - const struct st_lsm6dsx_reg *irq_routing; + u8 irq_routing; u8 event_threshold; u8 enable_event; =20 diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu= /st_lsm6dsx/st_lsm6dsx_core.c index e8f0a2ff91be..ba163dd2ab82 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c @@ -328,14 +328,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sen= sor_settings[] =3D { .addr =3D 0x58, .mask =3D BIT(0), }, - .irq1_func =3D { - .addr =3D 0x5e, - .mask =3D BIT(5), - }, - .irq2_func =3D { - .addr =3D 0x5f, - .mask =3D BIT(5), - }, + .irq1_func =3D 0x5e, + .irq2_func =3D 0x5f, .hla =3D { .addr =3D 0x12, .mask =3D BIT(5), @@ -394,6 +388,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sens= or_settings[] =3D { .addr =3D 0x5b, .mask =3D GENMASK(5, 0), }, + .enable_mask =3D BIT(5), .status =3D { .addr =3D 0x1b, .mask =3D BIT(3), @@ -500,14 +495,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sen= sor_settings[] =3D { .addr =3D 0x58, .mask =3D BIT(0), }, - .irq1_func =3D { - .addr =3D 0x5e, - .mask =3D BIT(5), - }, - .irq2_func =3D { - .addr =3D 0x5f, - .mask =3D BIT(5), - }, + .irq1_func =3D 0x5e, + .irq2_func =3D 0x5f, .hla =3D { .addr =3D 0x12, .mask =3D BIT(5), @@ -566,6 +555,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sens= or_settings[] =3D { .addr =3D 0x5b, .mask =3D GENMASK(5, 0), }, + .enable_mask =3D BIT(5), .status =3D { .addr =3D 0x1b, .mask =3D BIT(3), @@ -702,14 +692,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sen= sor_settings[] =3D { .addr =3D 0x58, .mask =3D BIT(0), }, - .irq1_func =3D { - .addr =3D 0x5e, - .mask =3D BIT(5), - }, - .irq2_func =3D { - .addr =3D 0x5f, - .mask =3D BIT(5), - }, + .irq1_func =3D 0x5e, + .irq2_func =3D 0x5f, .hla =3D { .addr =3D 0x12, .mask =3D BIT(5), @@ -809,6 +793,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sens= or_settings[] =3D { .addr =3D 0x5b, .mask =3D GENMASK(5, 0), }, + .enable_mask =3D BIT(5), .status =3D { .addr =3D 0x1b, .mask =3D BIT(3), @@ -957,14 +942,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sen= sor_settings[] =3D { .addr =3D 0x56, .mask =3D BIT(6), }, - .irq1_func =3D { - .addr =3D 0x5e, - .mask =3D BIT(5), - }, - .irq2_func =3D { - .addr =3D 0x5f, - .mask =3D BIT(5), - }, + .irq1_func =3D 0x5e, + .irq2_func =3D 0x5f, .hla =3D { .addr =3D 0x12, .mask =3D BIT(5), @@ -1052,6 +1031,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_se= nsor_settings[] =3D { .addr =3D 0x5b, .mask =3D GENMASK(5, 0), }, + .enable_mask =3D BIT(5), .status =3D { .addr =3D 0x1b, .mask =3D BIT(3), @@ -1176,14 +1156,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_s= ensor_settings[] =3D { .addr =3D 0x56, .mask =3D BIT(6), }, - .irq1_func =3D { - .addr =3D 0x5e, - .mask =3D BIT(5), - }, - .irq2_func =3D { - .addr =3D 0x5f, - .mask =3D BIT(5), - }, + .irq1_func =3D 0x5e, + .irq2_func =3D 0x5f, .hla =3D { .addr =3D 0x12, .mask =3D BIT(5), @@ -1239,6 +1213,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_se= nsor_settings[] =3D { .addr =3D 0x5b, .mask =3D GENMASK(5, 0), }, + .enable_mask =3D BIT(5), .status =3D { .addr =3D 0x1b, .mask =3D BIT(3), @@ -1357,14 +1332,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_s= ensor_settings[] =3D { .addr =3D 0x56, .mask =3D BIT(0), }, - .irq1_func =3D { - .addr =3D 0x5e, - .mask =3D BIT(5), - }, - .irq2_func =3D { - .addr =3D 0x5f, - .mask =3D BIT(5), - }, + .irq1_func =3D 0x5e, + .irq2_func =3D 0x5f, .hla =3D { .addr =3D 0x03, .mask =3D BIT(4), @@ -1451,6 +1420,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_se= nsor_settings[] =3D { .addr =3D 0x5b, .mask =3D GENMASK(5, 0), }, + .enable_mask =3D BIT(5), .status =3D { .addr =3D 0x45, .mask =3D BIT(3), @@ -1911,10 +1881,11 @@ static int st_lsm6dsx_write_raw(struct iio_dev *iio= _dev, static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, bool state) { const struct st_lsm6dsx_reg *reg; + const struct st_lsm6dsx_event_src *src; unsigned int data; int err; =20 - if (!hw->settings->irq_config.irq1_func.addr) + if (!hw->irq_routing) return -ENOTSUPP; =20 reg =3D &hw->settings->event_settings.enable_reg; @@ -1927,9 +1898,10 @@ static int st_lsm6dsx_event_setup(struct st_lsm6dsx_= hw *hw, bool state) } =20 /* Enable wakeup interrupt */ - data =3D ST_LSM6DSX_SHIFT_VAL(state, hw->irq_routing->mask); - return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing->addr, - hw->irq_routing->mask, data); + src =3D &hw->settings->event_settings.sources[ST_LSM6DSX_EVENT_WAKEUP]; + data =3D ST_LSM6DSX_SHIFT_VAL(state, src->enable_mask); + return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing, + src->enable_mask, data); } =20 static int st_lsm6dsx_read_event(struct iio_dev *iio_dev, @@ -2183,11 +2155,11 @@ st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw, =20 switch (drdy_pin) { case 1: - hw->irq_routing =3D &hw->settings->irq_config.irq1_func; + hw->irq_routing =3D hw->settings->irq_config.irq1_func; *drdy_reg =3D &hw->settings->irq_config.irq1; break; case 2: - hw->irq_routing =3D &hw->settings->irq_config.irq2_func; + hw->irq_routing =3D hw->settings->irq_config.irq2_func; *drdy_reg =3D &hw->settings->irq_config.irq2; break; default: --=20 2.39.5 From nobody Tue Dec 2 00:04:39 2025 Received: from mail-ed1-f49.google.com (mail-ed1-f49.google.com [209.85.208.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0EA5B33C19B for ; Tue, 25 Nov 2025 20:23:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764102198; cv=none; b=AWafn5rvTGSJgfBUG5qT1L5h8ak9e6vj1/CZ15AKPvscIMWlQ82WJoQTV+8KQkSvYGMwd0qXKYC8ITjoLlJaJYqk/38JJm1IfRNbqwdFmDXefitmlPvkddLD3SiuSzFzsmr4Lhh3Vy4Dm5fLJh2yBTN3j01ZIP9uj6cpd+7ZiBI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764102198; c=relaxed/simple; bh=DqJyjrJckqTFCFbsp+ufeGsL49os8RH1HQOvg32AKQk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=b+2kCjWPeboUiets08ngXvGhiZ3na9N7LGhPbIQBmxuOr4k5o5WYLn7U8zazIR8WKRo/FfA4XglhKDZyXDR0LPdtaYBGcd8e4/muknA80EB6Z5ZhY6DGYFLCQyunN9ZjzRaIHTSyz3CYJ1H3GjPaC9sklZ5cws2yV0p3wbQnRrI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=n95Kmad8; arc=none smtp.client-ip=209.85.208.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="n95Kmad8" Received: by mail-ed1-f49.google.com with SMTP id 4fb4d7f45d1cf-640a3317b89so8751338a12.0 for ; Tue, 25 Nov 2025 12:23:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1764102194; x=1764706994; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=T/17Tgx9epkg1KaWaLaodjBbzP+GCzteuD35HmwuiLE=; b=n95Kmad8cOie22eHyiMhmiBGYDkAtsdMWXBOJqz721WW3WTNt24bBn4gHy3lNwiQH1 Pya+ByHGQkteqZ4X7MNB3UVCx6g3NQtqaRHLE3Y9Jhl/6ImoeR/ujFdm7bF70InkzNMg 5NFJ0m5MxBpj/X9ufSeVI5SZGM3Re4r6cFMDZWwRXs6+D1La2/kg4TVZMJTruMS3PEkE EyMmc3CUSn4IJ8DN3ej5Ei8xsvwlhtuHjfZ+ERk9Aa2bUZbbAZ2eRVeWL0YFtcqxCG3m 5H+pSMxCbudy4TC3DIfE6ujFbGWKl3Z6ULHVYQlLE2HqCpD9CAnW/ZGtd77iOqqqiAC5 aY7Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1764102194; x=1764706994; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=T/17Tgx9epkg1KaWaLaodjBbzP+GCzteuD35HmwuiLE=; b=Xv+Gy6hHyLzzhU6aHcGDDg5QH+i62/OF+HERwmTDfj1h8iMLsliIZVz77v6MDWP596 iaZNNE1qpejBSMx3DPtK7G5quc2c7+Pe01AQHlI7fE1ngliJbvLTx0nL4G0kFJ4OMiuK 7XjkWXE1QeSOiVRQBMOiaULhAXb/EyUco+F+7JxpgK7vUqGXsfYrKqzp2gLseGCJMyP1 G3Kv8qprpfqzMDeWvDmA4IL2v47baBcBlameUngYJKafj5BhPTshp1yQUmF0cXDBxjIV D/dEUNgdYykQtoWIlrgX8LBHtkB0euUSDkUK01EaxGca8YNbvUccZGyYa4wk1qfqYgwG NNXg== X-Forwarded-Encrypted: i=1; AJvYcCXe2sYl6L3XsD8poavx1EDb7VSdK789nURyVGuKfYlVJrr8JOQhn2om6z0vxKz3hi6PLJjKFwYQ+96YDP0=@vger.kernel.org X-Gm-Message-State: AOJu0Yw9UXiiXYIih/ndKZN1RbZo6wjne8926mHjP0BylAtOPwc63fhi aWMWHKBpRVK8QVHex0K7kHb8AQf3kOHLcWwJKv8vW0OV40HMglS7Zji7f4JF+WKOWdU= X-Gm-Gg: ASbGncuWZHNuQNx+x53PLXjfkUIjyYn/iWDnr+H5f0Olqlq0iXsC13N0Whyn3rMJehw FfmU+CUgkMLbu1JA8/viCiVlsYJe8KmNCNVfrxvQzIPnUC9jOigyfXZoNVVTbkwjADgmKl3gHqD c32D7rvq2cu9bYDNskjpFYAG6C74dm/dXFIST1b3OoK245iHG+qrvOiPi1e/jr/z7CgDzWyKwY3 U007PFJKR7P7YXVgEbwOtiJNU6bh6gie5XOghItmMTUNr2C+xQb5olbdr9OaaTjMYJRc8Z4s9Xn rKfHA+4Vnz1HrqWxlvvZaEe8ynNGAxzZBEGWZzSQwABt1lwF9D91pUKjOSrQNzZrYEI8xm0Tlk0 KmsKBbrOdOxK+WACqfzB2M/wZ58H1NiXwDFm7b83kqTy/6AVLW7Nq8lOd7a5uPsW08/FO X-Google-Smtp-Source: AGHT+IF1jEzi0tnblxW4NUau8G4FOxDCk+CR1sk5/D9G7iXCJNbzlCtwMboP/Ymqc97J2f4E7Aqqag== X-Received: by 2002:a17:906:f5aa:b0:b3e:e16a:8cdb with SMTP id a640c23a62f3a-b76c5352f46mr447862366b.12.1764102194273; Tue, 25 Nov 2025 12:23:14 -0800 (PST) Received: from localhost ([151.35.128.119]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b7654ff3bbesm1674127166b.51.2025.11.25.12.23.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Nov 2025 12:23:14 -0800 (PST) From: Francesco Lavra To: Lorenzo Bianconi , Jonathan Cameron , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Andy Shevchenko Subject: [PATCH v3 4/9] iio: imu: st_lsm6dsx: rework code to check for enabled events Date: Tue, 25 Nov 2025 21:23:02 +0100 Message-Id: <20251125202307.4033346-5-flavra@baylibre.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251125202307.4033346-1-flavra@baylibre.com> References: <20251125202307.4033346-1-flavra@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2722; i=flavra@baylibre.com; h=from:subject; bh=DqJyjrJckqTFCFbsp+ufeGsL49os8RH1HQOvg32AKQk=; b=owEB7QES/pANAwAKAe3xO3POlDZfAcsmYgBpJhADMQVpJcwRohUAGn+A7Rc5GiIcg+Cr4E5+E EzqWf8+OkWJAbMEAAEKAB0WIQSGV4VPlTvcox7DFObt8TtzzpQ2XwUCaSYQAwAKCRDt8TtzzpQ2 X+MyC/wMDPp1XD/LQyq5jGU+UkDGYKK9/xkEjzCySgK4pBi083KT2QpF33bhob6gdTg7PTMHec2 IVDXVKvKBgGBtpgkioBtErY8Gii1R60Xf/BQRaHZcz+DHG102PgGWo0NV+Ijc83QKXTUSClaEE2 wAjb1O3BWzx8t1j0wvh1t10Gp82IBa/D1Vf5D0gCwUufP9FplacQGKaie9iP1zLYNdFydLVr4MU G33oJ2JUBAjOMaQJ8zgjWe1AL3NAsAP7L/869/q1mhiPaO1eGuk2iDb039fQocuHUmRrpAR8jqK 8KHmFSFHDxbyRfdqxrtWVMvwpFBX3So0wTCE33IfPPVcEWHX4Vco5lPDiMevHuSPLsVMwHWVrwc +jeoowGnf5nfINARwB7glrzQ9u3bWNHeTDg59jpooYIxUqH29c7vh44gpnxl12iosfkBC2y+OGF KLBBxcxeL7RDd2HCJFh+mERUIVKPgJF8j96p65INJFc2sDCngIwhnrlk9g6rOTjs1tx1c= X-Developer-Key: i=flavra@baylibre.com; a=openpgp; fpr=8657854F953BDCA31EC314E6EDF13B73CE94365F Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The enable_event field in struct st_lsm6dsx_hw does not lend itself well to handling multiple event sources, so it will have to be modified to add support for more event sources. As a preparatory step, remove references to this field from code that does not deal with event management; rework the st_lsm6dsx_check_events() function so that it returns whether any events are currently enabled on a given sensor. Signed-off-by: Francesco Lavra Reviewed-by: Andy Shevchenko --- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu= /st_lsm6dsx/st_lsm6dsx_core.c index ba163dd2ab82..828e495c870c 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c @@ -1756,11 +1756,11 @@ __st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_se= nsor *sensor, } =20 static int -st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sensor, bool enable) +st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sensor) { struct st_lsm6dsx_hw *hw =3D sensor->hw; =20 - if (sensor->id =3D=3D ST_LSM6DSX_ID_GYRO || enable) + if (sensor->id !=3D ST_LSM6DSX_ID_ACC) return 0; =20 return hw->enable_event; @@ -1769,7 +1769,7 @@ st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sen= sor, bool enable) int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor, bool enable) { - if (st_lsm6dsx_check_events(sensor, enable)) + if (st_lsm6dsx_check_events(sensor)) return 0; =20 return __st_lsm6dsx_sensor_set_enable(sensor, enable); @@ -1797,11 +1797,9 @@ static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx= _sensor *sensor, if (err < 0) return err; =20 - if (!hw->enable_event) { - err =3D st_lsm6dsx_sensor_set_enable(sensor, false); - if (err < 0) - return err; - } + err =3D st_lsm6dsx_sensor_set_enable(sensor, false); + if (err < 0) + return err; =20 *val =3D (s16)le16_to_cpu(data); =20 @@ -2762,7 +2760,7 @@ static int st_lsm6dsx_suspend(struct device *dev) continue; =20 if (device_may_wakeup(dev) && - sensor->id =3D=3D ST_LSM6DSX_ID_ACC && hw->enable_event) { + st_lsm6dsx_check_events(sensor)) { /* Enable wake from IRQ */ enable_irq_wake(hw->irq); continue; @@ -2793,7 +2791,7 @@ static int st_lsm6dsx_resume(struct device *dev) =20 sensor =3D iio_priv(hw->iio_devs[i]); if (device_may_wakeup(dev) && - sensor->id =3D=3D ST_LSM6DSX_ID_ACC && hw->enable_event) + st_lsm6dsx_check_events(sensor)) disable_irq_wake(hw->irq); =20 if (!(hw->suspend_mask & BIT(sensor->id))) --=20 2.39.5 From nobody Tue Dec 2 00:04:39 2025 Received: from mail-ed1-f51.google.com (mail-ed1-f51.google.com [209.85.208.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 04B1233C513 for ; Tue, 25 Nov 2025 20:23:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764102199; cv=none; b=tgugSAJ9cz3gMY1fV8SsPl6Fd+d24uGUYa5gDbTcy0iNIFPggpQQ3vg2fQyV2LlJotQgBgIZ3I19YQliGd/KRHMrlqNCofDL85Ga+DD6fzy7T5oQFyNq5lOZZ+y6DHzUD98/kStbUlS0wtiWrvCSkY5uCGk5HqNiBhfZhqh0z4c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764102199; c=relaxed/simple; bh=Hb1zr2alwVQYcp7QMo+P9C4EGA5XkhpF1f4WPadLW7c=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=adHV5v38E0oDiBkXRvxBk4aLKEln4zHQN5uS1KSp33gH2Snc4pcbrsd53vhQgRX1yGwOWtTUKylTFFr2Y71JQ36K/VF7rf+EN6xVfFVbYNSu5/3IP0G3J+mw97YyghwyLdzIKaBbjwYctuZzgQkmVzRwXTn4zT3ad5vQoof9BBw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=NtdYM2ZQ; arc=none smtp.client-ip=209.85.208.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="NtdYM2ZQ" Received: by mail-ed1-f51.google.com with SMTP id 4fb4d7f45d1cf-6417313bddaso9256882a12.3 for ; Tue, 25 Nov 2025 12:23:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1764102195; x=1764706995; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=UfRpMGSd7y9d0byFFdqTrDp2AlO8u4+9bS6XzrmHfjQ=; b=NtdYM2ZQIUvui7ybVr9e2/8ipNxbswDh9k5I4/TX5IXuknLo7PnluOa9FZ0Md9pjhW H16iiTRSnqXudV6JVZtsgdvNOLiuBQtJS/xuuC5Qej6DfsotILo19w7Vg+FuycIN6kKc wDRcPzoB3IvaqkishWbw8zq9tkr4KJpXdMogq0Z9yrT00qWWHTUO0P+ii8wBC9lXF9jh 4VVxSlDFeRtrFaRiLP83HVjhcnFCdfLU8gmorpnjjrIA6VRXhSRgRDrMljd+EoY9RQPG bKbjuLqIbm1BRnJQFuiz66n2Xn58fbsXqskh6Yyv4AksoPk/C08zOfcfrRJjDwblK8Yg QQnA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1764102195; x=1764706995; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=UfRpMGSd7y9d0byFFdqTrDp2AlO8u4+9bS6XzrmHfjQ=; b=E5XDBVm31E3zLDLi7ZOSY9Nv4KQfgTMMk5wh/f/TkdqYzfV9vokuJ7Yn4KT/LJMzBe 5txdxNgQL7AS4l2Lk/domejsrvVOkBWyrQDGYKTNwMktz0GAO/v3siQXVO3ceDxQZN6K ye0zUT0XIvDHYu8za0iIIoRnZp9nlOGgirR25e44QQQZ6NLtn9m05gKp0cQ5QeBZK1We KcK3bY/FVINgwfLA7W93IYKDtCpsLt/Lhw8ufC9XRyIiNUhPE2JxDRjxrdzmDypC6da+ 63xNbiOL4fElsx7V4Jk6/cUplpAAeEpcgw7HFbDU8UtkKEra+5wIGJ96NtcosmxzJ2h3 FPLw== X-Forwarded-Encrypted: i=1; AJvYcCWzhZXDX9Nnhd+IGLfwYavDq1DxEKF7xMQKhmCR+nMMDG1x514sDzs4eG2Gn4J9SWxyc8q2WrtrEPiVf/M=@vger.kernel.org X-Gm-Message-State: AOJu0YzFpP3Yfves6hDKQNo21PPqaF1ALQjmKSYRaklBT9qahDTOIbwq bjIKGPGtMi55AQ+YEapEMbW0Jg7Y9fbY+8dpdAbcSNE++M/Y6D42eZY70aSHAeKAc+E= X-Gm-Gg: ASbGncup8lpVVuwWygbJIcus/EIOmkJ7HDUpCJ36Ti3ZrzuTOWMD1Rqnf7iUOvL2Pki 1G6hPydA9HfQ0GOl9B0sUJNaQQp/vUCC/KwVYqZEOG8tazj4Tc4lfPkeB1LOrrg4/Uq0PfXtrJ3 jDOs9Zy3gkWGwLFJMrZwIFHo0mhG8bEXAZV79Bx7iW3eL687SW4vzlxbEcx1Z/fxFRkux+9KXix s8dTs9MjbFW5gkclo/osVjR63rjwIUuBr3o7Kp/cF3jx0kirvbWhiHRsSNyqFkB3uu7y/XddInU WzAvjJrJcZUIYvfIl7mri4dy+NqQuud68xp7NmA0+/H/ipjD7SiGVAZmg7f0CgtYyRW9d6MjVtj JJGi+tUDxdOO6nDwA0OlNGOlyO0HCdXv3AlcIrm8YJEbRmAu+23skIG+X9l4H8fFoP7iZd+4I59 5UWQ== X-Google-Smtp-Source: AGHT+IFpxWL3ao3JaYTVxSx1a400xB3QpLjsTSDRGGvMCvwqUEvobLbSlcKVS+FCjQLg3DEwLgmS8g== X-Received: by 2002:a17:907:2d12:b0:b73:594e:1c47 with SMTP id a640c23a62f3a-b76c540b1d5mr464097466b.26.1764102195433; Tue, 25 Nov 2025 12:23:15 -0800 (PST) Received: from localhost ([151.35.128.119]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b7654fd43e2sm1651602666b.39.2025.11.25.12.23.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Nov 2025 12:23:15 -0800 (PST) From: Francesco Lavra To: Lorenzo Bianconi , Jonathan Cameron , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Andy Shevchenko Subject: [PATCH v3 5/9] iio: imu: st_lsm6dsx: remove event_threshold field from hw struct Date: Tue, 25 Nov 2025 21:23:03 +0100 Message-Id: <20251125202307.4033346-6-flavra@baylibre.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251125202307.4033346-1-flavra@baylibre.com> References: <20251125202307.4033346-1-flavra@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2908; i=flavra@baylibre.com; h=from:subject; bh=Hb1zr2alwVQYcp7QMo+P9C4EGA5XkhpF1f4WPadLW7c=; b=owEB7QES/pANAwAKAe3xO3POlDZfAcsmYgBpJhADTjcYUfLEOFcXnMU2lpB8wmZGiiVcFvMuJ mTWraWzVvOJAbMEAAEKAB0WIQSGV4VPlTvcox7DFObt8TtzzpQ2XwUCaSYQAwAKCRDt8TtzzpQ2 X5DJC/9fLgh7q/NyEPEV84dK//ft+taLDfstrh+XkNW62d36awt/NcLdhH6avhxLJs9pxdi1DBd 4bZd3xi8Lu3e9Dmnr4Ru3tjG6AQSX/v68WEhZm3r/FH2bOMe8/RUic0hmqalEFeaWlfnNRQ4rJm +Gy8LKTWfe0mlql63fFpTa1SiHdjgl7+u4N8fAR6pF0OJfP0IrveNeY0vBbT9plFhFzlM6tuJuD JXcfHNnUU0XYhGV9INBHYehsbn5xmXgFnN7wuiZ7sI6gbhLudFLxg4IKwS0IiYbho+kXj5e+hNn 8Qp2ue3MquQZHKAOe5N7R0HWEPu+a3nTom02QRQgFUMIleLJpJH9FeG/0uiiofAiCjqfOsEUU5t fnpTZhO8FRpzOg7gAO7jNVJs3cc7fQBSI/4OLKyq4D1OFrS/zoiRi4QvOMD3qb+xGAlxMgukNaG lQ0FcqYP81xTiC8QrgKvv5fK/05Y2hWZn+R3ujhaGwsz6vLUCz41EJfR7FI71Kw24twDE= X-Developer-Key: i=flavra@baylibre.com; a=openpgp; fpr=8657854F953BDCA31EC314E6EDF13B73CE94365F Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This field is used to store the wakeup event detection threshold value. When adding support for more event types, some of which may have different threshold values for different axes, storing all threshold values for all event sources would be cumbersome. Thus, remove this field altogether, and read the currently configured value from the sensor when requested by userspace. Signed-off-by: Francesco Lavra Reviewed-by: Andy Shevchenko --- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h | 3 +-- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c | 12 +++++++++--- 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h b/drivers/iio/imu/st_l= sm6dsx/st_lsm6dsx.h index 4200e5231950..b27a833d5107 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h @@ -79,6 +79,7 @@ enum st_lsm6dsx_hw_id { #define ST_LSM6DSX_MAX_TAGGED_WORD_LEN ((32 / ST_LSM6DSX_TAGGED_SAMPLE_SIZ= E) \ * ST_LSM6DSX_TAGGED_SAMPLE_SIZE) #define ST_LSM6DSX_SHIFT_VAL(val, mask) (((val) << __ffs(mask)) & (mask)) +#define st_lsm6dsx_field_get(mask, reg) ((reg & mask) >> __ffs(mask)) =20 #define ST_LSM6DSX_CHANNEL_ACC(chan_type, addr, mod, scan_idx) \ { \ @@ -421,7 +422,6 @@ struct st_lsm6dsx_sensor { * @sip: Total number of samples (acc/gyro/ts) in a given pattern. * @buff: Device read buffer. * @irq_routing: pointer to interrupt routing configuration. - * @event_threshold: wakeup event threshold. * @enable_event: enabled event bitmask. * @iio_devs: Pointers to acc/gyro iio_dev instances. * @settings: Pointer to the specific sensor settings in use. @@ -445,7 +445,6 @@ struct st_lsm6dsx_hw { u8 sip; =20 u8 irq_routing; - u8 event_threshold; u8 enable_event; =20 u8 *buff; diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu= /st_lsm6dsx/st_lsm6dsx_core.c index 828e495c870c..dbdf9bb9e258 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c @@ -1911,12 +1911,20 @@ static int st_lsm6dsx_read_event(struct iio_dev *ii= o_dev, { struct st_lsm6dsx_sensor *sensor =3D iio_priv(iio_dev); struct st_lsm6dsx_hw *hw =3D sensor->hw; + const struct st_lsm6dsx_reg *reg; + u8 data; + int err; =20 if (type !=3D IIO_EV_TYPE_THRESH) return -EINVAL; =20 + reg =3D &hw->settings->event_settings.sources[ST_LSM6DSX_EVENT_WAKEUP].va= lue; + err =3D st_lsm6dsx_read_locked(hw, reg->addr, &data, sizeof(data)); + if (err < 0) + return err; + *val2 =3D 0; - *val =3D hw->event_threshold; + *val =3D st_lsm6dsx_field_get(reg->mask, data); =20 return IIO_VAL_INT; } @@ -1948,8 +1956,6 @@ st_lsm6dsx_write_event(struct iio_dev *iio_dev, if (err < 0) return -EINVAL; =20 - hw->event_threshold =3D val; - return 0; } =20 --=20 2.39.5 From nobody Tue Dec 2 00:04:39 2025 Received: from mail-ej1-f48.google.com (mail-ej1-f48.google.com [209.85.218.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5C21233C190 for ; Tue, 25 Nov 2025 20:23:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764102200; cv=none; b=nFIf+r+Y37OGtKTAVHbrL1GFfaC9Vz5kqyLNp8KOwU5vasPA0MKldAlY6r8nD7If6B6AhRkxSoidwLmnhEg39XJFE75QR7/6D7WtbThwlDFTL+tFYewceaZRlCFwNRXrBSGVGDdKnZTNWny4VRCfC8VqYfD9fm5/iWJyk8y4rcI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764102200; c=relaxed/simple; bh=I2wP8/v8+iTwp/IbXvF+LNCirEJ4rMBvnG2GqyV2YMI=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=uHYZUsmcx8kxrT5Az6dXsKsRDFSZXspx87savEl4Dm1A6y8z1lbuor7MhjA3kE+UBZHN4E6smYhbIIGoVW0gZvhESaHS2/G/d7gSJ9uj0+G20hfHuRHKHh4e8+KMwciNeJCHU2POX3p6w7A4qrFRvZfXESYXPdMTzGuFVf1RCfw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=xIrzbBQ5; arc=none smtp.client-ip=209.85.218.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="xIrzbBQ5" Received: by mail-ej1-f48.google.com with SMTP id a640c23a62f3a-b73161849e1so1109520166b.2 for ; Tue, 25 Nov 2025 12:23:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1764102197; x=1764706997; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0JpMgD46UuIDmNrqgcRKLqCKR6U3UNIGWYWZqhE2Z4U=; b=xIrzbBQ5qAX/ptgyt2R2g6A970boD6Y/C4/lFjpiWUduUlsNsXheYYKqooHJG5GVBB YlPB+vReriT7yT/EB5RZ8qAENffdPbGbT+hbp3+p/ZtCLCF2pr3zn0IelVQxSwUW+fY3 yCHhLFRgqOW6mbdN3gv9qVpQdUepM2x9R3lHztZ/4DIzHrctLAFlMRv0p2WLqSsbdJXa h8wyV4GErUfBq7gb6rodrPoyfx98kCuK6mZCeW/PMJmX34U7ZEiWlm2yDARwxsnI04eK rTnjv+4zWpJRt+37Y8a0HTNYms2ckNsyMVxV8CsyRO8TmIlJS2XUuThSCxNrmJKAEJEz aUPA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1764102197; x=1764706997; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=0JpMgD46UuIDmNrqgcRKLqCKR6U3UNIGWYWZqhE2Z4U=; b=gsWS/3pRCREf1kgFsX5BmMEgS8yZvvAQc085/6is/vHjxj/UKLDCe+4KgDFobp39Gt tXVO7mqcTIL+pyumBoTR8gavbi2eV7p44Jq7fi5DC/r7SfQs+BjiPSuMVXRbkH0p+4c6 M05QhCTgbwJkdmtvnowDOlg3wqk+S1Mf6EQc/QxTCHupWm4O5my9vZTECQIG8J2/RWGz KwqYF0Ccdyuj38H+yPmAllfOiFJ9jdh1xE3y70tX9nPJiRwu+T1XGrYi+Uq/q+mjG+1b eJb+OCjX4dxSA/cpytP7SUUEkaBNjE9157gdFpTgupM2+aDFzcdmQhS/MvsR+9USfN2a ToOA== X-Forwarded-Encrypted: i=1; AJvYcCUF+lCCDGfVR3hRVi1yzavpu2TwB4eB/FzMEX4o6s2HZOwTN5AFcdDLlURODQb7pnJ0EE1o6DDpmBN4ymE=@vger.kernel.org X-Gm-Message-State: AOJu0YyjAoV+eCSar327AegCOEOZBJDarLALlQNvR5UUthak1/QvgJZR OQWpcH7vIl68iHh2Bh6HkeBmse2D4oIxUHH8c1QbWMyQNyAgNaoOBftPjYFjtmlOgQA= X-Gm-Gg: ASbGncvuxYazjTWpalQot3fuqCM82E1adUrFOYBjaRI5unkPtkmIfh0duQJ9MsPLCCJ 8/CJHhnHP7OyCk00qhnx2RoxO7HLrz/b0uUfy9CRBabbwn53i6+NRhxz+tABxIzHL4oFqQNh0PS Yxh7wOsbs/nSA8e7WKSlh4jx61/p9EhBM+3L77dERc2sV5O8KWsVkazeqnimIjG1Bt4WdRtIBPv cTf5h1pVYeqc6ehy/UMqEwH+a1MWevL7vVXID7d4oxk5/YjUIPtGN77VdCgFj2ao1RG+te5/XPN rK83ReeWNyyX4MwmE5DGTwf06IapGynW00sKAIunK+dkh/g8lMeP0Q9DBevXwjbuiP6PlNHfng6 L7s1GuMuEqCm+ldOqXUYePVhZaKPZ7iP1pnGDTeuP0xoGMg6m8STSoXZduncuvHVaGjmHmfOjZX gEWA== X-Google-Smtp-Source: AGHT+IENXj3WWuxSs00LXqAuHfYI3+AhT2uJL/d6n0cFPJylFeYFoO5Y66vwjMS+zij0qKLTwkV2mw== X-Received: by 2002:a17:907:1c12:b0:b73:5864:f317 with SMTP id a640c23a62f3a-b767183c9b7mr2101585966b.54.1764102196602; Tue, 25 Nov 2025 12:23:16 -0800 (PST) Received: from localhost ([151.35.128.119]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b7654cefeadsm1688064566b.6.2025.11.25.12.23.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Nov 2025 12:23:16 -0800 (PST) From: Francesco Lavra To: Lorenzo Bianconi , Jonathan Cameron , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Andy Shevchenko Subject: [PATCH v3 6/9] iio: imu: st_lsm6dsx: make event management functions generic Date: Tue, 25 Nov 2025 21:23:04 +0100 Message-Id: <20251125202307.4033346-7-flavra@baylibre.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251125202307.4033346-1-flavra@baylibre.com> References: <20251125202307.4033346-1-flavra@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=11222; i=flavra@baylibre.com; h=from:subject; bh=I2wP8/v8+iTwp/IbXvF+LNCirEJ4rMBvnG2GqyV2YMI=; b=owEB7QES/pANAwAKAe3xO3POlDZfAcsmYgBpJhAEdbr+4Y1eg2Sf/ylUoDZfk6O/zYPXRoNug tM7uHmzKSKJAbMEAAEKAB0WIQSGV4VPlTvcox7DFObt8TtzzpQ2XwUCaSYQBAAKCRDt8TtzzpQ2 X2/KC/95KDN04IWOeUKMCT7l4fuBMeewb3vtr2TTwEypeBSgLUZB0WdY2bMEzr/OUUeDD5SNzQG biiewE42aEWr8W0UxZXB03ORE5wE9OM6uJx06DxiuuoNPkwZwcpZ6A/pgVNhkga0gk4c6ehJumr R+wvA6L2hePUnN668KGG38meZvaOfKKMihV4KzLZSP0IIDD/3eMTNc4RDkLll8znaY0qq3tPDff wWGCuKkTRtH8IUdX1kibP1cfmzVZ5XT+gdJfEZeh2zwoClYdQBzGmgoB1mIM2fu+a7vdH8z07Y2 yH5fZ9Y6g2sFkXYsaaoOYIMVIAjLkCIUDL7pwwQicl7/KjgZp1cdwJSQJuJKMOOxSwZsRjuIouz fJxzgI3HTgJEW29vITmJ/O42cAG+DEe7BIIYNCvznxEWz+eQsbjUU4ASGvigI8YqYz6R3evraOB ysr+dji65MHORieXRq/caVWXElOl28p/OXO+BlJdXYubqoCj0HRgG7MOB5uRhLkTZdomg= X-Developer-Key: i=flavra@baylibre.com; a=openpgp; fpr=8657854F953BDCA31EC314E6EDF13B73CE94365F Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In preparation for adding support for more event types, use an array indexed by event ID instead of a scalar value to store enabled events, and refactor the functions to configure and report events so that their implementation is not specific for wakeup events. Move the logic to update the global event interrupt enable flag from st_lsm6dsx_event_setup() to its calling function, so that it can take into account also event sources different from the source being configured. While changing the signature of the st_lsm6dsx_event_setup() function, opportunistically add the currently unused `axis` parameter, which will be used when adding support for enabling and disabling events on a per axis basis. Signed-off-by: Francesco Lavra Reviewed-by: Andy Shevchenko Acked-by: Lorenzo Bianconi --- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h | 2 +- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c | 150 ++++++++++++++----- 2 files changed, 110 insertions(+), 42 deletions(-) diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h b/drivers/iio/imu/st_l= sm6dsx/st_lsm6dsx.h index b27a833d5107..2aae56b7db0b 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h @@ -445,7 +445,7 @@ struct st_lsm6dsx_hw { u8 sip; =20 u8 irq_routing; - u8 enable_event; + u8 enable_event[ST_LSM6DSX_EVENT_MAX]; =20 u8 *buff; =20 diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu= /st_lsm6dsx/st_lsm6dsx_core.c index dbdf9bb9e258..6dc6cda54d05 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c @@ -1759,11 +1759,16 @@ static int st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sensor) { struct st_lsm6dsx_hw *hw =3D sensor->hw; + int event; =20 if (sensor->id !=3D ST_LSM6DSX_ID_ACC) return 0; =20 - return hw->enable_event; + for (event =3D 0; event < ST_LSM6DSX_EVENT_MAX; event++) { + if (hw->enable_event[event]) + return true; + } + return false; } =20 int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor, @@ -1876,9 +1881,10 @@ static int st_lsm6dsx_write_raw(struct iio_dev *iio_= dev, return err; } =20 -static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, bool state) +static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, + enum st_lsm6dsx_event_id event, int axis, + bool state) { - const struct st_lsm6dsx_reg *reg; const struct st_lsm6dsx_event_src *src; unsigned int data; int err; @@ -1886,22 +1892,24 @@ static int st_lsm6dsx_event_setup(struct st_lsm6dsx= _hw *hw, bool state) if (!hw->irq_routing) return -ENOTSUPP; =20 - reg =3D &hw->settings->event_settings.enable_reg; - if (reg->addr) { - data =3D ST_LSM6DSX_SHIFT_VAL(state, reg->mask); - err =3D st_lsm6dsx_update_bits_locked(hw, reg->addr, - reg->mask, data); - if (err < 0) - return err; - } - - /* Enable wakeup interrupt */ - src =3D &hw->settings->event_settings.sources[ST_LSM6DSX_EVENT_WAKEUP]; + /* Enable/disable event interrupt */ + src =3D &hw->settings->event_settings.sources[event]; data =3D ST_LSM6DSX_SHIFT_VAL(state, src->enable_mask); return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing, src->enable_mask, data); } =20 +static enum st_lsm6dsx_event_id +st_lsm6dsx_get_event_id(enum iio_event_type type) +{ + switch (type) { + case IIO_EV_TYPE_THRESH: + return ST_LSM6DSX_EVENT_WAKEUP; + default: + return ST_LSM6DSX_EVENT_MAX; + } +} + static int st_lsm6dsx_read_event(struct iio_dev *iio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, @@ -1909,16 +1917,17 @@ static int st_lsm6dsx_read_event(struct iio_dev *ii= o_dev, enum iio_event_info info, int *val, int *val2) { + enum st_lsm6dsx_event_id event =3D st_lsm6dsx_get_event_id(type); struct st_lsm6dsx_sensor *sensor =3D iio_priv(iio_dev); struct st_lsm6dsx_hw *hw =3D sensor->hw; const struct st_lsm6dsx_reg *reg; u8 data; int err; =20 - if (type !=3D IIO_EV_TYPE_THRESH) + if (event =3D=3D ST_LSM6DSX_EVENT_MAX) return -EINVAL; =20 - reg =3D &hw->settings->event_settings.sources[ST_LSM6DSX_EVENT_WAKEUP].va= lue; + reg =3D &hw->settings->event_settings.sources[event].value; err =3D st_lsm6dsx_read_locked(hw, reg->addr, &data, sizeof(data)); if (err < 0) return err; @@ -1937,19 +1946,20 @@ st_lsm6dsx_write_event(struct iio_dev *iio_dev, enum iio_event_info info, int val, int val2) { + enum st_lsm6dsx_event_id event =3D st_lsm6dsx_get_event_id(type); struct st_lsm6dsx_sensor *sensor =3D iio_priv(iio_dev); struct st_lsm6dsx_hw *hw =3D sensor->hw; const struct st_lsm6dsx_reg *reg; unsigned int data; int err; =20 - if (type !=3D IIO_EV_TYPE_THRESH) + if (event =3D=3D ST_LSM6DSX_EVENT_MAX) return -EINVAL; =20 if (val < 0 || val > 31) return -EINVAL; =20 - reg =3D &hw->settings->event_settings.sources[ST_LSM6DSX_EVENT_WAKEUP].va= lue; + reg =3D &hw->settings->event_settings.sources[event].value; data =3D ST_LSM6DSX_SHIFT_VAL(val, reg->mask); err =3D st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data); @@ -1965,13 +1975,56 @@ st_lsm6dsx_read_event_config(struct iio_dev *iio_de= v, enum iio_event_type type, enum iio_event_direction dir) { + enum st_lsm6dsx_event_id event =3D st_lsm6dsx_get_event_id(type); struct st_lsm6dsx_sensor *sensor =3D iio_priv(iio_dev); struct st_lsm6dsx_hw *hw =3D sensor->hw; =20 - if (type !=3D IIO_EV_TYPE_THRESH) + if (event =3D=3D ST_LSM6DSX_EVENT_MAX) return -EINVAL; =20 - return !!(hw->enable_event & BIT(chan->channel2)); + return !!(hw->enable_event[event] & BIT(chan->channel2)); +} + +/** + * st_lsm6dsx_check_other_events - Check for enabled sensor events. + * @hw: Sensor hardware instance. + * @curr: Current event type. + * + * Return: whether any events other than @curr are enabled. + */ +static bool st_lsm6dsx_check_other_events(struct st_lsm6dsx_hw *hw, + enum st_lsm6dsx_event_id curr) +{ + enum st_lsm6dsx_event_id other; + + for (other =3D 0; other < ST_LSM6DSX_EVENT_MAX; other++) { + if (other !=3D curr && hw->enable_event[other]) + return true; + } + + return false; +} + +static int st_lsm6dsx_events_enable(struct st_lsm6dsx_sensor *sensor, + bool state) +{ + struct st_lsm6dsx_hw *hw =3D sensor->hw; + const struct st_lsm6dsx_reg *reg; + + reg =3D &hw->settings->event_settings.enable_reg; + if (reg->addr) { + int err; + + err =3D regmap_update_bits(hw->regmap, reg->addr, reg->mask, + ST_LSM6DSX_SHIFT_VAL(state, reg->mask)); + if (err) + return err; + } + + if (state || !(hw->fifo_mask & BIT(sensor->id))) + return __st_lsm6dsx_sensor_set_enable(sensor, state); + + return 0; } =20 static int @@ -1980,22 +2033,23 @@ st_lsm6dsx_write_event_config(struct iio_dev *iio_d= ev, enum iio_event_type type, enum iio_event_direction dir, bool state) { + enum st_lsm6dsx_event_id event =3D st_lsm6dsx_get_event_id(type); struct st_lsm6dsx_sensor *sensor =3D iio_priv(iio_dev); struct st_lsm6dsx_hw *hw =3D sensor->hw; u8 enable_event; int err; =20 - if (type !=3D IIO_EV_TYPE_THRESH) + if (event =3D=3D ST_LSM6DSX_EVENT_MAX) return -EINVAL; =20 if (state) { - enable_event =3D hw->enable_event | BIT(chan->channel2); + enable_event =3D hw->enable_event[event] | BIT(chan->channel2); =20 /* do not enable events if they are already enabled */ - if (hw->enable_event) + if (hw->enable_event[event]) goto out; } else { - enable_event =3D hw->enable_event & ~BIT(chan->channel2); + enable_event =3D hw->enable_event[event] & ~BIT(chan->channel2); =20 /* only turn off sensor if no events is enabled */ if (enable_event) @@ -2003,22 +2057,24 @@ st_lsm6dsx_write_event_config(struct iio_dev *iio_d= ev, } =20 /* stop here if no changes have been made */ - if (hw->enable_event =3D=3D enable_event) + if (hw->enable_event[event] =3D=3D enable_event) return 0; =20 - err =3D st_lsm6dsx_event_setup(hw, state); + err =3D st_lsm6dsx_event_setup(hw, event, chan->channel2, state); if (err < 0) return err; =20 mutex_lock(&hw->conf_lock); - if (enable_event || !(hw->fifo_mask & BIT(sensor->id))) - err =3D __st_lsm6dsx_sensor_set_enable(sensor, state); + if (enable_event) + err =3D st_lsm6dsx_events_enable(sensor, true); + else if (!st_lsm6dsx_check_other_events(hw, event)) + err =3D st_lsm6dsx_events_enable(sensor, false); mutex_unlock(&hw->conf_lock); if (err < 0) return err; =20 out: - hw->enable_event =3D enable_event; + hw->enable_event[event] =3D enable_event; =20 return 0; } @@ -2429,18 +2485,19 @@ static struct iio_dev *st_lsm6dsx_alloc_iiodev(stru= ct st_lsm6dsx_hw *hw, } =20 static bool -st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *hw) +st_lsm6dsx_report_events(struct st_lsm6dsx_hw *hw, enum st_lsm6dsx_event_i= d id, + enum iio_event_type type, enum iio_event_direction dir) { const struct st_lsm6dsx_event_settings *event_settings; const struct st_lsm6dsx_event_src *src; int err, data; s64 timestamp; =20 - if (!hw->enable_event) + if (!hw->enable_event[id]) return false; =20 event_settings =3D &hw->settings->event_settings; - src =3D &event_settings->sources[ST_LSM6DSX_EVENT_WAKEUP]; + src =3D &event_settings->sources[id]; err =3D st_lsm6dsx_read_locked(hw, src->status.addr, &data, sizeof(data)); if (err < 0) @@ -2448,38 +2505,49 @@ st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw= *hw) =20 timestamp =3D iio_get_time_ns(hw->iio_devs[ST_LSM6DSX_ID_ACC]); if ((data & src->status_z_mask) && - (hw->enable_event & BIT(IIO_MOD_Z))) + (hw->enable_event[id] & BIT(IIO_MOD_Z))) iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_Z, - IIO_EV_TYPE_THRESH, - IIO_EV_DIR_EITHER), + type, + dir), timestamp); =20 if ((data & src->status_y_mask) && - (hw->enable_event & BIT(IIO_MOD_Y))) + (hw->enable_event[id] & BIT(IIO_MOD_Y))) iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_Y, - IIO_EV_TYPE_THRESH, - IIO_EV_DIR_EITHER), + type, + dir), timestamp); =20 if ((data & src->status_x_mask) && - (hw->enable_event & BIT(IIO_MOD_X))) + (hw->enable_event[id] & BIT(IIO_MOD_X))) iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X, - IIO_EV_TYPE_THRESH, - IIO_EV_DIR_EITHER), + type, + dir), timestamp); =20 return data & src->status.mask; } =20 +static bool st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *hw) +{ + bool events_found; + + events_found =3D st_lsm6dsx_report_events(hw, ST_LSM6DSX_EVENT_WAKEUP, + IIO_EV_TYPE_THRESH, + IIO_EV_DIR_EITHER); + + return events_found; +} + static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private) { struct st_lsm6dsx_hw *hw =3D private; --=20 2.39.5 From nobody Tue Dec 2 00:04:39 2025 Received: from mail-ej1-f44.google.com (mail-ej1-f44.google.com [209.85.218.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 822C033D6F7 for ; Tue, 25 Nov 2025 20:23:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764102201; cv=none; b=jfSLyl2PinJ2Gzl3jc0/73BJbEkYJobqseTqxvJt4LN0c7tiZW/bf3+L4AdJvBxaKrfJ4vmwkeTwXBRyje8ULiTdwOBgfU4M5kbacU9V/HxsgvURX5SUSkf9wRWxH6+8lLzobt11NjjnmKYTuUB63VrsHLeeFnHW5Nckxi1wjiQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764102201; c=relaxed/simple; bh=gHSJ2ACpil3oUoOrN4nqa6atJKyrIL8QdwCNvpfI3Qk=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=dc42v3qoe5/UjnjiVZ22/5y+iNX1RYSLolsai6wZcHy+QsxNlqrwreu2YUwpgSugteq+6MBX4zS2xYLvifjYAkyWHXBWHEEUjR9c79hUw5jbMlPnYHY3sQZ+4DR1XddtmR4RPOzojwSt2DHC1TeYN7A/8YyyhRy81RdFWvRv1z0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=gXqzApp3; arc=none smtp.client-ip=209.85.218.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="gXqzApp3" Received: by mail-ej1-f44.google.com with SMTP id a640c23a62f3a-b725ead5800so762508766b.1 for ; Tue, 25 Nov 2025 12:23:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1764102198; x=1764706998; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=vZ3KjII7xZFDbQeKyBo731P+isw4m0FcuZQDXssMMvU=; b=gXqzApp3jhpRnUzLKBd+c+xg81L3u+GHUPfVZRwpibLT2CfJPzHo6RlWEifdL9Zg4y RcDIqIGRCp+G26Nk4nT87yQDBsaRLF0bt2LfwnVLCusyjnSyP8vqv8UWmLIcDSLTlIUo bZVZmHvMSoXDb66ffWPXieRPdcoYknTh/YyMDyMRqB7TXTFOQ+9N3StYxeKBqTjeF3T8 zAnUgqUYm0+WjznUn+gnqfTOVYzpR0NlCkmvYxvvcM9KqkwlBp7BeX1qdXEFH4nkAlU8 OM15Yxxxmijp8RumPniKQe4cYOeiF4/JBTjJtE4s+Jx6CV9leling45Rm9t68FCnIIFW yndw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1764102198; x=1764706998; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=vZ3KjII7xZFDbQeKyBo731P+isw4m0FcuZQDXssMMvU=; b=OhWW31DiIyF0ojylPubfbRf6ZpgC1m1NUfa8jpNzfqnJVlwLSh6GmFu54DPPGR7itr Z1ASNfRPLUEHxmMYHSsAHKaGkgrl//6Rlks0yMLfbedeGuS4FhFOdtPr+sjz0bgkbeKL TlzooH4buXk5XRloi4ZG3nUSuoUkvUk9xGYxNTIwuvmmss8g/v5lZQucPN00XYpdkR9d aQ49/U7BGyQiqOBxiYSN2Ln+sENHN076bhGFYQ8G/8ndGJs3i/FrK8zDmphc4O8a5tYJ QueJvRgSk2+QdvZOGVsYJsfi6dm/ZNmIuUDSOtx+/5z5fXnrXN7GqfYMpCPN0YsAsStc LGvw== X-Forwarded-Encrypted: i=1; AJvYcCUjCYqlUSy8Nii6mNgxo/z8+TvcSS7nFXKu+ZIjKjUDvTZoqfg29n0ozZenHOGnYO9NnmG93BQCKWRkU2k=@vger.kernel.org X-Gm-Message-State: AOJu0YyB4bNCsArdaZ/g+c4XA7JlZbL1kdg+8rgw2B2rKG3o0J8tBDQt 31AIVWbvWVz2INaI0t30Sy254kcyOuzmfMJ8/bqc2SJqe8+CAwylfKBtWUst92Oh9uE= X-Gm-Gg: ASbGncsgWP9Y0bUkMIHha/UpeLL83IrwyqHv2LuXk4fs5Fc6tw3/ScxyKaP0mHLs/zq 1O5xD5OLGkfYWczEECzyaU4z3ytRsr6E5+BkveaX7u/GYdbgVGEa2DvhiIf8uTntnIE9nhDOtWs ljtvtpSVU9YO+8/K+Spt1XlMlhpNRawkQ9dM7QhLqTOVQjszbLcbO8H98ngSvfy8qw6gU3AWKgs XNqLUeR0mAKpFn1oSTPoTNKfz6BBVX+n0cGVO1jUMibxVYjW5oL9+7XPRsUCtsjotILm4Wv3FGS 2wAcZsY7fJ2GOLsHKA6CcjZ8n3Vo8c7Y2s0Fe1H20QIZ9aBpMu3mLh85zOrPL/7c1GquzRm/rzR VUQqT2hCHniqU88Hya1HumFplJqXPeqwZ0anEcRspSF1wQ4WaX7o8mP8iPQ== X-Google-Smtp-Source: AGHT+IFlmccSpoREOSIViih01/Pl1YGQquFBeoydLee+4dk/jLLZRnkDI96o5RM1J6u6zey3yzyV/g== X-Received: by 2002:a17:907:7ba1:b0:b73:870f:fa37 with SMTP id a640c23a62f3a-b76c53c0113mr482544466b.17.1764102197785; Tue, 25 Nov 2025 12:23:17 -0800 (PST) Received: from localhost ([151.35.128.119]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b7654fd43a6sm1637193266b.32.2025.11.25.12.23.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Nov 2025 12:23:17 -0800 (PST) From: Francesco Lavra To: Lorenzo Bianconi , Jonathan Cameron , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 7/9] iio: imu: st_lsm6dsx: add event configurability on a per axis basis Date: Tue, 25 Nov 2025 21:23:05 +0100 Message-Id: <20251125202307.4033346-8-flavra@baylibre.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251125202307.4033346-1-flavra@baylibre.com> References: <20251125202307.4033346-1-flavra@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=5627; i=flavra@baylibre.com; h=from:subject; bh=gHSJ2ACpil3oUoOrN4nqa6atJKyrIL8QdwCNvpfI3Qk=; b=owEB7QES/pANAwAKAe3xO3POlDZfAcsmYgBpJhAEB75tQqC/WkBF5miDejQQrZ2AjaoCKO7aX bDty5S4JpmJAbMEAAEKAB0WIQSGV4VPlTvcox7DFObt8TtzzpQ2XwUCaSYQBAAKCRDt8TtzzpQ2 X1B4C/4spJl2I7rRU/UjeSAH7mntFxJiXC3jnYIopFbUoyKqnszNdeygqXsHN2hO98hjlXZGIeA jv1L7bhwhu1KFCC9sUKe2wjjYdxdwIniC+Lg+WxDxQgbmm/YAsdL/PCVRkY5jzh+jC28XyTwZtR itT05l8EFZgK2zHH9cCDCeSWzCZxe4psvFnURrwqcRj+TpweIhlljUYcNEdtmjw3aBFxfceEnIX 5+Kmpr155YddDOSBFjwnqHXytO07O2OpGP/25mgZvFt3CeVaChV0iTqMRZCEGNn0gTyLlDQbJb1 N7aVlmJKW5e0sMa/X3xtGZp2S92ccNeJ8H/HD9vGFxNWgKxcgfJ6PuwkA5e8OX5QVztoaDwpF3m yeJqsYEROgi9oqQGB+eK6uoY3004dYSCNA+NrgQZpgj3zX8roeHlyq1+t8Iv9K6mXbT36EvnqWS UtQqqMqs9iosMPZTVJXvHMsA+M/pjUVSrAatQGk0A/nGBKDmNBqSKh52036Kzmmqg+AeA= X-Developer-Key: i=flavra@baylibre.com; a=openpgp; fpr=8657854F953BDCA31EC314E6EDF13B73CE94365F Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In order to be able to configure event detection on a per axis basis (for either setting an event threshold/sensitivity value, or enabling/disabling event detection), add new axis-specific fields to struct st_lsm6dsx_event_src, and modify the logic that handles event configuration to properly handle axis-specific settings when supported by a given event source. A future commit will add actual event sources with per-axis configurability. Signed-off-by: Francesco Lavra --- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h | 7 ++ drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c | 95 +++++++++++++++++--- 2 files changed, 88 insertions(+), 14 deletions(-) diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h b/drivers/iio/imu/st_l= sm6dsx/st_lsm6dsx.h index 2aae56b7db0b..515aadbee3a4 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h @@ -250,7 +250,14 @@ enum st_lsm6dsx_event_id { =20 struct st_lsm6dsx_event_src { struct st_lsm6dsx_reg value; + struct st_lsm6dsx_reg x_value; + struct st_lsm6dsx_reg y_value; + struct st_lsm6dsx_reg z_value; u8 enable_mask; + u8 enable_axis_reg; + u8 enable_x_mask; + u8 enable_y_mask; + u8 enable_z_mask; struct st_lsm6dsx_reg status; u8 status_x_mask; u8 status_y_mask; diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu= /st_lsm6dsx/st_lsm6dsx_core.c index 6dc6cda54d05..50c00dd38c63 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c @@ -1888,12 +1888,50 @@ static int st_lsm6dsx_event_setup(struct st_lsm6dsx= _hw *hw, const struct st_lsm6dsx_event_src *src; unsigned int data; int err; + u8 old_enable, new_enable; =20 if (!hw->irq_routing) return -ENOTSUPP; =20 /* Enable/disable event interrupt */ src =3D &hw->settings->event_settings.sources[event]; + if (src->enable_axis_reg) { + u8 enable_mask; + + switch (axis) { + case IIO_MOD_X: + enable_mask =3D src->enable_x_mask; + break; + case IIO_MOD_Y: + enable_mask =3D src->enable_y_mask; + break; + case IIO_MOD_Z: + enable_mask =3D src->enable_z_mask; + break; + default: + enable_mask =3D 0; + } + if (enable_mask) { + data =3D ST_LSM6DSX_SHIFT_VAL(state, enable_mask); + err =3D st_lsm6dsx_update_bits_locked(hw, + src->enable_axis_reg, + enable_mask, data); + if (err < 0) + return err; + } + } + + /* + * If the set of axes for which the event source is enabled does not + * change from empty to non-empty or vice versa, there is nothing else + * to do. + */ + old_enable =3D hw->enable_event[event]; + new_enable =3D state ? (old_enable | BIT(axis)) : + (old_enable & ~BIT(axis)); + if (!!old_enable =3D=3D !!new_enable) + return 0; + data =3D ST_LSM6DSX_SHIFT_VAL(state, src->enable_mask); return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing, src->enable_mask, data); @@ -1910,6 +1948,39 @@ st_lsm6dsx_get_event_id(enum iio_event_type type) } } =20 +static const struct st_lsm6dsx_reg * +st_lsm6dsx_get_event_reg(struct st_lsm6dsx_hw *hw, + enum st_lsm6dsx_event_id event, + const struct iio_chan_spec *chan) +{ + const struct st_lsm6dsx_event_src *src; + const struct st_lsm6dsx_reg *reg; + + src =3D &hw->settings->event_settings.sources[event]; + switch (chan->channel2) { + case IIO_MOD_X: + reg =3D &src->x_value; + break; + case IIO_MOD_Y: + reg =3D &src->y_value; + break; + case IIO_MOD_Z: + reg =3D &src->z_value; + break; + default: + return NULL; + } + if (reg->addr) + return reg; + + /* + * The sensor does not support configuring this event source on a per + * axis basis: return the register to configure the event source for all + * axes. + */ + return &src->value; +} + static int st_lsm6dsx_read_event(struct iio_dev *iio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, @@ -1927,7 +1998,10 @@ static int st_lsm6dsx_read_event(struct iio_dev *iio= _dev, if (event =3D=3D ST_LSM6DSX_EVENT_MAX) return -EINVAL; =20 - reg =3D &hw->settings->event_settings.sources[event].value; + reg =3D st_lsm6dsx_get_event_reg(hw, event, chan); + if (!reg) + return -EINVAL; + err =3D st_lsm6dsx_read_locked(hw, reg->addr, &data, sizeof(data)); if (err < 0) return err; @@ -1959,7 +2033,10 @@ st_lsm6dsx_write_event(struct iio_dev *iio_dev, if (val < 0 || val > 31) return -EINVAL; =20 - reg =3D &hw->settings->event_settings.sources[event].value; + reg =3D st_lsm6dsx_get_event_reg(hw, event, chan); + if (!reg) + return -EINVAL; + data =3D ST_LSM6DSX_SHIFT_VAL(val, reg->mask); err =3D st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data); @@ -2042,20 +2119,11 @@ st_lsm6dsx_write_event_config(struct iio_dev *iio_d= ev, if (event =3D=3D ST_LSM6DSX_EVENT_MAX) return -EINVAL; =20 - if (state) { + if (state) enable_event =3D hw->enable_event[event] | BIT(chan->channel2); - - /* do not enable events if they are already enabled */ - if (hw->enable_event[event]) - goto out; - } else { + else enable_event =3D hw->enable_event[event] & ~BIT(chan->channel2); =20 - /* only turn off sensor if no events is enabled */ - if (enable_event) - goto out; - } - /* stop here if no changes have been made */ if (hw->enable_event[event] =3D=3D enable_event) return 0; @@ -2073,7 +2141,6 @@ st_lsm6dsx_write_event_config(struct iio_dev *iio_dev, if (err < 0) return err; =20 -out: hw->enable_event[event] =3D enable_event; =20 return 0; --=20 2.39.5 From nobody Tue Dec 2 00:04:39 2025 Received: from mail-ej1-f46.google.com (mail-ej1-f46.google.com [209.85.218.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4480933E360 for ; Tue, 25 Nov 2025 20:23:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764102203; cv=none; b=I3uiSAFDHXIj2qSZHhMhMcMfmZ1c8f2gc1nl7KESFqcgfLNaypeFkxoL7HzZAgacxzX73L5ixj+zGbODL/1Xr1DOKRzIiXvkmoOJrYHK8aU07Ap92tZMyiPTWjHSpu0OqohJl3TelNd3YqJGlZ7BTmmw0Pszx4VxJsPZMshppMA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764102203; c=relaxed/simple; bh=+yEIVJzieMNN3BK0oO0ggXwrklmeKk9Pp005zecyGqI=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=XtOP7acd9wYj+AachnzqkGFdYq3jAaQMnf/7LMJaPOu4+IZ7cNXMOOPJ70F0jhfkD3+N2KsqiYbiTx4VBXj0pNr/9WaAFYa8/SbVpb/VyRGg2kx2E0uelt/BU+JMQWc08TwMMkQGgbfc1092LlXWY24PzqjdTBUaYecQohRxzH4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=numLU+sJ; arc=none smtp.client-ip=209.85.218.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="numLU+sJ" Received: by mail-ej1-f46.google.com with SMTP id a640c23a62f3a-b735e278fa1so592752366b.0 for ; Tue, 25 Nov 2025 12:23:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1764102199; x=1764706999; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Ct6sb05LrGdG35kWjT5xVBetVUNfjUJeA8bNs4BtvO4=; b=numLU+sJ3XQgk9x5PX0xuZ/xRMiJQqwOO2qSyZY8hXXSDOlzXwxdaw106lfJNCpumz 9wEH7NK+qLnsjCQ6GGmvT1BpOKhWGPed+LI+VViy2b//xkZIbpr9cHji091cooOY5wde uZaH09bSmGBuaWoPv6hkVzLmfQNYke3GJ/ey7HB2DmvmAChdCjF1qaIFoAA0T0H1vImR wzR2M+rkH6p6P/SW4LvDKkHcOMgUaCcV4mErDnpCOu5EwZqtTu+rlMPV3nIM4r4Z4BRO Ed3G+e/oVGJ3mDcKMpRfahYjq3NcJjq3wwv6UnAKJkUxuOBsS9xZj3uGHRRPNVvouggr Nu+A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1764102199; x=1764706999; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=Ct6sb05LrGdG35kWjT5xVBetVUNfjUJeA8bNs4BtvO4=; b=aD5OprHjjZ4NYcyCmIOcnQk1HDO5lZwCw6q/oFR0IxSPVcHzeroYaXdi3GrLkwFhWD KCsyObXfLXlalYEGav8+kqMh6ddz4XdJKi8BxTJ+4mfyv6xZVgApFZStF7Qyl5hz+3/d V1LRJOifbjUQnahimG0Y0ZFy0XJmZ9BhGquwCAljv/dJV48kWh8DvcLtovpC2/ZzjYRG d4HHlXXN+rXz7QRpaYtysNXdbSKBLLRQgnSkWgALWm0jqXDVgXEnHTrIUNU2ORKI585N NrklrqP6sZ5X9RnKTt2oB9Ixu3G3CzdQACjOn0QR822Bn23zuhNc3qWzDMGW/b9aPKPP YUlA== X-Forwarded-Encrypted: i=1; AJvYcCVN4B17tme+0Knw4l98r6CgJ2HlVIp5Ub61ZOXfgsmhlc7fAHkrqU4fcTd5dTpmEakrNYyXQGwz7wiuTWA=@vger.kernel.org X-Gm-Message-State: AOJu0YwWkV2dKHxlQwhfy+BKwWcjbn3SFPy2WMdk9GOvqVVn+Uj2xU6h nBUUP4NaAd0N3gSKxtcCVPjjoJpCoM/kpeTbjaai3Kf6WpN2BJSVyYJ5BUlKFN0XiVE= X-Gm-Gg: ASbGncvfOazz+dvTq9NshztDeCmfm24kc8C4b3pvHVeIg77YKbugSOjSGXB5VEvc/6J fzSTR7kqfQ8nUDFEBAN6tNhvW+5ooPV40yEd3gTQqxBft3I0jTvHvBS8qj+ZVLqHTCf0VEW5t4A TSFOtxwq51h3JfvJ4i6IY7SiyC1+jPC/PGx3NkPH07IdWpi8hRqw5jrUhTmzku8TLQfL6yrasRj LpPZqkdFUR5bkpRHn6H7EEERGAwGOoxbyewAuDztjT60wcNmeY1d2VCslqG2X5vtZXIw0L+YQob UsiJ8y1At+lwJqtubfJgB6tLTCNsb9SKiewsyQ7YsAJ+zQYoppOJGM7ScH6HDyxqc/bAWjLvg4k UHVSB+VmojwHTxNM6o9amoWaJHu1rDU9iwnBOdIgm4yVvepsAAZ3fQd/okTXT7htzurdXxN6ozj 0o1w== X-Google-Smtp-Source: AGHT+IEPXN/3aH0SDRPJ34SLeDgj9tjUAdB0XJS44lgwKIBRismZE5PyWIu21QHEMFdvrmwabm/fhg== X-Received: by 2002:a17:906:478f:b0:b70:b71a:a5ae with SMTP id a640c23a62f3a-b76c5638e3bmr424243666b.44.1764102199500; Tue, 25 Nov 2025 12:23:19 -0800 (PST) Received: from localhost ([151.35.128.119]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b7654fd51fbsm1624922566b.33.2025.11.25.12.23.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Nov 2025 12:23:19 -0800 (PST) From: Francesco Lavra To: Lorenzo Bianconi , Jonathan Cameron , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Andy Shevchenko Subject: [PATCH v3 8/9] iio: imu: st_lsm6dsx: add event spec parameter to iio_chan_spec initializer Date: Tue, 25 Nov 2025 21:23:06 +0100 Message-Id: <20251125202307.4033346-9-flavra@baylibre.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251125202307.4033346-1-flavra@baylibre.com> References: <20251125202307.4033346-1-flavra@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3543; i=flavra@baylibre.com; h=from:subject; bh=+yEIVJzieMNN3BK0oO0ggXwrklmeKk9Pp005zecyGqI=; b=owEB7QES/pANAwAKAe3xO3POlDZfAcsmYgBpJhAF+du2P16uOu3xIsJexN7PVLLDLYbnFIEPY CTla3v4jaGJAbMEAAEKAB0WIQSGV4VPlTvcox7DFObt8TtzzpQ2XwUCaSYQBQAKCRDt8TtzzpQ2 X4h9C/9Zu6Om1iIpCSOq1OHj+SMuFPohmjhdMYIvxkjlDskgghJKeAIXaqQJefP3uyKzEtEopFJ XP7QtiEY+9mwYgdiamRJ3F9s6BlwQCJtBegkFK34VaXYVVJVeoOaX6HnEwJ1841VWWddfVjDDCH jdbipvZfLsvzEZaP74/mgEnUZHRiI+SArjCvbr/tQiUUxuMc+M4edBWowvuN9UqQ8hDa+mO8HYk r4uQ4VEFS8e08KoONTe+IL2NYYcHkGqJEXqskOKZUYmF3Uu+X6rFcmwyE5fnTEd0LstrKwa0ay2 Htc/oUFX5ZSCY7+nsNOoxNPo4Yxb3P3NkWJ9jwRZASjOzzXR93hfZynKpPv8nam/ccAoo+sK9Nl 3XACkYKpqlVrb5hFYGiMs+l0eBtXBjnI7K4iR69E8cWtxWAZupTS3aZEV8yfD2fHimcLs2GiqL8 cCVo+M0DaaQU4s5kGHqQfaTICEwtGRH55P8azo39a3CuoUmYJcyhj35DcRHbTUQirv6jQ= X-Developer-Key: i=flavra@baylibre.com; a=openpgp; fpr=8657854F953BDCA31EC314E6EDF13B73CE94365F Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In preparation for adding support for more event sources, add to the ST_LSM6DSX_CHANNEL_ACC() iio_chan_spec initializer macro an iio_event_spec array argument, so that this macro can be used with different arrays by sensors that support different event sources; change the st_lsm6dsx_event struct declaration to an array (renamed as st_lsm6dsx_ev_motion) so that it can be passed to the macro (and opportunistically move it from the header file where it does not belong to the C file where it is used). In addition, remove from this macro the channel type parameter and hard-code IIO_ACCEL in the macro definition, since all callers use IIO_ACCEL as channel type argument. Signed-off-by: Francesco Lavra Reviewed-by: Andy Shevchenko --- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h | 15 ++++----------- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c | 15 ++++++++++++--- 2 files changed, 16 insertions(+), 14 deletions(-) diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h b/drivers/iio/imu/st_l= sm6dsx/st_lsm6dsx.h index 515aadbee3a4..3edff8456a8f 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h @@ -81,9 +81,9 @@ enum st_lsm6dsx_hw_id { #define ST_LSM6DSX_SHIFT_VAL(val, mask) (((val) << __ffs(mask)) & (mask)) #define st_lsm6dsx_field_get(mask, reg) ((reg & mask) >> __ffs(mask)) =20 -#define ST_LSM6DSX_CHANNEL_ACC(chan_type, addr, mod, scan_idx) \ +#define ST_LSM6DSX_CHANNEL_ACC(addr, mod, scan_idx, events) \ { \ - .type =3D chan_type, \ + .type =3D IIO_ACCEL, \ .address =3D addr, \ .modified =3D 1, \ .channel2 =3D mod, \ @@ -97,9 +97,9 @@ enum st_lsm6dsx_hw_id { .storagebits =3D 16, \ .endianness =3D IIO_LE, \ }, \ - .event_spec =3D &st_lsm6dsx_event, \ + .event_spec =3D events, \ + .num_event_specs =3D ARRAY_SIZE(events), \ .ext_info =3D st_lsm6dsx_ext_info, \ - .num_event_specs =3D 1, \ } =20 #define ST_LSM6DSX_CHANNEL(chan_type, addr, mod, scan_idx) \ @@ -468,13 +468,6 @@ struct st_lsm6dsx_hw { } scan[ST_LSM6DSX_ID_MAX]; }; =20 -static __maybe_unused const struct iio_event_spec st_lsm6dsx_event =3D { - .type =3D IIO_EV_TYPE_THRESH, - .dir =3D IIO_EV_DIR_EITHER, - .mask_separate =3D BIT(IIO_EV_INFO_VALUE) | - BIT(IIO_EV_INFO_ENABLE) -}; - static __maybe_unused const unsigned long st_lsm6dsx_available_scan_masks[= ] =3D { 0x7, 0x0, }; diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu= /st_lsm6dsx/st_lsm6dsx_core.c index 50c00dd38c63..e1eb64a5b10d 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c @@ -96,10 +96,19 @@ =20 #define ST_LSM6DSX_TS_SENSITIVITY 25000UL /* 25us */ =20 +static const struct iio_event_spec st_lsm6dsx_ev_motion[] =3D { + { + .type =3D IIO_EV_TYPE_THRESH, + .dir =3D IIO_EV_DIR_EITHER, + .mask_separate =3D BIT(IIO_EV_INFO_VALUE) | + BIT(IIO_EV_INFO_ENABLE), + }, +}; + static const struct iio_chan_spec st_lsm6dsx_acc_channels[] =3D { - ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x28, IIO_MOD_X, 0), - ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1), - ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2), + ST_LSM6DSX_CHANNEL_ACC(0x28, IIO_MOD_X, 0, st_lsm6dsx_ev_motion), + ST_LSM6DSX_CHANNEL_ACC(0x2a, IIO_MOD_Y, 1, st_lsm6dsx_ev_motion), + ST_LSM6DSX_CHANNEL_ACC(0x2c, IIO_MOD_Z, 2, st_lsm6dsx_ev_motion), IIO_CHAN_SOFT_TIMESTAMP(3), }; =20 --=20 2.39.5 From nobody Tue Dec 2 00:04:39 2025 Received: from mail-ed1-f51.google.com (mail-ed1-f51.google.com [209.85.208.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5D92533EAFC for ; Tue, 25 Nov 2025 20:23:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764102204; cv=none; b=BtvY3w+Hx+l8rduXzO9rKaTyUngXMb99MTZ8VRJSV3v8KYnlgxEjWQZcj5Pc10aWfWC/2mJWn0xf5EhG75kAJs7kV+nmQOIZmaeWjBOagGmC3aHfv/t1z6hbzQc5FP8NTHe5q0B163JpC9bLfID2P4VmcpY/3FQnjLV5V8hsuuM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764102204; c=relaxed/simple; bh=fPKQq9VW/0IRfnIwOJhKfq8568r/UARLM1IVoAPX3D0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Qk6hlRy/NQGg8mGh6MGk80M/Xe0cOBR2LZws4BTFLM5j+QPc70OJaJQQ8Z7WjVU30w4cLRgmDADDxvecdd2tEsTk8eC78ISBhiNF43ZMN0I6F8z6BuzGgSDCgyIgVHlPEqYYvIyVE0zP5kwSlgx/GG0+gVHRJnApra+FUkvR91s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=klVG/I8J; arc=none smtp.client-ip=209.85.208.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="klVG/I8J" Received: by mail-ed1-f51.google.com with SMTP id 4fb4d7f45d1cf-641977dc00fso8553499a12.1 for ; Tue, 25 Nov 2025 12:23:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1764102201; x=1764707001; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Lu3VlZP+h+37IpIE5wmYW7UTzGfSy7LB4iu6rGw2cJQ=; b=klVG/I8J48rmDVma7mgOYkNsiq85wqSx9V1Uf0GPpvl/fkbpA0jvll0y5V52lT/E5A Q8PQS9CjVM14viE+sgJiIklKmNkiVOMkKrJachUWP5fHNumEP90P9vOQk5nlWf/FUArE /V2WAIDykOhUWmTrFqrNZJyod22f9NNHU7gthpdLnWb1jVzgEsWBCnjDdEx1UlS9NRq6 xXh7xo1zYFNQFs7tKC28tYFWixoaa0GjHepSfvZ2lqewJ3BODkEeL6RzOJeuTgNJ8m3J WRyL3YzlT6lSUBJs9/8YthLb0j+IEc/n2ApDH62mVE2hkvPYSpI9m5+8vY+z6AbnhYZ5 agTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1764102201; x=1764707001; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=Lu3VlZP+h+37IpIE5wmYW7UTzGfSy7LB4iu6rGw2cJQ=; b=i5uLzI1lWOu+oMSg+NVoV0JmLaXwaK+JuII4BeDKCy7w76LrcoZUz3HUx5Eq3l96RD wMwN+Zg5yS/wzfKUdzuvpxZFCh3cwX+LJoXwMdYnA/w+7PB9D+QLqGwzcjeEYajh/G+j YZcPVMedmK8mAam3etLRsC6J0EMwMHbcewe2DkNxy+eIqbH2DPl098JK6GzMRFCN9LQp ynknbS4eKKO3JtaXEtW3V7EpFYWWjhO1qngcfdBL5Z5tx2X7dI/eirTQzJLd6yfkFNua 95rH4DnILwTMJ2PIowSpPZy3LtKMZlm97rxGn1h3R1r654Ng5Y1njkjkG/is9XyvKjhT F00Q== X-Forwarded-Encrypted: i=1; AJvYcCUWzJYW/Cx9K5QBrNYhIgzAruF+/Gs9ZvvEXfDyJ0fvv5yR70q3ateoOssac8Tn/fBGe9It09JO6jDLilo=@vger.kernel.org X-Gm-Message-State: AOJu0Yx0RF5Zv9MGIRixnUuhREJjjXhsMdP7IOgJeGBLTU7Lc9krG8p+ YRxfb1qmIhpHRTrI5pHajek7QA7X6G3KccAZeOzMM9V1Vyr+lC6ejf+Nwa+8dKz7S+k= X-Gm-Gg: ASbGncskRb3DSoM5MTOoTVRmntrV+y1+v7V/2Btd/kCim3FbjmIlwYqnVYEEQLL6YOM /CmYU6IA4LKXWZi9Nq3OlvxT7Lzn7RKDYHunZaT78DRRbp7omiw5+i3WtSf6gV2Lyo+GOpve9c9 F0/AXYe2fVVT1sd5cDb61Cgpz6Fb62vDO0xhI2rlxhVVL27J6bvWfu3iI8O/+xPpjYv7IeZeEbv b8IEq1QLsWRWW3374FWpuMu+DQLuosEp0sirtOMdUfrSXvtSi+i4E1t6Wu2Oxg56fBqp5R3GyDi VRkdljhyjOQtPD8hQIB78LZDWHjcMKeUILYy914pe4MzdeTT8PoRrHiY+D3N/9Ca4/lJuS0v7Ep UudXQinZfV60Yu2LLUk3JDUk7M7jB0QRXy9aez5agqyk4e/DjshazHZUOAkvSnFO/iiGJhLWmRK 8F3A== X-Google-Smtp-Source: AGHT+IFFxu6lRPjOwtB3ddihvruy9A2yx5MCC3G4mEdVQ/CR9Ep4cTGk5NZUtjWETohOzfRwr+REtg== X-Received: by 2002:a05:6402:1ed2:b0:643:83f3:1b9f with SMTP id 4fb4d7f45d1cf-64554691819mr14495817a12.31.1764102200752; Tue, 25 Nov 2025 12:23:20 -0800 (PST) Received: from localhost ([151.35.128.119]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6453645f2easm15731147a12.33.2025.11.25.12.23.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Nov 2025 12:23:20 -0800 (PST) From: Francesco Lavra To: Lorenzo Bianconi , Jonathan Cameron , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Andy Shevchenko Subject: [PATCH v3 9/9] iio: imu: st_lsm6dsx: add tap event detection Date: Tue, 25 Nov 2025 21:23:07 +0100 Message-Id: <20251125202307.4033346-10-flavra@baylibre.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251125202307.4033346-1-flavra@baylibre.com> References: <20251125202307.4033346-1-flavra@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4582; i=flavra@baylibre.com; h=from:subject; bh=fPKQq9VW/0IRfnIwOJhKfq8568r/UARLM1IVoAPX3D0=; b=owEB7QES/pANAwAKAe3xO3POlDZfAcsmYgBpJhAFZUzSspl8rRCYGkd5xsAkHOgNqFIknAJX5 kQzb/3nSQKJAbMEAAEKAB0WIQSGV4VPlTvcox7DFObt8TtzzpQ2XwUCaSYQBQAKCRDt8TtzzpQ2 X8t/C/4+/yYGE6L2EJTqkqd4ZyypsfHo7VvWgFUuRkdZza9w4bvvl3uILk/YLonmqEFjOzeZiLg 2SJuhH0a4qnupHzwbb+kRDb6s/ANpZsnIryv0hlDIg4gXDY/NwG/VOcVsTVHRNDO+DasHBsEes4 KE6G1SjeV4GWedbvHvR1Nx3rrrnYZJgtyw0WPHwNsSzt9ACzAKatxjn7JA0Jzdgrb7jIT13jJW4 UNsTI6QuX8V4LMohiJq5ic3Z0XetjWZbq+AgYqm4qRbHZg6wGkDQm1MdlkdbaZ9qvpai9w6Z0vN LavEZLH0s8Mg+Q0AAswiVOt4s37J5UzzlDhTPFj3gSPp+uZqGhC6mFoAlo/ppy1AvMuSxJaJjrR Hzf2JgW/8kinPTNMFpo+I8hLU4pyZha1cajGqlbi7jsxSRTfL0MMlDiBkoFl5qNRgwBomyWReof aY42YJXGyaLkSl+r0ChKm2IhLUp8QXdqURB9tYslmuAIscaro3ShrOAM09m1LfGxKMzpg= X-Developer-Key: i=flavra@baylibre.com; a=openpgp; fpr=8657854F953BDCA31EC314E6EDF13B73CE94365F Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In order to allow sensors to advertise tap event capability and report tap events, define a new struct iio_event_spec array that includes a tap event spec, and a new struct iio_chan_spec array that references the new iio_event_spec array; for the LSM6DSV chip family, use the new iio_chan_spec array and define an event source for tap events. Tested on LSMDSV16X. Signed-off-by: Francesco Lavra Reviewed-by: Andy Shevchenko Acked-by: Lorenzo Bianconi --- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h | 1 + drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c | 57 +++++++++++++++++++- 2 files changed, 56 insertions(+), 2 deletions(-) diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h b/drivers/iio/imu/st_l= sm6dsx/st_lsm6dsx.h index 3edff8456a8f..957dae73e13d 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h @@ -245,6 +245,7 @@ struct st_lsm6dsx_shub_settings { =20 enum st_lsm6dsx_event_id { ST_LSM6DSX_EVENT_WAKEUP, + ST_LSM6DSX_EVENT_TAP, ST_LSM6DSX_EVENT_MAX }; =20 diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu= /st_lsm6dsx/st_lsm6dsx_core.c index e1eb64a5b10d..1c70d8d80541 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c @@ -105,6 +105,21 @@ static const struct iio_event_spec st_lsm6dsx_ev_motio= n[] =3D { }, }; =20 +static const struct iio_event_spec st_lsm6dsx_ev_motion_tap[] =3D { + { + .type =3D IIO_EV_TYPE_THRESH, + .dir =3D IIO_EV_DIR_EITHER, + .mask_separate =3D BIT(IIO_EV_INFO_VALUE) | + BIT(IIO_EV_INFO_ENABLE), + }, + { + .type =3D IIO_EV_TYPE_GESTURE, + .dir =3D IIO_EV_DIR_SINGLETAP, + .mask_separate =3D BIT(IIO_EV_INFO_VALUE) | + BIT(IIO_EV_INFO_ENABLE), + }, +}; + static const struct iio_chan_spec st_lsm6dsx_acc_channels[] =3D { ST_LSM6DSX_CHANNEL_ACC(0x28, IIO_MOD_X, 0, st_lsm6dsx_ev_motion), ST_LSM6DSX_CHANNEL_ACC(0x2a, IIO_MOD_Y, 1, st_lsm6dsx_ev_motion), @@ -119,6 +134,13 @@ static const struct iio_chan_spec st_lsm6ds0_acc_chann= els[] =3D { IIO_CHAN_SOFT_TIMESTAMP(3), }; =20 +static const struct iio_chan_spec st_lsm6dsx_acc_tap_channels[] =3D { + ST_LSM6DSX_CHANNEL_ACC(0x28, IIO_MOD_X, 0, st_lsm6dsx_ev_motion_tap), + ST_LSM6DSX_CHANNEL_ACC(0x2a, IIO_MOD_Y, 1, st_lsm6dsx_ev_motion_tap), + ST_LSM6DSX_CHANNEL_ACC(0x2c, IIO_MOD_Z, 2, st_lsm6dsx_ev_motion_tap), + IIO_CHAN_SOFT_TIMESTAMP(3), +}; + static const struct iio_chan_spec st_lsm6dsx_gyro_channels[] =3D { ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x22, IIO_MOD_X, 0), ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x24, IIO_MOD_Y, 1), @@ -1260,8 +1282,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_se= nsor_settings[] =3D { }, .channels =3D { [ST_LSM6DSX_ID_ACC] =3D { - .chan =3D st_lsm6dsx_acc_channels, - .len =3D ARRAY_SIZE(st_lsm6dsx_acc_channels), + .chan =3D st_lsm6dsx_acc_tap_channels, + .len =3D ARRAY_SIZE(st_lsm6dsx_acc_tap_channels), }, [ST_LSM6DSX_ID_GYRO] =3D { .chan =3D st_lsm6dsx_gyro_channels, @@ -1438,6 +1460,32 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_s= ensor_settings[] =3D { .status_y_mask =3D BIT(1), .status_x_mask =3D BIT(2), }, + [ST_LSM6DSX_EVENT_TAP] =3D { + .x_value =3D { + .addr =3D 0x57, + .mask =3D GENMASK(4, 0), + }, + .y_value =3D { + .addr =3D 0x58, + .mask =3D GENMASK(4, 0), + }, + .z_value =3D { + .addr =3D 0x59, + .mask =3D GENMASK(4, 0), + }, + .enable_mask =3D BIT(6), + .enable_axis_reg =3D 0x56, + .enable_x_mask =3D BIT(3), + .enable_y_mask =3D BIT(2), + .enable_z_mask =3D BIT(1), + .status =3D { + .addr =3D 0x46, + .mask =3D BIT(5), + }, + .status_x_mask =3D BIT(2), + .status_y_mask =3D BIT(1), + .status_z_mask =3D BIT(0), + }, }, }, }, @@ -1952,6 +2000,8 @@ st_lsm6dsx_get_event_id(enum iio_event_type type) switch (type) { case IIO_EV_TYPE_THRESH: return ST_LSM6DSX_EVENT_WAKEUP; + case IIO_EV_TYPE_GESTURE: + return ST_LSM6DSX_EVENT_TAP; default: return ST_LSM6DSX_EVENT_MAX; } @@ -2620,6 +2670,9 @@ static bool st_lsm6dsx_report_motion_event(struct st_= lsm6dsx_hw *hw) events_found =3D st_lsm6dsx_report_events(hw, ST_LSM6DSX_EVENT_WAKEUP, IIO_EV_TYPE_THRESH, IIO_EV_DIR_EITHER); + events_found |=3D st_lsm6dsx_report_events(hw, ST_LSM6DSX_EVENT_TAP, + IIO_EV_TYPE_GESTURE, + IIO_EV_DIR_SINGLETAP); =20 return events_found; } --=20 2.39.5