From nobody Tue Dec 2 00:04:45 2025 Received: from sender3-of-o54.zoho.com (sender3-of-o54.zoho.com [136.143.184.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C623332AAAB; Tue, 25 Nov 2025 17:02:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.184.54 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764090168; cv=pass; b=kuaOskiLel31zKAVD/q7vHfn+0WdwTLrnqFkQaXovLeoMOdsW/SPvekQTy6MMuluGHZcpLBbhKeEpx5me9B/TdNCrvLB9Dwwkbb3KO/4imvI5ypCtp3k6gbnhjJMzL8AGJyjHZPW8xtMna5Jfwn5AMK7AvUKV4vy7qhKfkq2qqY= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764090168; c=relaxed/simple; bh=JT6UrMRRjuuWYMKEE431PAKBecqbiT6bSH6fs9ZXwuQ=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=adwVkJQCrAIQ5JNynXVAu8MlM7VFcLHIDzdUrsof2MGbhFIzCcxL/ri1rbKeScLjtUX9Sr5weG31gIv3LB2hmY2Ay1l79xRPyxX62MXjNjX6jIl82hQosRpPAO53uMfe8TppE1t9lzNoxb47fIVGSu/mLLPP+BdnKW91YLXWoM0= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=anirudhrb.com; spf=pass smtp.mailfrom=anirudhrb.com; dkim=pass (1024-bit key) header.d=anirudhrb.com header.i=anirudh@anirudhrb.com header.b=nIgDYdj2; arc=pass smtp.client-ip=136.143.184.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=anirudhrb.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=anirudhrb.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=anirudhrb.com header.i=anirudh@anirudhrb.com header.b="nIgDYdj2" ARC-Seal: i=1; a=rsa-sha256; t=1764090117; cv=none; d=zohomail.com; s=zohoarc; b=brjEjmCljmQHQjaqGseBvjhrAdmgYR0JW+VWIzmFbj7ej9Lf6SMJcRNgVpDgcrjy6T7Ogo2aLhMZjYa5dEFXnoIBcu/owVMBnErOwHEls6icrs7xfTiaPGAjLc3AN0i58LmJPchtmywZQWPkDNRp3OW/87uZFIZlO+Mu+00U09s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1764090117; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=HBwSR2rtuqv+NAM5OYtNOv2Wezl+99eQ+pwqmjOxO1Y=; b=icX1bJa2yU+XpJtDhzLGB9mSD63PZR2xKz6iNFsyC2TqhcA0G8z0ZhAaoolJ3biccOZLtw05D1ql6vHy3+DU4+Mgv23REDDdn/URRhJaOHB4IEd6fqxuLDyiaieq5MhBUoe2kq3JBFmCgyOa/i+CSkHP+gmvZqUfb7BjNl1RZ94= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=anirudhrb.com; spf=pass smtp.mailfrom=anirudh@anirudhrb.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1764090117; s=zoho; d=anirudhrb.com; i=anirudh@anirudhrb.com; h=From:From:To:To:Subject:Subject:Date:Date:Message-Id:Message-Id:In-Reply-To:References:MIME-Version:Content-Transfer-Encoding:Reply-To:Cc; bh=HBwSR2rtuqv+NAM5OYtNOv2Wezl+99eQ+pwqmjOxO1Y=; b=nIgDYdj2N3/IpkoVx5vS+TtkYsQ2tgL3dUgTBKumVVJODLT5POaOriBZTHwBNdXL 6w5qpDplWJdzjWhrMKnvKEBAi6SGJx0vekehb0bYgMKBMMLmH5MU1uBWwj1bBomJBvI ihlO8J4EMFDaUW2BQYh9GnQXoV0wSOlOpVKda47U= Received: by mx.zohomail.com with SMTPS id 1764090116327797.2261256804017; Tue, 25 Nov 2025 09:01:56 -0800 (PST) From: Anirudh Raybharam To: kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org, decui@microsoft.com, longli@microsoft.com, catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, tglx@linutronix.de, Arnd Bergmann , akpm@linux-foundation.org, anirudh@anirudhrb.com, agordeev@linux.ibm.com, guoweikang.kernel@gmail.com, osandov@fb.com, bsz@amazon.de, linux-hyperv@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org Subject: [PATCH 1/3] arm64: hyperv: move hyperv detection earlier in boot Date: Tue, 25 Nov 2025 17:01:22 +0000 Message-Id: <20251125170124.2443340-2-anirudh@anirudhrb.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251125170124.2443340-1-anirudh@anirudhrb.com> References: <20251125170124.2443340-1-anirudh@anirudhrb.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMailClient: External Content-Type: text/plain; charset="utf-8" From: Anirudh Rayabharam From: Anirudh Rayabharam (Microsoft) Move hyperv detection earlier in the boot. The goal is to detect hyperv and the type of partition we're running in before the GICv3 setup. This will be used in the subsequent patches to allocate an SGI for use by the hyperv subsystem. Signed-off-by: Anirudh Rayabharam (Microsoft) --- arch/arm64/hyperv/mshyperv.c | 18 ++++++++++++++---- arch/arm64/include/asm/mshyperv.h | 2 ++ arch/arm64/kernel/setup.c | 6 ++++++ 3 files changed, 22 insertions(+), 4 deletions(-) diff --git a/arch/arm64/hyperv/mshyperv.c b/arch/arm64/hyperv/mshyperv.c index 4fdc26ade1d7..cc443a5d6c71 100644 --- a/arch/arm64/hyperv/mshyperv.c +++ b/arch/arm64/hyperv/mshyperv.c @@ -17,6 +17,7 @@ #include #include =20 +static bool hyperv_detected; static bool hyperv_initialized; =20 int hv_get_hypervisor_version(union hv_hypervisor_version_info *info) @@ -70,20 +71,21 @@ static bool __init hyperv_detect_via_smccc(void) return arm_smccc_hypervisor_has_uuid(&hyperv_uuid); } =20 -static int __init hyperv_init(void) +void __init hyperv_early_init(void) { struct hv_get_vp_registers_output result; u64 guest_id; - int ret; =20 /* * Allow for a kernel built with CONFIG_HYPERV to be running in * a non-Hyper-V environment. * - * In such cases, do nothing and return success. + * In such cases, do nothing and return. */ if (!hyperv_detect_via_acpi() && !hyperv_detect_via_smccc()) - return 0; + return; + + hyperv_detected =3D true; =20 /* Setup the guest ID */ guest_id =3D hv_generate_guest_id(LINUX_VERSION_CODE); @@ -103,6 +105,14 @@ static int __init hyperv_init(void) ms_hyperv.misc_features); =20 hv_identify_partition_type(); +} + +static int __init hyperv_init(void) +{ + int ret; + + if (!hyperv_detected) + return 0; =20 ret =3D hv_common_init(); if (ret) diff --git a/arch/arm64/include/asm/mshyperv.h b/arch/arm64/include/asm/msh= yperv.h index b721d3134ab6..58fde70c2e39 100644 --- a/arch/arm64/include/asm/mshyperv.h +++ b/arch/arm64/include/asm/mshyperv.h @@ -53,6 +53,8 @@ static inline u64 hv_get_non_nested_msr(unsigned int reg) return hv_get_msr(reg); } =20 +void hyperv_early_init(void); + /* SMCCC hypercall parameters */ #define HV_SMCCC_FUNC_NUMBER 1 #define HV_FUNC_ID ARM_SMCCC_CALL_VAL( \ diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c index 23c05dc7a8f2..eccf5f19da6b 100644 --- a/arch/arm64/kernel/setup.c +++ b/arch/arm64/kernel/setup.c @@ -54,6 +54,7 @@ #include #include #include +#include =20 static int num_standard_resources; static struct resource *standard_resources; @@ -354,6 +355,11 @@ void __init __no_sanitize_address setup_arch(char **cm= dline_p) else psci_acpi_init(); =20 + /* + * This must come after psci init since Hyper-V detection uses SMCCC + */ + hyperv_early_init(); + arm64_rsi_init(); =20 init_bootcpu_ops(); --=20 2.34.1 From nobody Tue Dec 2 00:04:45 2025 Received: from sender3-of-o54.zoho.com (sender3-of-o54.zoho.com [136.143.184.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3551132FA26; Tue, 25 Nov 2025 17:03:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.184.54 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764090193; cv=pass; b=uKejbqcO7knSYbzyBpUkLtqlG7fBoVW9Tz616G56cC7SykHQ9r3Q1IP382oo6hPwdGF+gDtutFvukegit1TevEF1op9EaCV7F1Im6OrhvhxdbrYCOBGPiri6jMQMuVae9wRXN2zJSd0W21kkhWSSuP2n0WGJ3WGmo+DyhMhN3RU= ARC-Message-Signature: i=2; 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charset="utf-8" From: Anirudh Rayabharam From: Anirudh Rayabharam (Microsoft) Currently SGIs are allocated only for the smp subsystem. The MSHV (Microsoft Hypervisor aka Hyper-V) code also needs an SGI that can be programmed into the SYNIC to receive intercepts from the hypervisor. The hypervisor would then assert this SGI whenever there is a guest VMEXIT. Allocate one SGI for MSHV use in addition to the SGIs allocated for IPIs. When running under MSHV, the full SGI range can be used i.e. no need to reserve SGIs 8-15 for the secure firmware. Since this SGI is needed only when running as a parent partition (i.e. we can create guest partitions), check for it before allocating an SGI. Signed-off-by: Anirudh Rayabharam (Microsoft) --- arch/arm64/hyperv/mshyperv.c | 13 +++++++++++++ arch/arm64/include/asm/mshyperv.h | 8 ++++++++ drivers/irqchip/irq-gic-v3.c | 29 ++++++++++++++++++++++++++--- 3 files changed, 47 insertions(+), 3 deletions(-) diff --git a/arch/arm64/hyperv/mshyperv.c b/arch/arm64/hyperv/mshyperv.c index cc443a5d6c71..99690ae9b53f 100644 --- a/arch/arm64/hyperv/mshyperv.c +++ b/arch/arm64/hyperv/mshyperv.c @@ -20,6 +20,8 @@ static bool hyperv_detected; static bool hyperv_initialized; =20 +static int mshv_intercept_irq; + int hv_get_hypervisor_version(union hv_hypervisor_version_info *info) { hv_get_vpreg_128(HV_REGISTER_HYPERVISOR_VERSION, @@ -137,6 +139,17 @@ static int __init hyperv_init(void) return 0; } =20 +void __init mshv_set_intercept_irq(int irq) +{ + mshv_intercept_irq =3D irq; +} + +int mshv_get_intercept_irq(void) +{ + return mshv_intercept_irq; +} +EXPORT_SYMBOL_GPL(mshv_get_intercept_irq); + early_initcall(hyperv_init); =20 bool hv_is_hyperv_initialized(void) diff --git a/arch/arm64/include/asm/mshyperv.h b/arch/arm64/include/asm/msh= yperv.h index 58fde70c2e39..f3f6e82a9cb6 100644 --- a/arch/arm64/include/asm/mshyperv.h +++ b/arch/arm64/include/asm/mshyperv.h @@ -55,6 +55,14 @@ static inline u64 hv_get_non_nested_msr(unsigned int reg) =20 void hyperv_early_init(void); =20 +#if IS_ENABLED(CONFIG_MSHV_ROOT) +void mshv_set_intercept_irq(int irq); +#else +static inline void mshv_set_intercept_irq(int irq) {} +#endif + +int mshv_get_intercept_irq(void); + /* SMCCC hypercall parameters */ #define HV_SMCCC_FUNC_NUMBER 1 #define HV_FUNC_ID ARM_SMCCC_CALL_VAL( \ diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 3de351e66ee8..56013dd0564c 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -35,6 +35,7 @@ #include #include #include +#include =20 #include "irq-gic-common.h" =20 @@ -1456,8 +1457,24 @@ static void __init gic_smp_init(void) .fwnode =3D gic_data.fwnode, .param_count =3D 1, }; + /* Register all 8 non-secure SGIs */ + const int NR_SMP_SGIS =3D 8; + int nr_sgis =3D NR_SMP_SGIS; int base_sgi; =20 + /* + * Allocate one more SGI for use by Hyper-V. This is only needed when + * Linux is running in a parent partition. Hyper-V will use this interrupt + * to notify the parent partition of intercepts. + * + * When running on Hyper-V, it is okay to use SGIs 8-15. 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mx.zohomail.com; dkim=pass header.i=anirudhrb.com; spf=pass smtp.mailfrom=anirudh@anirudhrb.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1764090144; s=zoho; d=anirudhrb.com; i=anirudh@anirudhrb.com; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-Id:Message-Id:In-Reply-To:References:MIME-Version:Content-Transfer-Encoding:Reply-To; bh=rfmkhk6fI8nQ7zM7WRF33dysSOhxawuyL810u6pnhUo=; b=quVQ69LJP0Zceq6Kbomc9byr+r/F65UXX+YF8LuQsXdIl2GTprpzqRZc3lgDS9aL Nio8FhASGi0DQ5XEVocVIKW+T3kycdSKvIUYCkpRgn1tUVNaQc9KP0IYULFaGeRFb/0 VxsCIFSbiVl7IO0c7Zw5xrpLc229W/s3aLDKvGq4= Received: by mx.zohomail.com with SMTPS id 1764090142173941.9960396999667; Tue, 25 Nov 2025 09:02:22 -0800 (PST) From: Anirudh Raybharam To: kys@microsoft.com, haiyangz@microsoft.com, wei.liu@kernel.org, decui@microsoft.com, longli@microsoft.com, catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, tglx@linutronix.de, Arnd Bergmann , akpm@linux-foundation.org, anirudh@anirudhrb.com, agordeev@linux.ibm.com, guoweikang.kernel@gmail.com, osandov@fb.com, bsz@amazon.de, linux-hyperv@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org Cc: Jinank Jain Subject: [PATCH 3/3] mshv: add support for VMEXIT interrupts on aarch64 Date: Tue, 25 Nov 2025 17:01:24 +0000 Message-Id: <20251125170124.2443340-4-anirudh@anirudhrb.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251125170124.2443340-1-anirudh@anirudhrb.com> References: <20251125170124.2443340-1-anirudh@anirudhrb.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMailClient: External Content-Type: text/plain; charset="utf-8" From: Anirudh Rayabharam From: Anirudh Rayabharam (Microsoft) Use the SGI allocated for MSHV as the interrupt vector to get notified of hypervisor intercepts. Currently, HYPERVISOR_CALLBACK_VECTOR is hardcoded for this. This macro exists only for x86. To make things generic, introduce an arch-specific init function mshv_arch_parent_partition_init() which, for now, is responsible for setting up the interception interrupt and writing it to the mshv_interrupt global. mshv_interrupt is then used when programming the SYNIC. Co-developed-by: Jinank Jain Signed-off-by: Jinank Jain Signed-off-by: Anirudh Rayabharam (Microsoft) --- drivers/hv/mshv_root_main.c | 59 ++++++++++++++++++++++++++++++++++ drivers/hv/mshv_synic.c | 15 +++++---- include/asm-generic/mshyperv.h | 3 ++ 3 files changed, 70 insertions(+), 7 deletions(-) diff --git a/drivers/hv/mshv_root_main.c b/drivers/hv/mshv_root_main.c index bc15d6f6922f..e48a89688ecb 100644 --- a/drivers/hv/mshv_root_main.c +++ b/drivers/hv/mshv_root_main.c @@ -17,7 +17,9 @@ #include #include #include +#include #include +#include #include #include #include @@ -75,6 +77,11 @@ static vm_fault_t mshv_vp_fault(struct vm_fault *vmf); static int mshv_init_async_handler(struct mshv_partition *partition); static void mshv_async_hvcall_handler(void *data, u64 *status); =20 + +int mshv_interrupt =3D -1; +int mshv_irq =3D -1; +static long __percpu *mshv_evt; + static const union hv_input_vtl input_vtl_zero; static const union hv_input_vtl input_vtl_normal =3D { .target_vtl =3D HV_NORMAL_VTL, @@ -2311,6 +2318,47 @@ static void mshv_init_vmm_caps(struct device *dev) dev_dbg(dev, "vmm_caps =3D %#llx\n", mshv_root.vmm_caps.as_uint64[0]); } =20 +#if IS_ENABLED(CONFIG_ARM64) +static irqreturn_t mshv_percpu_isr(int irq, void *dev_id) +{ + mshv_isr(); + add_interrupt_randomness(irq); + return IRQ_HANDLED; +} + +static int mshv_arch_parent_partition_init(struct device *dev) +{ + int ret; + + mshv_irq =3D mshv_get_intercept_irq(); + mshv_interrupt =3D irq_get_irq_data(mshv_irq)->hwirq; + + mshv_evt =3D alloc_percpu(long); + if (!mshv_evt) { + dev_err(dev, "Failed to allocate percpu event\n"); + return -ENOMEM; + } + + ret =3D request_percpu_irq(mshv_irq, mshv_percpu_isr, "MSHV", mshv_evt); + if (ret) { + dev_err(dev, "Failed to request percpu irq\n"); + goto free_percpu_buf; + } + + return ret; + +free_percpu_buf: + free_percpu(mshv_evt); + return ret; +} +#elif IS_ENABLED(CONFIG_X86_64) +static int mshv_arch_parent_partition_init(struct device *dev) +{ + mshv_interrupt =3D HYPERVISOR_CALLBACK_VECTOR; + return 0; +} +#endif + static int __init mshv_parent_partition_init(void) { int ret; @@ -2329,6 +2377,10 @@ static int __init mshv_parent_partition_init(void) =20 dev =3D mshv_dev.this_device; =20 + ret =3D mshv_arch_parent_partition_init(dev); + if (ret) + return ret; + if (version_info.build_number < MSHV_HV_MIN_VERSION || version_info.build_number > MSHV_HV_MAX_VERSION) { dev_err(dev, "Running on unvalidated Hyper-V version\n"); @@ -2396,6 +2448,13 @@ static void __exit mshv_parent_partition_exit(void) mshv_irqfd_wq_cleanup(); if (hv_root_partition()) mshv_root_partition_exit(); + if (mshv_irq >=3D 0) { + if (mshv_evt) { + free_percpu_irq(mshv_irq, mshv_evt); + free_percpu(mshv_evt); + mshv_evt =3D NULL; + } + } cpuhp_remove_state(mshv_cpuhp_online); free_percpu(mshv_root.synic_pages); } diff --git a/drivers/hv/mshv_synic.c b/drivers/hv/mshv_synic.c index f8b0337cdc82..3bdb798f8948 100644 --- a/drivers/hv/mshv_synic.c +++ b/drivers/hv/mshv_synic.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -451,9 +452,7 @@ int mshv_synic_init(unsigned int cpu) union hv_synic_simp simp; union hv_synic_siefp siefp; union hv_synic_sirbp sirbp; -#ifdef HYPERVISOR_CALLBACK_VECTOR union hv_synic_sint sint; -#endif union hv_synic_scontrol sctrl; struct hv_synic_pages *spages =3D this_cpu_ptr(mshv_root.synic_pages); struct hv_message_page **msg_page =3D &spages->hyp_synic_message_page; @@ -496,10 +495,13 @@ int mshv_synic_init(unsigned int cpu) =20 hv_set_non_nested_msr(HV_MSR_SIRBP, sirbp.as_uint64); =20 -#ifdef HYPERVISOR_CALLBACK_VECTOR + + if (mshv_irq > 0) + enable_percpu_irq(mshv_irq, 0); + /* Enable intercepts */ sint.as_uint64 =3D 0; - sint.vector =3D HYPERVISOR_CALLBACK_VECTOR; + sint.vector =3D mshv_interrupt; sint.masked =3D false; sint.auto_eoi =3D hv_recommend_using_aeoi(); hv_set_non_nested_msr(HV_MSR_SINT0 + HV_SYNIC_INTERCEPTION_SINT_INDEX, @@ -507,13 +509,12 @@ int mshv_synic_init(unsigned int cpu) =20 /* Doorbell SINT */ sint.as_uint64 =3D 0; - sint.vector =3D HYPERVISOR_CALLBACK_VECTOR; + sint.vector =3D mshv_interrupt; sint.masked =3D false; - sint.as_intercept =3D 1; sint.auto_eoi =3D hv_recommend_using_aeoi(); + sint.as_intercept =3D 1; hv_set_non_nested_msr(HV_MSR_SINT0 + HV_SYNIC_DOORBELL_SINT_INDEX, sint.as_uint64); -#endif =20 /* Enable global synic bit */ sctrl.as_uint64 =3D hv_get_non_nested_msr(HV_MSR_SCONTROL); diff --git a/include/asm-generic/mshyperv.h b/include/asm-generic/mshyperv.h index ecedab554c80..8e30347f7946 100644 --- a/include/asm-generic/mshyperv.h +++ b/include/asm-generic/mshyperv.h @@ -189,6 +189,9 @@ void hv_setup_crash_handler(void (*handler)(struct pt_r= egs *regs)); void hv_remove_crash_handler(void); void hv_setup_mshv_handler(void (*handler)(void)); =20 +extern int mshv_interrupt; +extern int mshv_irq; + #if IS_ENABLED(CONFIG_HYPERV) /* * Hypervisor's notion of virtual processor ID is different from --=20 2.34.1