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Tue, 25 Nov 2025 04:06:28 -0800 (PST) Received: from xeon ([188.163.112.74]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5969dbbecb9sm5150993e87.58.2025.11.25.04.06.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Nov 2025 04:06:28 -0800 (PST) From: Svyatoslav Ryhel To: Krzysztof Kozlowski , Rob Herring , Conor Dooley , Thierry Reding , Thierry Reding , Jonathan Hunter , Prashant Gaikwad , Mikko Perttunen , Michael Turquette , Stephen Boyd , Dmitry Osipenko , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Svyatoslav Ryhel Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org Subject: [PATCH v4 08/12] soc: tegra: common: add Tegra114 support to devm_tegra_core_dev_init_opp_table Date: Tue, 25 Nov 2025 14:05:55 +0200 Message-ID: <20251125120559.158860-9-clamor95@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251125120559.158860-1-clamor95@gmail.com> References: <20251125120559.158860-1-clamor95@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Determine the Tegra114 hardware version using the SoC Speedo ID bit macro, mirroring the approach already used for Tegra30 and Tegra124. Signed-off-by: Svyatoslav Ryhel --- drivers/soc/tegra/common.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/soc/tegra/common.c b/drivers/soc/tegra/common.c index 6292a1c72071..2264dd38893a 100644 --- a/drivers/soc/tegra/common.c +++ b/drivers/soc/tegra/common.c @@ -143,7 +143,8 @@ int devm_tegra_core_dev_init_opp_table(struct device *d= ev, hw_version =3D BIT(tegra_sku_info.soc_process_id); config.supported_hw =3D &hw_version; config.supported_hw_count =3D 1; - } else if (of_machine_is_compatible("nvidia,tegra30")) { + } else if (of_machine_is_compatible("nvidia,tegra30") || + of_machine_is_compatible("nvidia,tegra114")) { hw_version =3D BIT(tegra_sku_info.soc_speedo_id); config.supported_hw =3D &hw_version; config.supported_hw_count =3D 1; @@ -156,7 +157,7 @@ int devm_tegra_core_dev_init_opp_table(struct device *d= ev, } =20 /* - * Tegra114+ doesn't support OPP yet, return early for non tegra20/30 + * Tegra124+ doesn't support OPP yet, return early for pre-Tegra124 * case. */ if (!config.supported_hw) --=20 2.51.0