From nobody Tue Dec 2 00:02:11 2025 Received: from out28-171.mail.aliyun.com (out28-171.mail.aliyun.com [115.124.28.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 39A532D7813 for ; Tue, 25 Nov 2025 09:42:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=115.124.28.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764063744; cv=none; b=VIYgKubj3m97CjdwXxn4/23KsCHkKY0tGdM9kPdsje+LpKpQP/j3vro/FJTAJJdIsWAqLwqOcolPKJ0Id3NFty/hLUMjbeZ/sikerEGu1fk0lOMc30cG7UXgTaVf9ahJndI+QqsD7gBo/X9+T6nWoK9nGvJabWaNrGhgSOZn76o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764063744; c=relaxed/simple; bh=T+yRY/Plv7hym4fMV5LIhSFluZbHa51xYhM1GZOGoQc=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=T+gLzaoGzX8HVrQGpgktfaL5I1dqVj5uYoSs2zGS/ggQQ+LF7Ub2AF12qnsssV3c7gsgbZU7phnTm4QsZXujExE9w9+ehCfGKcw0v8eJvajnQhvL0K8vZl/zFty6lUMm8VNgV8SktdA1/RH/EyiitPA6IF4m7SgMI0nEEPWsGW0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=bosc.ac.cn; spf=pass smtp.mailfrom=bosc.ac.cn; arc=none smtp.client-ip=115.124.28.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=bosc.ac.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bosc.ac.cn Received: from aliyun.com(mailfrom:zhangzhijie@bosc.ac.cn fp:SMTPD_---.fVUOfOA_1764063413 cluster:ay29) by smtp.aliyun-inc.com; Tue, 25 Nov 2025 17:36:54 +0800 From: zhangzhijie To: jani.nikula@linux.intel.com, jeff@jeffgeerling.com, zhangzhijie@bosc.ac.cn, wangran@bosc.ac.cn, zhangjian@bosc.ac.cn, daniel@ffwll.ch, rodrigo.vivi@intel.com, joonas.lahtinen@linux.intel.com, tursulin@ursulin.net, airlied@gmail.com, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, guoyaxing@bosc.ac.cn, ville.syrjala@linux.intel.com Subject: [PATCH v3] i915: Support Intel GPU porting on any non-x86 system. Date: Tue, 25 Nov 2025 17:36:51 +0800 Message-Id: <20251125093651.2414999-1-zhangzhijie@bosc.ac.cn> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" inb/outb VGA_SEQ_* not support on other ARCH (such as RISCV). Should detect whether arch platform support or not. Signed-off-by: zhangzhijie Changes in v3: 1.Rewrite Commit message. 2. Remove likely/unlikely Changes in v2: 1. vga_get/put inside the branch. Signed-off-by: zhangzhijie --- drivers/gpu/drm/i915/display/intel_vga.c | 33 +++++++++++++++++------- 1 file changed, 23 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i91= 5/display/intel_vga.c index 6e125564db34..fda4c2cfd7cf 100644 --- a/drivers/gpu/drm/i915/display/intel_vga.c +++ b/drivers/gpu/drm/i915/display/intel_vga.c @@ -41,6 +41,15 @@ static bool has_vga_pipe_sel(struct intel_display *displ= ay) return DISPLAY_VER(display) < 7; } =20 +static bool intel_arch_support_vga_pm(struct intel_display *display) +{ +#if defined(CONFIG_X86) || defined(CONFIG_X86_64) + return true; +#else + return false; +#endif +} + /* Disable the VGA plane that we never use */ void intel_vga_disable(struct intel_display *display) { @@ -64,13 +73,15 @@ void intel_vga_disable(struct intel_display *display) drm_dbg_kms(display->drm, "Disabling VGA plane on pipe %c\n", pipe_name(pipe)); =20 - /* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */ - vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); - outb(0x01, VGA_SEQ_I); - sr1 =3D inb(VGA_SEQ_D); - outb(sr1 | VGA_SR01_SCREEN_OFF, VGA_SEQ_D); - vga_put(pdev, VGA_RSRC_LEGACY_IO); - udelay(300); + if (intel_arch_support_vga_pm(display)) { + /* WaEnableVGAAccessThroughIOPort:ctg,elk,ilk,snb,ivb,vlv,hsw */ + vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); + outb(0x01, VGA_SEQ_I); + sr1 =3D inb(VGA_SEQ_D); + outb(sr1 | VGA_SR01_SCREEN_OFF, VGA_SEQ_D); + vga_put(pdev, VGA_RSRC_LEGACY_IO); + udelay(300); + } =20 intel_de_write(display, vga_reg, VGA_DISP_DISABLE); intel_de_posting_read(display, vga_reg); @@ -90,9 +101,11 @@ void intel_vga_reset_io_mem(struct intel_display *displ= ay) * sure vgacon can keep working normally without triggering interrupts * and error messages. */ - vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); - outb(inb(VGA_MIS_R), VGA_MIS_W); - vga_put(pdev, VGA_RSRC_LEGACY_IO); + if (intel_arch_support_vga_pm(display)) { + vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO); + outb(inb(VGA_MIS_R), VGA_MIS_W); + vga_put(pdev, VGA_RSRC_LEGACY_IO); + } } =20 int intel_vga_register(struct intel_display *display) --=20 2.34.1