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[86.162.200.138]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-477bf1df334sm186753945e9.3.2025.11.24.02.28.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Nov 2025 02:28:42 -0800 (PST) From: Biju X-Google-Original-From: Biju To: Marc Kleine-Budde , Vincent Mailhol , Geert Uytterhoeven , Magnus Damm , Philipp Zabel Cc: Biju Das , linux-can@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar Mahadev Lad , Biju Das Subject: [PATCH v3 4/7] can: rcar_canfd: Extract rcar_canfd_global_{,de}init() Date: Mon, 24 Nov 2025 10:28:29 +0000 Message-ID: <20251124102837.106973-5-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251124102837.106973-1-biju.das.jz@bp.renesas.com> References: <20251124102837.106973-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Geert Uytterhoeven Extract the code to (de)initialize global state into separate functions, for future reuse. Signed-off-by: Geert Uytterhoeven Signed-off-by: Biju Das --- v2->v3: * No change. v1->v2: * Added RAM clk handling in rcar_canfd_global_{,de}init(). --- drivers/net/can/rcar/rcar_canfd.c | 182 +++++++++++++++++------------- 1 file changed, 104 insertions(+), 78 deletions(-) diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_= canfd.c index a127c0845a3b..d77d28d0ca6b 100644 --- a/drivers/net/can/rcar/rcar_canfd.c +++ b/drivers/net/can/rcar/rcar_canfd.c @@ -1979,21 +1979,120 @@ static void rcar_canfd_channel_remove(struct rcar_= canfd_global *gpriv, u32 ch) } } =20 +static int rcar_canfd_global_init(struct rcar_canfd_global *gpriv) +{ + struct device *dev =3D &gpriv->pdev->dev; + u32 rule_entry =3D 0; + u32 ch, sts; + int err; + + err =3D reset_control_reset(gpriv->rstc1); + if (err) + return err; + + err =3D reset_control_reset(gpriv->rstc2); + if (err) + goto fail_reset1; + + /* Enable peripheral clock for register access */ + err =3D clk_prepare_enable(gpriv->clkp); + if (err) { + dev_err(dev, "failed to enable peripheral clock: %pe\n", + ERR_PTR(err)); + goto fail_reset2; + } + + /* Enable RAM clock */ + err =3D clk_prepare_enable(gpriv->clk_ram); + if (err) { + dev_err(dev, + "failed to enable RAM clock, error %d\n", err); + goto fail_clk; + } + + err =3D rcar_canfd_reset_controller(gpriv); + if (err) { + dev_err(dev, "reset controller failed: %pe\n", ERR_PTR(err)); + goto fail_ram_clk; + } + + /* Controller in Global reset & Channel reset mode */ + rcar_canfd_configure_controller(gpriv); + + /* Configure per channel attributes */ + for_each_set_bit(ch, &gpriv->channels_mask, gpriv->info->max_channels) { + /* Configure Channel's Rx fifo */ + rcar_canfd_configure_rx(gpriv, ch); + + /* Configure Channel's Tx (Common) fifo */ + rcar_canfd_configure_tx(gpriv, ch); + + /* Configure receive rules */ + rcar_canfd_configure_afl_rules(gpriv, ch, rule_entry); + rule_entry +=3D RCANFD_CHANNEL_NUMRULES; + } + + /* Configure common interrupts */ + rcar_canfd_enable_global_interrupts(gpriv); + + /* Start Global operation mode */ + rcar_canfd_update_bit(gpriv->base, RCANFD_GCTR, RCANFD_GCTR_GMDC_MASK, + RCANFD_GCTR_GMDC_GOPM); + + /* Verify mode change */ + err =3D readl_poll_timeout((gpriv->base + RCANFD_GSTS), sts, + !(sts & RCANFD_GSTS_GNOPM), 2, 500000); + if (err) { + dev_err(dev, "global operational mode failed\n"); + goto fail_mode; + } + + return 0; + +fail_mode: + rcar_canfd_disable_global_interrupts(gpriv); +fail_ram_clk: + clk_disable_unprepare(gpriv->clk_ram); +fail_clk: + clk_disable_unprepare(gpriv->clkp); +fail_reset2: + reset_control_assert(gpriv->rstc2); +fail_reset1: + reset_control_assert(gpriv->rstc1); + return err; +} + +static void rcar_canfd_global_deinit(struct rcar_canfd_global *gpriv, bool= full) +{ + rcar_canfd_disable_global_interrupts(gpriv); + + if (full) { + rcar_canfd_reset_controller(gpriv); + + /* Enter global sleep mode */ + rcar_canfd_set_bit(gpriv->base, RCANFD_GCTR, RCANFD_GCTR_GSLPR); + } + + clk_disable_unprepare(gpriv->clk_ram); + clk_disable_unprepare(gpriv->clkp); + reset_control_assert(gpriv->rstc2); + reset_control_assert(gpriv->rstc1); +} + static int rcar_canfd_probe(struct platform_device *pdev) { struct phy *transceivers[RCANFD_NUM_CHANNELS] =3D { NULL, }; const struct rcar_canfd_hw_info *info; struct device *dev =3D &pdev->dev; void __iomem *addr; - u32 sts, ch, fcan_freq; struct rcar_canfd_global *gpriv; struct device_node *of_child; unsigned long channels_mask =3D 0; int err, ch_irq, g_irq; int g_err_irq, g_recc_irq; - u32 rule_entry =3D 0; bool fdmode =3D true; /* CAN FD only mode - default */ char name[9] =3D "channelX"; + u32 ch, fcan_freq; int i; =20 info =3D of_device_get_match_data(dev); @@ -2138,67 +2237,9 @@ static int rcar_canfd_probe(struct platform_device *= pdev) } } =20 - err =3D reset_control_reset(gpriv->rstc1); + err =3D rcar_canfd_global_init(gpriv); if (err) - goto fail_dev; - err =3D reset_control_reset(gpriv->rstc2); - if (err) { - reset_control_assert(gpriv->rstc1); - goto fail_dev; - } - - /* Enable peripheral clock for register access */ - err =3D clk_prepare_enable(gpriv->clkp); - if (err) { - dev_err(dev, "failed to enable peripheral clock: %pe\n", - ERR_PTR(err)); - goto fail_reset; - } - - /* Enable RAM clock */ - err =3D clk_prepare_enable(gpriv->clk_ram); - if (err) { - dev_err(dev, "failed to enable RAM clock: %pe\n", - ERR_PTR(err)); - goto fail_clk; - } - - err =3D rcar_canfd_reset_controller(gpriv); - if (err) { - dev_err(dev, "reset controller failed: %pe\n", ERR_PTR(err)); - goto fail_ram_clk; - } - - /* Controller in Global reset & Channel reset mode */ - rcar_canfd_configure_controller(gpriv); - - /* Configure per channel attributes */ - for_each_set_bit(ch, &gpriv->channels_mask, info->max_channels) { - /* Configure Channel's Rx fifo */ - rcar_canfd_configure_rx(gpriv, ch); - - /* Configure Channel's Tx (Common) fifo */ - rcar_canfd_configure_tx(gpriv, ch); - - /* Configure receive rules */ - rcar_canfd_configure_afl_rules(gpriv, ch, rule_entry); - rule_entry +=3D RCANFD_CHANNEL_NUMRULES; - } - - /* Configure common interrupts */ - rcar_canfd_enable_global_interrupts(gpriv); - - /* Start Global operation mode */ - rcar_canfd_update_bit(gpriv->base, RCANFD_GCTR, RCANFD_GCTR_GMDC_MASK, - RCANFD_GCTR_GMDC_GOPM); - - /* Verify mode change */ - err =3D readl_poll_timeout((gpriv->base + RCANFD_GSTS), sts, - !(sts & RCANFD_GSTS_GNOPM), 2, 500000); - if (err) { - dev_err(dev, "global operational mode failed\n"); goto fail_mode; - } =20 for_each_set_bit(ch, &gpriv->channels_mask, info->max_channels) { err =3D rcar_canfd_channel_probe(gpriv, ch, fcan_freq, @@ -2217,14 +2258,7 @@ static int rcar_canfd_probe(struct platform_device *= pdev) for_each_set_bit(ch, &gpriv->channels_mask, info->max_channels) rcar_canfd_channel_remove(gpriv, ch); fail_mode: - rcar_canfd_disable_global_interrupts(gpriv); -fail_ram_clk: - clk_disable_unprepare(gpriv->clk_ram); -fail_clk: - clk_disable_unprepare(gpriv->clkp); -fail_reset: - reset_control_assert(gpriv->rstc2); - reset_control_assert(gpriv->rstc1); + rcar_canfd_global_deinit(gpriv, false); fail_dev: return err; } @@ -2239,15 +2273,7 @@ static void rcar_canfd_remove(struct platform_device= *pdev) rcar_canfd_channel_remove(gpriv, ch); } =20 - rcar_canfd_disable_global_interrupts(gpriv); - rcar_canfd_reset_controller(gpriv); - - /* Enter global sleep mode */ - rcar_canfd_set_bit(gpriv->base, RCANFD_GCTR, RCANFD_GCTR_GSLPR); - clk_disable_unprepare(gpriv->clk_ram); - clk_disable_unprepare(gpriv->clkp); - reset_control_assert(gpriv->rstc2); - reset_control_assert(gpriv->rstc1); + rcar_canfd_global_deinit(gpriv, true); } =20 static int __maybe_unused rcar_canfd_suspend(struct device *dev) --=20 2.43.0