From nobody Tue Dec 2 00:46:47 2025 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E7E0A2FFDF5; Mon, 24 Nov 2025 12:08:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763986132; cv=none; b=jJ32R3oCLl88+/rRochjhrMPeq8hka22Igd3awyLJSG3CzagSruFhto4G0PnuF01uY1+Bv604KEgyAGDu8p+uUypCKeJn/Brtk/G7snsbVtQCUblR1rgZWvCw8It2vGyKSkDPlTZf+ckE3ft73fd6gNYBqaMGCOvP46ouxTaeUc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763986132; c=relaxed/simple; bh=9ej8J1aZ3loXRs29McB2qWVnK7bVOI1xJP2oRmJpeJc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=NI5S8Yic6dxDIFas2dr3oi7rkpqNcPfnELEfCxQ6y3HvXYnYuDPTlrfYAKL7l6/4u0tlx/+JFZJXRz9TPsZ1AgwetbDyleVhHMSsijiHPUHotKEDC/N2WtwLcx2iSEkcq0pWMXmG0BsLgqODx979eo2QyOaRVmjH+k4bqhizVDU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=IYY25bO4; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="IYY25bO4" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1763986129; x=1795522129; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=9ej8J1aZ3loXRs29McB2qWVnK7bVOI1xJP2oRmJpeJc=; b=IYY25bO4rXYD+1k8SqzmzVQ2IUnfk1x9XbGU9MDCq4rK0WYC0FTlwsJ2 XTQ7dqgjYkY7Saby6DjDRn4Cu2KVAOPGXu/cp9NvUHr1ndgsvRVvXBmRI QiNpoSHnbiuNlQMmp3N37TjPeLaIpzsZdKJdSh9RbF6491qpkbG+bwW2Q Td56zhVl+VQidbK4IsH1yj1Vots2Cgm/GBUF8vOKSb3FWQ0rfDblt2X3J trUAk9KizfipIKIAX5b8rp/mbKXo4l+FD7oBXe1G0QiM74SD5sVd1/3cj NgBGXjUfp+uF4JOiGo/rMkcN4Pw6fQPrJNyMs5RgKFaUpS/pz+uurFHjq w==; X-CSE-ConnectionGUID: gUF4PjAbQbmCnyQvE/5J6g== X-CSE-MsgGUID: lMvotyy9QcWUti+rtlo/qw== X-IronPort-AV: E=Sophos;i="6.20,222,1758610800"; d="scan'208";a="216913327" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Nov 2025 05:08:42 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.87.71) by chn-vm-ex2.mchp-main.com (10.10.87.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.29; Mon, 24 Nov 2025 05:08:16 -0700 Received: from ROU-LL-M19942.mpu32.int (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 24 Nov 2025 05:08:13 -0700 From: Cyrille Pitchen Date: Mon, 24 Nov 2025 13:07:20 +0100 Subject: [PATCH v3 4/5] ARM: dts: microchip: sam9x7: Add GFX2D GPU Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20251124-cpitchen-mainline_gfx2d-v3-4-607f8c407286@microchip.com> References: <20251124-cpitchen-mainline_gfx2d-v3-0-607f8c407286@microchip.com> In-Reply-To: <20251124-cpitchen-mainline_gfx2d-v3-0-607f8c407286@microchip.com> To: David Airlie , Simona Vetter , "Maarten Lankhorst" , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nicolas Ferre , "Alexandre Belloni" , Claudiu Beznea , Russell King CC: , , , , Cyrille Pitchen X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=936; i=cyrille.pitchen@microchip.com; h=from:subject:message-id; bh=9ej8J1aZ3loXRs29McB2qWVnK7bVOI1xJP2oRmJpeJc=; b=owGbwMvMwCXmf6yzKqEsVIbxtFoSQ6aK1zwdAROlVrWvy9ubpkk0TNg0f8mOGWHm04I61+r/8 113Uza/o5SFQYyLQVZMkeXQm629mcdfPbZ7JSoFM4eVCWQIAxenAEzk+S+GP9yaP9dGKfhLhWuw +ZUtjj9qNukhp+Wrf35z5slq6zpWNjAyzI/Qm3DbubEigLdg4s3jPxaVfpl6R+nUnitZ77N8Jn4 34wIA X-Developer-Key: i=cyrille.pitchen@microchip.com; a=openpgp; fpr=7A21115D7D6026585D0E183E0EF12AA1BFAC073D Add support for the GFX2D GPU. Signed-off-by: Cyrille Pitchen --- arch/arm/boot/dts/microchip/sam9x7.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/microchip/sam9x7.dtsi b/arch/arm/boot/dts/mi= crochip/sam9x7.dtsi index 46dacbbd201ddb68a7456d6fe1afafa59db90ec8..79a82962264f51c4c243530b9da= d9010f8cf1347 100644 --- a/arch/arm/boot/dts/microchip/sam9x7.dtsi +++ b/arch/arm/boot/dts/microchip/sam9x7.dtsi @@ -292,6 +292,14 @@ AT91_XDMAC_DT_PERID(26))>, status =3D "disabled"; }; =20 + gpu: gpu@f0018000 { + compatible =3D "microchip,sam9x7-gfx2d"; + reg =3D <0xf0018000 0x4000>; + interrupts =3D <36 IRQ_TYPE_LEVEL_HIGH 0>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 36>; + status =3D "disabled"; + }; + i2s: i2s@f001c000 { compatible =3D "microchip,sam9x7-i2smcc", "microchip,sam9x60-i2smcc"; reg =3D <0xf001c000 0x100>; --=20 2.51.0