From nobody Tue Dec 2 01:24:50 2025 Received: from freeshell.de (freeshell.de [116.202.128.144]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 28E75274B48; Sun, 23 Nov 2025 22:53:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=116.202.128.144 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763938403; cv=none; b=MYM8pWaKu4SwRB0GrITQcik0JdWPflMs8KLBrAqIAg1fxEwR/MvhMHviUfLS4B60G+++9QGDFfwS/DGT48yVE24QJQ3szVNEgY5UdMiiAuOLhpQvBgan0vGRh7TMB9HflH3WxFAu3BgX5v1BlyBuXeZsnbjK2OkorUZwXBBsr1k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763938403; c=relaxed/simple; bh=xEQipELreVFUUrGIFDr8k0h5kciIyrrirrauvivfW70=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kHh9GQk5hASMI40yEXBFbLow+SOL6ytf0mQLewSh29ej65OPeZUbHDkKNSviTc4WQ93Y9uXnjfjLi/B9OfHiBvVrKr3VWdJrQ1ajT656jRjtVu0SLEdwSTz4GlcvIrNfIPHdveQWG1kidOhzGrUWN2JaubrcXhRVRhGGddQLr9o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=freeshell.de; spf=pass smtp.mailfrom=freeshell.de; dkim=pass (2048-bit key) header.d=freeshell.de header.i=@freeshell.de header.b=hjhT3LRU; arc=none smtp.client-ip=116.202.128.144 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=freeshell.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=freeshell.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=freeshell.de header.i=@freeshell.de header.b="hjhT3LRU" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freeshell.de; s=s2025; t=1763938311; bh=+7C2Aew/6tLzcZ4pkubvFevq8gNEauyKc69XNTYNN0w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hjhT3LRUaJZ5IrYrqcCda/dMs/7ycESGlTax3N0xXrm9xoBuKQ+UGf7BAFYE2bUnN vxnXvjduH3VGlEL3bHjxRixDfcKvTjV98Wy9UBxpL8BhRwDIZKdGoA0epz60+Q6Xtj hfOAYF7XNV1OC8R+4OeREFjrMBMDNs3uibVSRjLWLBUuXQxFC9K9820PKbsPIK5O// HKaTqdCOZxa3S4urKqv8XXfXSPxrGQxeBUjkTrPiRzT/+KaPxzCQqS1voGjroCVM1y cPi8h2Adh2q1FnmCjX36JfigC+cFxR0H2ujN61iXsokd0D4rCqu2sryD7IDUTNoGMz lutkf/OKfTK6w== Received: from hay.lan (unknown [IPv6:2605:59c0:2078:cf00:6ecf:39ff:fe00:8375]) (Authenticated sender: e) by freeshell.de (Postfix) with ESMTPSA id 389FBB2201BD; Sun, 23 Nov 2025 23:51:48 +0100 (CET) From: E Shattow To: Conor Dooley , Emil Renner Berthing , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, E Shattow , Icenowy Zheng , Conor Dooley Subject: [PATCH v3 2/2] riscv: dts: starfive: add Orange Pi RV Date: Sun, 23 Nov 2025 14:50:45 -0800 Message-ID: <20251123225059.49665-3-e@freeshell.de> X-Mailer: git-send-email 2.50.0 In-Reply-To: <20251123225059.49665-1-e@freeshell.de> References: <20251123225059.49665-1-e@freeshell.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Icenowy Zheng Orange Pi RV is a SBC based on the StarFive VisionFive 2 board. Orange Pi RV features: - StarFive JH7110 SoC - GbE port connected to JH7110 GMAC0 via YT8531 PHY - 4x USB ports via VL805 PCIe USB controller connected to JH7110 pcie0 - M.2 M-key slot connected to JH7110 pcie1 - HDMI video output - 3.5mm audio output - Ampak AP6256 SDIO Wi-Fi/Bluetooth module on mmc0 - microSD slot on mmc1 - SPI NOR flash memory - 24c02 EEPROM (read only by default) Signed-off-by: Icenowy Zheng Signed-off-by: E Shattow --- arch/riscv/boot/dts/starfive/Makefile | 1 + .../boot/dts/starfive/jh7110-orangepi-rv.dts | 76 +++++++++++++++++++ 2 files changed, 77 insertions(+) create mode 100644 arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/st= arfive/Makefile index 62b659f89ba7..d34c8c79bc10 100644 --- a/arch/riscv/boot/dts/starfive/Makefile +++ b/arch/riscv/boot/dts/starfive/Makefile @@ -12,6 +12,7 @@ dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7110-deepcomputing-fml= 13v01.dtb dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7110-milkv-mars.dtb dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7110-milkv-marscm-emmc.dtb dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7110-milkv-marscm-lite.dtb +dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7110-orangepi-rv.dtb dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7110-pine64-star64.dtb dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7110-starfive-visionfive-2-v1.2a.dtb dtb-$(CONFIG_ARCH_STARFIVE) +=3D jh7110-starfive-visionfive-2-v1.3b.dtb diff --git a/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts b/arch/ris= cv/boot/dts/starfive/jh7110-orangepi-rv.dts new file mode 100644 index 000000000000..16ec2767134e --- /dev/null +++ b/arch/riscv/boot/dts/starfive/jh7110-orangepi-rv.dts @@ -0,0 +1,76 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2025 Icenowy Zheng + */ + +/dts-v1/; +#include "jh7110-common.dtsi" + +/ { + model =3D "Xunlong Orange Pi RV"; + compatible =3D "xunlong,orangepi-rv", "starfive,jh7110"; + + /* This regulator is always on by hardware */ + reg_vcc3v3_pcie: regulator-vcc3v3-pcie { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3-pcie"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-always-on; + }; + + wifi_pwrseq: wifi-pwrseq { + compatible =3D "mmc-pwrseq-simple"; + reset-gpios =3D <&sysgpio 62 GPIO_ACTIVE_LOW>; + }; +}; + +&gmac0 { + assigned-clocks =3D <&aoncrg JH7110_AONCLK_GMAC0_TX>; + assigned-clock-parents =3D <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>; + starfive,tx-use-rgmii-clk; + status =3D "okay"; +}; + +&mmc0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + cap-sd-highspeed; + mmc-pwrseq =3D <&wifi_pwrseq>; + vmmc-supply =3D <®_vcc3v3_pcie>; + vqmmc-supply =3D <&vcc_3v3>; + status =3D "okay"; + + ap6256: wifi@1 { + compatible =3D "brcm,bcm43456-fmac", "brcm,bcm4329-fmac"; + reg =3D <1>; + /* TODO: out-of-band IRQ on GPIO21 */ + }; +}; + +&mmc1 { + cd-gpios =3D <&sysgpio 41 GPIO_ACTIVE_HIGH>; +}; + +&pcie0 { + status =3D "okay"; +}; + +&pcie1 { + status =3D "okay"; +}; + +&phy0 { + rx-internal-delay-ps =3D <1500>; + tx-internal-delay-ps =3D <1500>; + motorcomm,rx-clk-drv-microamp =3D <3970>; + motorcomm,rx-data-drv-microamp =3D <2910>; + motorcomm,tx-clk-adj-enabled; + motorcomm,tx-clk-10-inverted; + motorcomm,tx-clk-100-inverted; + motorcomm,tx-clk-1000-inverted; +}; + +&pwmdac { + status =3D "okay"; +}; --=20 2.50.0