From nobody Tue Dec 2 01:06:10 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 069531FF1C7; Sun, 23 Nov 2025 21:20:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763932815; cv=none; b=qErGbtJZOP4sx6WlhmtFXltQW1vCBTzclhjkqr8iD0Dl6DoR/1eEPIpWasr+hb/UJIjBKV/H30mAckpPHkHgtO+wkSxD5iSbtLhHpzkLLauQhmlIHFMg4LE4v4Mj3W0VeMcKgvG+DYUTflfArp9DS+lFtHVWHspdLct63GOOvzw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763932815; c=relaxed/simple; bh=3/FNvvvthqfqE8Hlk9y9M/lWMbT998+aR2jWJxRXnA4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Sm5AQYd00S2A3U+rJO8jR4w2+Mg7sHX/Mzw3sa8CKzgQrJVewZz6O7b2EMZt1tqq/bX0/bqntFCWZjmVu8N8bpy09qOdvu0ybYYtFpCncuo6i7CvD0dccBN99a9xj9QXeKY8bT7TJqs8NpuVTXerFrZ5tyNChdx+ceBhXzkffFM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=KBXD6Q+j; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="KBXD6Q+j" Received: by smtp.kernel.org (Postfix) with ESMTPS id C128FC16AAE; Sun, 23 Nov 2025 21:20:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1763932814; bh=3/FNvvvthqfqE8Hlk9y9M/lWMbT998+aR2jWJxRXnA4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=KBXD6Q+jWlPzG+0shR4MHFzHUXktDR7CVzoHPdEH7AK459wMK3BLBU9GEiBGBvumB gXk+G54wNYf2UfsGtPMIVPdkMs1eOl/vrnkUMT+l/d5gYcFj4rLTKKg8qrtg8EbiH8 DOHqUilHJKAOzTOpQ23R2Vl4/Q3mHUt/UJoMSwepPA16RCZEM4xqGuwTjuVKrUJskD Rv7lbw3vWrOMVkndZEZfXoHlEFUwxxUE7uquf+GQ/oZl1nDNjctKVpoCv/zD9xJu/A e5MOvenYbUsKuQlrPoAJ9suhYAhl7jgFUuEfzPSkva1T6fKPSpPubtQ2rHPfeRombt s4140q4H1tymQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id A58EBCFD316; Sun, 23 Nov 2025 21:20:14 +0000 (UTC) From: Sven Peter Date: Sun, 23 Nov 2025 21:19:54 +0000 Subject: [PATCH v2 1/3] soc: apple: Add hardware tunable support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251123-b4-atcphy-v2-1-34cc7092b22a@kernel.org> References: <20251123-b4-atcphy-v2-0-34cc7092b22a@kernel.org> In-Reply-To: <20251123-b4-atcphy-v2-0-34cc7092b22a@kernel.org> To: Janne Grunau , Neal Gompa , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sven Peter , Alyssa Rosenzweig X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=6699; i=sven@kernel.org; h=from:subject:message-id; bh=3/FNvvvthqfqE8Hlk9y9M/lWMbT998+aR2jWJxRXnA4=; b=owGbwMvMwCHmIlirolUq95LxtFoSQ6ZyVfvqmXN2z770dMcnbo8dGWWfgs13stXe1Ljpard5X rXN9XnyHaUsDGIcDLJiiizb99ubPnn4RnDppkvvYeawMoEMYeDiFICJmIYx/BW9VXbEf1dd/b3c vFivisVvnU70RGzIkKy2v9bHfs75SRHD/+jk6NWWHG8bn37sZFoUJSxnc2rdNC+mhYd/Bdyb+iH OnxcA X-Developer-Key: i=sven@kernel.org; a=openpgp; fpr=A1E3E34A2B3C820DBC4955E5993B08092F131F93 X-Endpoint-Received: by B4 Relay for sven@kernel.org/default with auth_id=407 Various hardware, like the Type-C PHY or the Thunderbolt/USB4 NHI, present on Apple SoCs need machine-specific tunables passed from our bootloader m1n1 to the device tree. Add generic helpers so that we don't have to duplicate this across multiple drivers. Reviewed-by: Alyssa Rosenzweig Reviewed-by: Neal Gompa Reviewed-by: Janne Grunau Signed-off-by: Sven Peter --- drivers/soc/apple/Kconfig | 4 ++ drivers/soc/apple/Makefile | 3 ++ drivers/soc/apple/tunable.c | 80 +++++++++++++++++++++++++++++++++++= ++++ include/linux/soc/apple/tunable.h | 62 ++++++++++++++++++++++++++++++ 4 files changed, 149 insertions(+) diff --git a/drivers/soc/apple/Kconfig b/drivers/soc/apple/Kconfig index ad67368892311bed5a94d358288390a6fb8b3b4a..d0ff32182a2b4a10c98cb96c70a= 03bea8c650f84 100644 --- a/drivers/soc/apple/Kconfig +++ b/drivers/soc/apple/Kconfig @@ -38,6 +38,10 @@ config APPLE_SART =20 Say 'y' here if you have an Apple SoC. =20 +config APPLE_TUNABLE + tristate + depends on ARCH_APPLE || COMPILE_TEST + endmenu =20 endif diff --git a/drivers/soc/apple/Makefile b/drivers/soc/apple/Makefile index 4d9ab8f3037b7159771d8817fa507ba29f99ae10..0b85ab61aefe131349a67d0aa80= 204edd8e89925 100644 --- a/drivers/soc/apple/Makefile +++ b/drivers/soc/apple/Makefile @@ -8,3 +8,6 @@ apple-rtkit-y =3D rtkit.o rtkit-crashlog.o =20 obj-$(CONFIG_APPLE_SART) +=3D apple-sart.o apple-sart-y =3D sart.o + +obj-$(CONFIG_APPLE_TUNABLE) +=3D apple-tunable.o +apple-tunable-y =3D tunable.o diff --git a/drivers/soc/apple/tunable.c b/drivers/soc/apple/tunable.c new file mode 100644 index 0000000000000000000000000000000000000000..6593238391715be07cdfec0c1b1= 16d6946f53fb5 --- /dev/null +++ b/drivers/soc/apple/tunable.c @@ -0,0 +1,80 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Apple Silicon hardware tunable support + * + * Each tunable is a list with each entry containing a offset into the MMIO + * region, a mask of bits to be cleared and a set of bits to be set. These + * tunables are passed along by the previous boot stages and vary from dev= ice + * to device such that they cannot be hardcoded in the individual drivers. + * + * Copyright (C) The Asahi Linux Contributors + */ + +#include +#include +#include +#include +#include + +struct apple_tunable *devm_apple_tunable_parse(struct device *dev, + struct device_node *np, + const char *name, + struct resource *res) +{ + struct apple_tunable *tunable; + struct property *prop; + const __be32 *p; + size_t sz; + int i; + + if (resource_size(res) < 4) + return ERR_PTR(-EINVAL); + + prop =3D of_find_property(np, name, NULL); + if (!prop) + return ERR_PTR(-ENOENT); + + if (prop->length % (3 * sizeof(u32))) + return ERR_PTR(-EINVAL); + sz =3D prop->length / (3 * sizeof(u32)); + + tunable =3D devm_kzalloc(dev, struct_size(tunable, values, sz), GFP_KERNE= L); + if (!tunable) + return ERR_PTR(-ENOMEM); + tunable->sz =3D sz; + + for (i =3D 0, p =3D NULL; i < tunable->sz; ++i) { + p =3D of_prop_next_u32(prop, p, &tunable->values[i].offset); + p =3D of_prop_next_u32(prop, p, &tunable->values[i].mask); + p =3D of_prop_next_u32(prop, p, &tunable->values[i].value); + + /* Sanity checks to catch bugs in our bootloader */ + if (tunable->values[i].offset % 4) + return ERR_PTR(-EINVAL); + if (tunable->values[i].offset > (resource_size(res) - 4)) + return ERR_PTR(-EINVAL); + } + + return tunable; +} +EXPORT_SYMBOL(devm_apple_tunable_parse); + +void apple_tunable_apply(void __iomem *regs, struct apple_tunable *tunable) +{ + size_t i; + + for (i =3D 0; i < tunable->sz; ++i) { + u32 val, old_val; + + old_val =3D readl(regs + tunable->values[i].offset); + val =3D old_val & ~tunable->values[i].mask; + val |=3D tunable->values[i].value; + if (val !=3D old_val) + writel(val, regs + tunable->values[i].offset); + } +} +EXPORT_SYMBOL(apple_tunable_apply); + +MODULE_LICENSE("Dual MIT/GPL"); +MODULE_AUTHOR("Sven Peter "); +MODULE_DESCRIPTION("Apple Silicon hardware tunable support"); diff --git a/include/linux/soc/apple/tunable.h b/include/linux/soc/apple/tu= nable.h new file mode 100644 index 0000000000000000000000000000000000000000..531ca814cd02357a0c5de6f3acd= e805294c13d4a --- /dev/null +++ b/include/linux/soc/apple/tunable.h @@ -0,0 +1,62 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ +/* + * Apple Silicon hardware tunable support + * + * Each tunable is a list with each entry containing a offset into the MMIO + * region, a mask of bits to be cleared and a set of bits to be set. These + * tunables are passed along by the previous boot stages and vary from dev= ice + * to device such that they cannot be hardcoded in the individual drivers. + * + * Copyright (C) The Asahi Linux Contributors + */ + +#ifndef _LINUX_SOC_APPLE_TUNABLE_H_ +#define _LINUX_SOC_APPLE_TUNABLE_H_ + +#include +#include + +/** + * Struct to store an Apple Silicon hardware tunable. + * + * Each tunable is a list with each entry containing a offset into the MMIO + * region, a mask of bits to be cleared and a set of bits to be set. These + * tunables are passed along by the previous boot stages and vary from dev= ice + * to device such that they cannot be hardcoded in the individual drivers. + * + * @param sz Number of [offset, mask, value] tuples stored in values. + * @param values [offset, mask, value] array. + */ +struct apple_tunable { + size_t sz; + struct { + u32 offset; + u32 mask; + u32 value; + } values[] __counted_by(sz); +}; + +/** + * Parse an array of hardware tunables from the device tree. + * + * @dev: Device node used for devm_kzalloc internally. + * @np: Device node which contains the tunable array. + * @name: Name of the device tree property which contains the tunables. + * @res: Resource to which the tunables will be applied, used for bound ch= ecking + * + * @return: devres allocated struct on success or PTR_ERR on failure. + */ +struct apple_tunable *devm_apple_tunable_parse(struct device *dev, + struct device_node *np, + const char *name, + struct resource *res); + +/** + * Apply a previously loaded hardware tunable. + * + * @param regs: MMIO to which the tunable will be applied. + * @param tunable: Pointer to the tunable. + */ +void apple_tunable_apply(void __iomem *regs, struct apple_tunable *tunable= ); + +#endif --=20 2.34.1