From nobody Tue Dec 2 01:51:05 2025 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B49F2347FED; Fri, 21 Nov 2025 11:27:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763724468; cv=none; b=e+h+ve69gDdq4x0gPgBpq8z4Wrl3oNSkPzcsjmVY3VZ0AekF6BeLYtf0zbZqtckYfwRPHu3YEdP7uRM0v57mts15ndgMwsh6g0tjpijsQ9kw8qYZoo1/2PzOz+Jx79dOUt6pv1nl41vlbOhE6GB9vGdsPaCmTn6yzCBMF11yHLk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763724468; c=relaxed/simple; bh=Eu4SFHiwNqPA8SYvGQfE3O0NOzxe0A5U5CTWodUZHvo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=G5A8ef2I03Dc3CHw0oK19Q/iMULhcmGVNYPRAfMYEhPlUcpHLyrcCPILN2uBHHW4y+2Fj34V5laWdxYkayV6SwWjQJIFzOOzZscb/9M7MxQiffeez9nyA8Mgi/JlPJwvCFsXMYwP1i1mudNs/C/HQ0ca9nLFy0CDPMv3W9BmNdo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: IEju188HQCG2GoX4ToRTVw== X-CSE-MsgGUID: c+hvDFQKTaCDSHLzBUFq0w== Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 21 Nov 2025 20:27:41 +0900 Received: from demon-pc.localdomain (unknown [10.226.92.224]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id B7F5C437C1A1; Fri, 21 Nov 2025 20:27:37 +0900 (JST) From: Cosmin Tanislav To: Geert Uytterhoeven , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Lad Prabhakar Cc: linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Cosmin Tanislav Subject: [PATCH 5/8] arm64: dts: renesas: r9a09g077: add GPIO IRQ support Date: Fri, 21 Nov 2025 13:26:23 +0200 Message-ID: <20251121112626.1395565-6-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251121112626.1395565-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20251121112626.1395565-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/T2H (R9A09G077) SoC includes pins which can be routed via the ICU to generate interrupts. Add support for using the pin controller as an interrupt chip. Signed-off-by: Cosmin Tanislav --- arch/arm64/boot/dts/renesas/r9a09g077.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi b/arch/arm64/boot/d= ts/renesas/r9a09g077.dtsi index 0af41287e6a8..6812af127684 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g077.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g077.dtsi @@ -945,6 +945,9 @@ pinctrl: pinctrl@802c0000 { gpio-controller; #gpio-cells =3D <2>; gpio-ranges =3D <&pinctrl 0 0 288>; + #interrupt-cells =3D <2>; + interrupt-controller; + interrupt-parent =3D <&icu>; power-domains =3D <&cpg>; }; =20 --=20 2.52.0