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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Nov 2025 10:19:09.2328 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bd726a4b-f8f8-4867-a9a4-08de28e768b8 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00022570.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4166 Content-Type: text/plain; charset="utf-8" This will allow the use of all of them for clear/fill buffer operations. Since drm_sched_entity_init requires a scheduler array, we store schedulers rather than rings. For the few places that need access to a ring, we can get it from the sched using container_of. Since the code is the same for all sdma versions, add a new helper amdgpu_sdma_set_buffer_funcs_scheds to set buffer_funcs_scheds based on the number of sdma instances. Note: the new sched array is identical to the amdgpu_vm_manager one. These 2 could be merged. Signed-off-by: Pierre-Eric Pelloux-Prayer Acked-by: Felix Kuehling --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 4 ++- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 31 +++++++++++++++++----- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 3 ++- drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 3 +-- drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 3 +-- drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 3 +-- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 6 +---- drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 6 +---- drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 6 ++--- drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 6 ++--- drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c | 3 +-- drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c | 3 +-- drivers/gpu/drm/amd/amdgpu/si_dma.c | 3 +-- drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 3 ++- 16 files changed, 47 insertions(+), 40 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdg= pu/amdgpu.h index a50e3c0a4b18..d07075fe2d8c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -1614,6 +1614,8 @@ ssize_t amdgpu_get_soft_full_reset_mask(struct amdgpu= _ring *ring); ssize_t amdgpu_show_reset_mask(char *buf, uint32_t supported_reset); void amdgpu_sdma_set_vm_pte_scheds(struct amdgpu_device *adev, const struct amdgpu_vm_pte_funcs *vm_pte_funcs); +void amdgpu_sdma_set_buffer_funcs_scheds(struct amdgpu_device *adev, + const struct amdgpu_buffer_funcs *buffer_funcs); =20 /* atpx handler */ #if defined(CONFIG_VGA_SWITCHEROO) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/a= md/amdgpu/amdgpu_device.c index 7167db54d722..9d3931d31d96 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -4527,7 +4527,7 @@ int amdgpu_device_init(struct amdgpu_device *adev, adev->num_rings =3D 0; RCU_INIT_POINTER(adev->gang_submit, dma_fence_get_stub()); adev->mman.buffer_funcs =3D NULL; - adev->mman.buffer_funcs_ring =3D NULL; + adev->mman.num_buffer_funcs_scheds =3D 0; adev->vm_manager.vm_pte_funcs =3D NULL; adev->vm_manager.vm_pte_num_scheds =3D 0; adev->gmc.gmc_funcs =3D NULL; diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/= amdgpu/amdgpu_gmc.c index 0d2784fe0be3..ff9a066870f2 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c @@ -651,12 +651,14 @@ int amdgpu_gmc_allocate_vm_inv_eng(struct amdgpu_devi= ce *adev) void amdgpu_gmc_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, uint32_t vmhub, uint32_t flush_type) { - struct amdgpu_ring *ring =3D adev->mman.buffer_funcs_ring; + struct amdgpu_ring *ring; struct amdgpu_vmhub *hub =3D &adev->vmhub[vmhub]; struct dma_fence *fence; struct amdgpu_job *job; int r; =20 + ring =3D to_amdgpu_ring(adev->mman.buffer_funcs_scheds[0]); + if (!hub->sdma_invalidation_workaround || vmid || !adev->mman.buffer_funcs_enabled || !adev->ib_pool_ready || !ring->sched.ready) { diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/= amdgpu/amdgpu_ttm.c index 575a4d4a1747..eec0cab8060c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -168,7 +168,7 @@ amdgpu_ttm_job_submit(struct amdgpu_device *adev, struc= t amdgpu_ttm_buffer_entit { struct amdgpu_ring *ring; =20 - ring =3D adev->mman.buffer_funcs_ring; + ring =3D to_amdgpu_ring(adev->mman.buffer_funcs_scheds[0]); amdgpu_ring_pad_ib(ring, &job->ibs[0]); WARN_ON(job->ibs[0].length_dw > num_dw); =20 @@ -2241,18 +2241,16 @@ u32 amdgpu_ttm_set_buffer_funcs_status(struct amdgp= u_device *adev, bool enable) adev->mman.buffer_funcs_enabled =3D=3D enable || adev->gmc.is_app_apu) return reserved_windows; =20 - if ((!adev->mman.buffer_funcs_ring || !adev->mman.buffer_funcs_ring->sche= d.ready) && + if ((!adev->mman.num_buffer_funcs_scheds || !adev->mman.buffer_funcs_sche= ds[0]->ready) && enable) { dev_warn(adev->dev, "Not enabling DMA transfers for in kernel use"); return 0; } =20 if (enable) { - struct amdgpu_ring *ring; struct drm_gpu_scheduler *sched; =20 - ring =3D adev->mman.buffer_funcs_ring; - sched =3D &ring->sched; + sched =3D adev->mman.buffer_funcs_scheds[0]; r =3D drm_sched_entity_init(&adev->mman.default_entity.base, DRM_SCHED_PRIORITY_KERNEL, &sched, 1, NULL); @@ -2387,7 +2385,7 @@ int amdgpu_copy_buffer(struct amdgpu_device *adev, unsigned int i; int r; =20 - ring =3D adev->mman.buffer_funcs_ring; + ring =3D to_amdgpu_ring(adev->mman.buffer_funcs_scheds[0]); =20 if (!ring->sched.ready) { dev_err(adev->dev, @@ -2624,6 +2622,27 @@ int amdgpu_ttm_evict_resources(struct amdgpu_device = *adev, int mem_type) return ttm_resource_manager_evict_all(&adev->mman.bdev, man); } =20 +void amdgpu_sdma_set_buffer_funcs_scheds(struct amdgpu_device *adev, + const struct amdgpu_buffer_funcs *buffer_funcs) +{ + struct amdgpu_vmhub *hub =3D &adev->vmhub[AMDGPU_GFXHUB(0)]; + struct drm_gpu_scheduler *sched; + int i; + + adev->mman.buffer_funcs =3D buffer_funcs; + + for (i =3D 0; i < adev->sdma.num_instances; i++) { + if (adev->sdma.has_page_queue) + sched =3D &adev->sdma.instance[i].page.sched; + else + sched =3D &adev->sdma.instance[i].ring.sched; + adev->mman.buffer_funcs_scheds[i] =3D sched; + } + + adev->mman.num_buffer_funcs_scheds =3D hub->sdma_invalidation_workaround ? + 1 : adev->sdma.num_instances; +} + #if defined(CONFIG_DEBUG_FS) =20 static int amdgpu_ttm_page_pool_show(struct seq_file *m, void *unused) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/= amdgpu/amdgpu_ttm.h index 0785a2c594f7..653a4d17543e 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h @@ -66,7 +66,8 @@ struct amdgpu_mman { =20 /* buffer handling */ const struct amdgpu_buffer_funcs *buffer_funcs; - struct amdgpu_ring *buffer_funcs_ring; + struct drm_gpu_scheduler *buffer_funcs_scheds[AMDGPU_MAX_RINGS]; + u32 num_buffer_funcs_scheds; bool buffer_funcs_enabled; =20 struct mutex gtt_window_lock; diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c b/drivers/gpu/drm/amd/am= dgpu/cik_sdma.c index 22780c09177d..26276dcfd458 100644 --- a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c +++ b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c @@ -1340,8 +1340,7 @@ static const struct amdgpu_buffer_funcs cik_sdma_buff= er_funcs =3D { =20 static void cik_sdma_set_buffer_funcs(struct amdgpu_device *adev) { - adev->mman.buffer_funcs =3D &cik_sdma_buffer_funcs; - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].ring; + amdgpu_sdma_set_buffer_funcs_scheds(adev, &cik_sdma_buffer_funcs); } =20 const struct amdgpu_ip_block_version cik_sdma_ip_block =3D diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c b/drivers/gpu/drm/amd/a= mdgpu/sdma_v2_4.c index 0090ace49024..c6a059ca59e5 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c @@ -1235,8 +1235,7 @@ static const struct amdgpu_buffer_funcs sdma_v2_4_buf= fer_funcs =3D { =20 static void sdma_v2_4_set_buffer_funcs(struct amdgpu_device *adev) { - adev->mman.buffer_funcs =3D &sdma_v2_4_buffer_funcs; - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].ring; + amdgpu_sdma_set_buffer_funcs_scheds(adev, &sdma_v2_4_buffer_funcs); } =20 const struct amdgpu_ip_block_version sdma_v2_4_ip_block =3D { diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/a= mdgpu/sdma_v3_0.c index 2526d393162a..cb516a25210d 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c @@ -1677,8 +1677,7 @@ static const struct amdgpu_buffer_funcs sdma_v3_0_buf= fer_funcs =3D { =20 static void sdma_v3_0_set_buffer_funcs(struct amdgpu_device *adev) { - adev->mman.buffer_funcs =3D &sdma_v3_0_buffer_funcs; - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].ring; + amdgpu_sdma_set_buffer_funcs_scheds(adev, &sdma_v3_0_buffer_funcs); } =20 const struct amdgpu_ip_block_version sdma_v3_0_ip_block =3D diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/a= mdgpu/sdma_v4_0.c index a35d9951e22a..f234ee54f39e 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c @@ -2615,11 +2615,7 @@ static const struct amdgpu_buffer_funcs sdma_v4_0_bu= ffer_funcs =3D { =20 static void sdma_v4_0_set_buffer_funcs(struct amdgpu_device *adev) { - adev->mman.buffer_funcs =3D &sdma_v4_0_buffer_funcs; - if (adev->sdma.has_page_queue) - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].page; - else - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].ring; + amdgpu_sdma_set_buffer_funcs_scheds(adev, &sdma_v4_0_buffer_funcs); } =20 static void sdma_v4_0_get_ras_error_count(uint32_t value, diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c b/drivers/gpu/drm/amd= /amdgpu/sdma_v4_4_2.c index 7f77367848d4..cd7627b03066 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c @@ -2316,11 +2316,7 @@ static const struct amdgpu_buffer_funcs sdma_v4_4_2_= buffer_funcs =3D { =20 static void sdma_v4_4_2_set_buffer_funcs(struct amdgpu_device *adev) { - adev->mman.buffer_funcs =3D &sdma_v4_4_2_buffer_funcs; - if (adev->sdma.has_page_queue) - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].page; - else - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].ring; + amdgpu_sdma_set_buffer_funcs_scheds(adev, &sdma_v4_4_2_buffer_funcs); } =20 /** diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/a= mdgpu/sdma_v5_0.c index 7ce13c5d4e61..5b495fda4f71 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c @@ -2073,10 +2073,8 @@ static const struct amdgpu_buffer_funcs sdma_v5_0_bu= ffer_funcs =3D { =20 static void sdma_v5_0_set_buffer_funcs(struct amdgpu_device *adev) { - if (adev->mman.buffer_funcs =3D=3D NULL) { - adev->mman.buffer_funcs =3D &sdma_v5_0_buffer_funcs; - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].ring; - } + if (adev->mman.buffer_funcs =3D=3D NULL) + amdgpu_sdma_set_buffer_funcs_scheds(adev, &sdma_v5_0_buffer_funcs); } =20 const struct amdgpu_ip_block_version sdma_v5_0_ip_block =3D { diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/a= mdgpu/sdma_v5_2.c index 98beff18cf28..be2d9e57c459 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c @@ -2084,10 +2084,8 @@ static const struct amdgpu_buffer_funcs sdma_v5_2_bu= ffer_funcs =3D { =20 static void sdma_v5_2_set_buffer_funcs(struct amdgpu_device *adev) { - if (adev->mman.buffer_funcs =3D=3D NULL) { - adev->mman.buffer_funcs =3D &sdma_v5_2_buffer_funcs; - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].ring; - } + if (adev->mman.buffer_funcs =3D=3D NULL) + amdgpu_sdma_set_buffer_funcs_scheds(adev, &sdma_v5_2_buffer_funcs); } =20 const struct amdgpu_ip_block_version sdma_v5_2_ip_block =3D { diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c b/drivers/gpu/drm/amd/a= mdgpu/sdma_v6_0.c index c32331b72ba0..ed8937fe76ea 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c @@ -1891,8 +1891,7 @@ static const struct amdgpu_buffer_funcs sdma_v6_0_buf= fer_funcs =3D { =20 static void sdma_v6_0_set_buffer_funcs(struct amdgpu_device *adev) { - adev->mman.buffer_funcs =3D &sdma_v6_0_buffer_funcs; - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].ring; + amdgpu_sdma_set_buffer_funcs_scheds(adev, &sdma_v6_0_buffer_funcs); } =20 const struct amdgpu_ip_block_version sdma_v6_0_ip_block =3D { diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c b/drivers/gpu/drm/amd/a= mdgpu/sdma_v7_0.c index 9318d23eb71e..f4c91153542c 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c @@ -1833,8 +1833,7 @@ static const struct amdgpu_buffer_funcs sdma_v7_0_buf= fer_funcs =3D { =20 static void sdma_v7_0_set_buffer_funcs(struct amdgpu_device *adev) { - adev->mman.buffer_funcs =3D &sdma_v7_0_buffer_funcs; - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].ring; + amdgpu_sdma_set_buffer_funcs_scheds(adev, &sdma_v7_0_buffer_funcs); } =20 const struct amdgpu_ip_block_version sdma_v7_0_ip_block =3D { diff --git a/drivers/gpu/drm/amd/amdgpu/si_dma.c b/drivers/gpu/drm/amd/amdg= pu/si_dma.c index b85df997ed49..ac6272fcffe9 100644 --- a/drivers/gpu/drm/amd/amdgpu/si_dma.c +++ b/drivers/gpu/drm/amd/amdgpu/si_dma.c @@ -833,8 +833,7 @@ static const struct amdgpu_buffer_funcs si_dma_buffer_f= uncs =3D { =20 static void si_dma_set_buffer_funcs(struct amdgpu_device *adev) { - adev->mman.buffer_funcs =3D &si_dma_buffer_funcs; - adev->mman.buffer_funcs_ring =3D &adev->sdma.instance[0].ring; + amdgpu_sdma_set_buffer_funcs_scheds(adev, &si_dma_buffer_funcs); } =20 const struct amdgpu_ip_block_version si_dma_ip_block =3D diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c b/drivers/gpu/drm/amd= /amdkfd/kfd_migrate.c index 5dd65f05a1e0..a149265e3611 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c @@ -128,13 +128,14 @@ svm_migrate_copy_memory_gart(struct amdgpu_device *ad= ev, dma_addr_t *sys, struct dma_fence **mfence) { const u64 GTT_MAX_PAGES =3D AMDGPU_GTT_MAX_TRANSFER_SIZE; - struct amdgpu_ring *ring =3D adev->mman.buffer_funcs_ring; + struct amdgpu_ring *ring; struct amdgpu_ttm_buffer_entity *entity; u64 gart_s, gart_d; struct dma_fence *next; u64 size; int r; =20 + ring =3D to_amdgpu_ring(adev->mman.buffer_funcs_scheds[0]); entity =3D &adev->mman.move_entities[0]; =20 mutex_lock(&entity->lock); --=20 2.43.0