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AJvYcCUgVgonyN/Ct8xRvQ1eB6k5BfQPi9AY7lvfB74fB6kLrW0j5WP6Kqe4YwOrmVTujwRckbzA8bfi4NjIgKs=@vger.kernel.org X-Gm-Message-State: AOJu0Ywcx4dUg431A75rKK8LwSAhWQBkMDAwBzd9uqKNx7ZivQYpgA4D bSUH86/USpf7BE7zkxqYURMBMqdSE+prVqM5FBUpRDFQ3lYiiIUM6xrAGLbAma1aBYXxbQMyyv4 nv5epOddLZ/RFrg197XgBXxfXLsUyOQ== X-Google-Smtp-Source: AGHT+IEt/Rnu04z2aH9Z9OLNbqRP/pUTKYo+u1/ArFiPePsuZbsDWIhlzIUZmUyy2hjC5k2QI/TnRwU+QRzQbAqqPns= X-Received: from plgu3.prod.google.com ([2002:a17:902:e803:b0:290:d4a1:13cb]) (user=willmcvicker job=prod-delivery.src-stubby-dispatcher) by 2002:a17:903:1a44:b0:258:f033:3ff9 with SMTP id d9443c01a7336-29b5b0fe951mr55111265ad.48.1763664180062; Thu, 20 Nov 2025 10:43:00 -0800 (PST) Date: Thu, 20 Nov 2025 18:42:33 +0000 In-Reply-To: <20251120184242.1625820-1-willmcvicker@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20251120184242.1625820-1-willmcvicker@google.com> X-Mailer: git-send-email 2.52.0.rc2.455.g230fcf2819-goog Message-ID: <20251120184242.1625820-6-willmcvicker@google.com> Subject: [PATCH v6 5/6] clocksource/drivers/exynos_mct: Add module support for ARM64 From: Will McVicker To: Russell King , Catalin Marinas , Will Deacon , Daniel Lezcano , Thomas Gleixner , Krzysztof Kozlowski , Alim Akhtar Cc: Will McVicker , Donghoon Yu , Hosung Kim , Rob Herring , John Stultz , Youngmin Nam , Peter Griffin , Tudor Ambarus , "=?UTF-8?q?Andr=C3=A9=20Draszik?=" , Conor Dooley , Marek Szyprowski , linux-samsung-soc@vger.kernel.org, kernel-team@android.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Donghoon Yu On Arm64 platforms the Exynos MCT driver can be built as a module. On boot (and even after boot) the arch_timer is used as the clocksource and tick timer. Once the MCT driver is loaded, it can be used as the wakeup source for the arch_timer. Signed-off-by: Donghoon Yu Signed-off-by: Youngmin Nam Signed-off-by: Daniel Lezcano [original commit from https://android.googlesource.com/kernel/gs/+/8a52a828= 8ec7d88ff78f0b37480dbb0e9c65bbfd] Reviewed-by: Youngmin Nam # AOSP -> Linux port Tested-by: Youngmin Nam # AOSP -> Linux port Signed-off-by: Will McVicker --- drivers/clocksource/Kconfig | 3 +- drivers/clocksource/exynos_mct.c | 62 ++++++++++++++++++++++++++++---- 2 files changed, 57 insertions(+), 8 deletions(-) diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index ffcd23668763..9450cfaf982f 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -451,7 +451,8 @@ config ATMEL_TCB_CLKSRC Support for Timer Counter Blocks on Atmel SoCs. =20 config CLKSRC_EXYNOS_MCT - bool "Exynos multi core timer driver" if COMPILE_TEST + tristate "Exynos multi core timer driver" if ARM64 + default y if ARCH_EXYNOS || COMPILE_TEST depends on ARM || ARM64 depends on ARCH_ARTPEC || ARCH_EXYNOS || COMPILE_TEST help diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_= mct.c index fece6bbc190e..55ce1d0b648e 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -15,9 +15,11 @@ #include #include #include +#include #include #include #include +#include #include #include =20 @@ -217,6 +219,7 @@ static struct clocksource mct_frc =3D { .mask =3D CLOCKSOURCE_MASK(32), .flags =3D CLOCK_SOURCE_IS_CONTINUOUS, .resume =3D exynos4_frc_resume, + .owner =3D THIS_MODULE, }; =20 /* @@ -241,7 +244,7 @@ static cycles_t exynos4_read_current_timer(void) } #endif =20 -static int __init exynos4_clocksource_init(bool frc_shared) +static int exynos4_clocksource_init(bool frc_shared) { /* * When the frc is shared, the main processor should have already @@ -336,6 +339,7 @@ static struct clock_event_device mct_comp_device =3D { .set_state_oneshot =3D mct_set_state_shutdown, .set_state_oneshot_stopped =3D mct_set_state_shutdown, .tick_resume =3D mct_set_state_shutdown, + .owner =3D THIS_MODULE, }; =20 static irqreturn_t exynos4_mct_comp_isr(int irq, void *dev_id) @@ -476,6 +480,7 @@ static int exynos4_mct_starting_cpu(unsigned int cpu) evt->features =3D CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERCPU; evt->rating =3D MCT_CLKEVENTS_RATING; + evt->owner =3D THIS_MODULE; =20 exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET); =20 @@ -511,7 +516,7 @@ static int exynos4_mct_dying_cpu(unsigned int cpu) return 0; } =20 -static int __init exynos4_timer_resources(struct device_node *np) +static int exynos4_timer_resources(struct device_node *np) { struct clk *mct_clk, *tick_clk; =20 @@ -539,7 +544,7 @@ static int __init exynos4_timer_resources(struct device= _node *np) * @local_idx: array mapping CPU numbers to local timer indices * @nr_local: size of @local_idx array */ -static int __init exynos4_timer_interrupts(struct device_node *np, +static int exynos4_timer_interrupts(struct device_node *np, unsigned int int_type, const u32 *local_idx, size_t nr_local) @@ -653,7 +658,7 @@ static int __init exynos4_timer_interrupts(struct devic= e_node *np, return err; } =20 -static int __init mct_init_dt(struct device_node *np, unsigned int int_typ= e) +static int mct_init_dt(struct device_node *np, unsigned int int_type) { bool frc_shared =3D of_property_read_bool(np, "samsung,frc-shared"); u32 local_idx[MCT_NR_LOCAL] =3D {0}; @@ -701,15 +706,58 @@ static int __init mct_init_dt(struct device_node *np,= unsigned int int_type) return exynos4_clockevent_init(); } =20 - -static int __init mct_init_spi(struct device_node *np) +static int mct_init_spi(struct device_node *np) { return mct_init_dt(np, MCT_INT_SPI); } =20 -static int __init mct_init_ppi(struct device_node *np) +static int mct_init_ppi(struct device_node *np) { return mct_init_dt(np, MCT_INT_PPI); } + +#ifdef CONFIG_ARM +/* Note, legacy ARM 32-bit systems depend on the MCT as the only clocksour= ce + * which requires this driver to be initialized very early. We need to kee= p this + * special condition until we can transparently support modular and early = init + * timers. + */ TIMER_OF_DECLARE(exynos4210, "samsung,exynos4210-mct", mct_init_spi); TIMER_OF_DECLARE(exynos4412, "samsung,exynos4412-mct", mct_init_ppi); +#else +static int exynos4_mct_probe(struct platform_device *pdev) +{ + struct device *dev =3D &pdev->dev; + int (*mct_init)(struct device_node *np); + + mct_init =3D of_device_get_match_data(dev); + if (!mct_init) + return -EINVAL; + + return mct_init(dev->of_node); +} + +static const struct of_device_id exynos4_mct_match_table[] =3D { + { .compatible =3D "samsung,exynos4210-mct", .data =3D &mct_init_spi, }, + { .compatible =3D "samsung,exynos4412-mct", .data =3D &mct_init_ppi, }, + {} +}; +MODULE_DEVICE_TABLE(of, exynos4_mct_match_table); + +static struct platform_driver exynos4_mct_driver =3D { + .probe =3D exynos4_mct_probe, + .driver =3D { + .name =3D "exynos-mct", + .of_match_table =3D exynos4_mct_match_table, + }, +}; + +static __init int exynos_mct_init(void) +{ + return platform_driver_register(&exynos4_mct_driver); +} +module_init(exynos_mct_init); + +MODULE_DESCRIPTION("Exynos Multi Core Timer Driver"); +MODULE_LICENSE("GPL"); +#endif /* CONFIG_ARM */ --=20 2.52.0.rc2.455.g230fcf2819-goog