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[114.145.28.12]) by smtp.googlemail.com with ESMTPSA id d9443c01a7336-29b5b1387e3sm22381035ad.24.2025.11.20.02.39.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Nov 2025 02:39:15 -0800 (PST) From: Daniel Palmer To: geert@linux-m68k.org, schmitzmic@gmail.com, gerg@kernel.org, linux-m68k@lists.linux-m68k.org Cc: linux-kernel@vger.kernel.org, Daniel Palmer Subject: [PATCH v2 1/2] m68k: mm: motorola: Split the early term containing the end of the RO region Date: Thu, 20 Nov 2025 19:38:53 +0900 Message-ID: <20251120103854.1630306-2-daniel@thingy.jp> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251120103854.1630306-1-daniel@thingy.jp> References: <20251120103854.1630306-1-daniel@thingy.jp> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" On the 020/030 the end of the RO region (from the start of kernel text to the end of the RO data) can end up on an "early termination" that represents 64 pages and is modelled as a pmd in the kernel. You cannot set flags on individual pages in the pmd as the pte level doesn't exist in the tables. This means it's not possible to set the write protect bit for a range of pages in the pmd and you either need to push RW stuff onto the next pmd which wastes memory or convert the early termination into a normal pmd with ptes first. There is already some logic for splitting the pmd at the start of memory into ptes so the first page can be unmapped. Refactor that logic out into a little function and use it for the existing use case and splitting the pmd that the tail of the RO region is on so its possible to set the wp bit on the RO pages within. Signed-off-by: Daniel Palmer --- arch/m68k/mm/motorola.c | 47 ++++++++++++++++++++++++++++++++--------- 1 file changed, 37 insertions(+), 10 deletions(-) diff --git a/arch/m68k/mm/motorola.c b/arch/m68k/mm/motorola.c index 62283bc2ed79..9b5b9a52f819 100644 --- a/arch/m68k/mm/motorola.c +++ b/arch/m68k/mm/motorola.c @@ -298,6 +298,24 @@ static pmd_t * __init kernel_ptr_table(void) return last_pmd_table; } =20 +/* + * This splits an early term created by head.S into ptes + * so things like removing pages in the range, marking + * part of the range as write protected can happen. + */ +static inline pte_t * __init __split_early_term(unsigned long physaddr) +{ + pte_t *pte_dir, *pte_dir_tmp; + + pte_dir =3D kernel_page_table(); + pte_dir_tmp =3D pte_dir; + + for (int i =3D 0; i < PTRS_PER_PTE; physaddr +=3D PAGE_SIZE, i++) + pte_val(*pte_dir_tmp++) =3D physaddr; + + return pte_dir; +} + static void __init map_node(int node) { unsigned long physaddr, virtaddr, size; @@ -348,25 +366,34 @@ static void __init map_node(int node) =20 if (CPU_IS_020_OR_030) { if (virtaddr) { + const unsigned long ro_tail_pmd =3D + ((unsigned long) __end_rodata) & PMD_MASK; + + if (virtaddr =3D=3D ro_tail_pmd) { +#ifdef DEBUG + printk("[wp split]\n"); +#endif + pte_dir =3D __split_early_term(physaddr); + pmd_set(pmd_dir, pte_dir); +} + else { #ifdef DEBUG - printk ("[early term]"); + printk("[early term]"); #endif - pmd_val(*pmd_dir) =3D physaddr; - physaddr +=3D PMD_SIZE; + pmd_val(*pmd_dir) =3D physaddr; + } } else { - int i; #ifdef DEBUG printk ("[zero map]"); #endif - pte_dir =3D kernel_page_table(); + pte_dir =3D __split_early_term(physaddr); + /* Remove the zero page */ + pte_val(*pte_dir) =3D 0; pmd_set(pmd_dir, pte_dir); - - pte_val(*pte_dir++) =3D 0; - physaddr +=3D PAGE_SIZE; - for (i =3D 1; i < PTRS_PER_PTE; physaddr +=3D PAGE_SIZE, i++) - pte_val(*pte_dir++) =3D physaddr; } + size -=3D PMD_SIZE; + physaddr +=3D PMD_SIZE; virtaddr +=3D PMD_SIZE; } else { if (!pmd_present(*pmd_dir)) { --=20 2.51.0