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Peter Anvin" , Paolo Bonzini , Sean Christopherson , kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Chao Gao , Zhao Liu , Xudong Hao Subject: [PATCH 4/4] KVM: x86: Advertise AVX10_VNNI_INT CPUID to userspace Date: Thu, 20 Nov 2025 13:07:20 +0800 Message-Id: <20251120050720.931449-5-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251120050720.931449-1-zhao1.liu@intel.com> References: <20251120050720.931449-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Define and pass AVX10_VNNI_INT CPUID through to the guest. AVX10_VNNI_INT (0x24.0x1.ECX[bit 2]) is a discrete feature bit introduced on Intel Diamond Rapids, which enumerates the support for EVEX VPDP* instructions for INT8/INT16 [*]. Since this feature has no actual kernel usages, define it as a KVM-only feature in reverse_cpuid.h. Advertise new CPUID subleaf 0x24.0x1 with AVX10_VNNI_INT bit to userspace for guest use. It's safe since no additional enabling work is needed in the host kernel. [*]: Intel Advanced Vector Extensions 10.2 Architecture Specification (rev 5.0). Tested-by: Xudong Hao Signed-off-by: Zhao Liu --- Reference link: https://cdrdv2.intel.com/v1/dl/getContent/856721 --- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/cpuid.c | 18 +++++++++++++++++- arch/x86/kvm/reverse_cpuid.h | 4 ++++ 3 files changed, 22 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_hos= t.h index db7bf364f4fc..992a0abbcc48 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -777,6 +777,7 @@ enum kvm_only_cpuid_leafs { CPUID_8000_0021_ECX, CPUID_7_1_ECX, CPUID_1E_1_EAX, + CPUID_24_1_ECX, NR_KVM_CPU_CAPS, =20 NKVMCAPINTS =3D NR_KVM_CPU_CAPS - NCAPINTS, diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 984fbee2795e..58db5a87757e 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -1074,6 +1074,10 @@ void kvm_set_cpu_caps(void) F(AVX10_512), ); =20 + kvm_cpu_cap_init(CPUID_24_1_ECX, + F(AVX10_VNNI_INT), + ); + kvm_cpu_cap_init(CPUID_8000_0001_ECX, F(LAHF_LM), F(CMP_LEGACY), @@ -1650,6 +1654,7 @@ static inline int __do_cpuid_func(struct kvm_cpuid_ar= ray *array, u32 function) break; } =20 + max_idx =3D entry->eax =3D min(entry->eax, 1u); /* * The AVX10 version is encoded in EBX[7:0]. Note, the version * is guaranteed to be >=3D1 if AVX10 is supported. Note #2, the @@ -1659,9 +1664,20 @@ static inline int __do_cpuid_func(struct kvm_cpuid_a= rray *array, u32 function) cpuid_entry_override(entry, CPUID_24_0_EBX); entry->ebx |=3D avx10_version; =20 - entry->eax =3D 0; entry->ecx =3D 0; entry->edx =3D 0; + + /* KVM only supports up to 0x24.0x1, capped above via min(). */ + if (max_idx >=3D 1) { + entry =3D do_host_cpuid(array, function, 1); + if (!entry) + goto out; + + cpuid_entry_override(entry, CPUID_24_1_ECX); + entry->eax =3D 0; + entry->ebx =3D 0; + entry->edx =3D 0; + } break; } case KVM_CPUID_SIGNATURE: { diff --git a/arch/x86/kvm/reverse_cpuid.h b/arch/x86/kvm/reverse_cpuid.h index 99ec9e656655..a240abaaa5e0 100644 --- a/arch/x86/kvm/reverse_cpuid.h +++ b/arch/x86/kvm/reverse_cpuid.h @@ -59,6 +59,9 @@ #define X86_FEATURE_AVX10_256 KVM_X86_FEATURE(CPUID_24_0_EBX, 17) #define X86_FEATURE_AVX10_512 KVM_X86_FEATURE(CPUID_24_0_EBX, 18) =20 +/* Intel-defined sub-features, CPUID level 0x00000024:1 (ECX) */ +#define X86_FEATURE_AVX10_VNNI_INT KVM_X86_FEATURE(CPUID_24_1_ECX, 2) + /* CPUID level 0x80000007 (EDX). */ #define KVM_X86_FEATURE_CONSTANT_TSC KVM_X86_FEATURE(CPUID_8000_0007_EDX, = 8) =20 @@ -102,6 +105,7 @@ static const struct cpuid_reg reverse_cpuid[] =3D { [CPUID_8000_0021_ECX] =3D {0x80000021, 0, CPUID_ECX}, [CPUID_7_1_ECX] =3D { 7, 1, CPUID_ECX}, [CPUID_1E_1_EAX] =3D { 0x1e, 1, CPUID_EAX}, + [CPUID_24_1_ECX] =3D { 0x24, 1, CPUID_ECX}, }; =20 /* --=20 2.34.1