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client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by CH1PEPF0000AD7B.mail.protection.outlook.com (10.167.244.58) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9343.9 via Frontend Transport; Thu, 20 Nov 2025 03:19:54 +0000 Received: from ethanolx50f7host.amd.com (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Wed, 19 Nov 2025 19:19:40 -0800 From: Smita Koralahalli To: , , , , CC: Alison Schofield , Vishal Verma , Ira Weiny , Dan Williams , Jonathan Cameron , Yazen Ghannam , Dave Jiang , Davidlohr Bueso , Matthew Wilcox , Jan Kara , "Rafael J . Wysocki" , Len Brown , Pavel Machek , Li Ming , Jeff Johnson , "Ying Huang" , Yao Xingtao , Peter Zijlstra , Greg KH , Nathan Fontenot , Terry Bowman , Robert Richter , Benjamin Cheatham , Zhijian Li , "Borislav Petkov" , Ard Biesheuvel Subject: [PATCH v4 6/9] cxl/region: Add register_dax flag to defer DAX setup Date: Thu, 20 Nov 2025 03:19:22 +0000 Message-ID: <20251120031925.87762-7-Smita.KoralahalliChannabasappa@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20251120031925.87762-1-Smita.KoralahalliChannabasappa@amd.com> References: <20251120031925.87762-1-Smita.KoralahalliChannabasappa@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD7B:EE_|MN2PR12MB4424:EE_ X-MS-Office365-Filtering-Correlation-Id: a1328027-235f-4cb3-6040-08de27e3ad2c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|7416014|82310400026|36860700013; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?SYLgpHzE21Ka0LQ0+9/C5YRXkACktLEDhojjXngWHyS+WuLfc5e9Guq4vUmO?= =?us-ascii?Q?W9zKaDxXoF2/J7LxyF8Exp5fxlcPlW7ol4//1gu6fMj1matrRFMWIfaPzGri?= =?us-ascii?Q?yg2pRj6DNCabUf89BcMW5mEua5ORyhmDfP3bGC/Im1NhoxiuQ/8MHGONdrEW?= =?us-ascii?Q?qPNxro7kUBGK+/ygQWbxVPYbUBGVbfU5SesgeKdR/Nrlmj1e5G2P9rZgQh5u?= =?us-ascii?Q?WImyWUJ+oC85zZMh+W5ZoctKgmXG7ojkL07PkZZ+EMGc+WQvdqm/AXG8G8uk?= =?us-ascii?Q?DAXEnT6+aIT2QkNJE7o7pe7DIW4l8v6G4aVwZJRwpdlwe85hGhE6RF+8Y1Gg?= =?us-ascii?Q?Umn5FiT69mFGe2txCXx1mEc0GJsu/98GQnj03A/1YPDtna5kWRKZUqc/AJJp?= =?us-ascii?Q?1tOINDDv/IEbmX1WBS2C9DiLMoBdHReApsJufW0+4x4l92IvRcEwXEPQdB83?= =?us-ascii?Q?W+T9LV6gqcdDfRK7c1493ErGhZnH+VSUWazUnrXK12vgK1tmvTI5usTAi21T?= =?us-ascii?Q?64FuraPAo3KZvfbULzlr2wl5EZD7TL+8/MaHm4ZQ0kyT2Uq44S4kb8dQ66q/?= =?us-ascii?Q?NCPNVmKgoaYl2na2Gndg2+E/PekTLlV6iiHdv+jyluBclmt5uX8fyLmRuhvK?= =?us-ascii?Q?ebwwg9cVo9tkYL/OE4KQoxGFG6Rl67Llko84S+c/pycy19CJrQcZvJd9W3Bv?= =?us-ascii?Q?1sCnye8QeUFHRb4CKvO7J8MexTUt7v2GdlB0OtbSR2Tt+jMXGC36DGGZ1hvQ?= =?us-ascii?Q?JsBvt0qKXkQ4vFl9suSpynB01OsM4AVw8MMd3YWS8Q2ZFiNJQBk33gZY8zUz?= =?us-ascii?Q?DmYDODgPjactCS8/ykg0V6immTu/W5SUYWYANPy0MO3T/VT8WV1zOd7JvToz?= =?us-ascii?Q?BTw4OcTwWCpFUSgsBrkx+GK2L3Q7hgKFJEUWaFNCxIssE0RhC+gOA1IyM9mE?= =?us-ascii?Q?nrUKrC8BYW5XhueOFbSR6268Z8hpGI0y+DwtdMLGmUse8DV4oge8G0cF4J4g?= =?us-ascii?Q?Jj5a6c0qceaiS1s4hNsH3mVNMaVf3Rw9QXJDat/7nLTIKWyXuVxDLxkfkt+D?= =?us-ascii?Q?l3nmyVvsU3vsmu659G9BqMVWBiP6Ze1Zx83H71ZvCKzCBPF+ikxu9Uzk+u8C?= =?us-ascii?Q?WRfmqyJnE8O3Sa+QeWoYSPidQF5MHOmFP54FSainnfTjPTzWqBV7W+rI1ON2?= =?us-ascii?Q?eVknJfoFvXhik3BU98kSS0BQGe6ool06/N3ossQcVCc+Fi4PdSae719vNcy/?= =?us-ascii?Q?Bu1Qg3B/vH4Q0uZgfZD07E8AED8ovGbiG4y8M2JgDNYUuciODLZDxR9Nkeuz?= =?us-ascii?Q?iO0uYbAxRcGwrMpvQxtM8wHw6fVvR3hiwmh9KAV8DKIXXasmQULA3ZQ+cu8r?= =?us-ascii?Q?c3SYDT6h/R7p+steZRFqbrb2jhNflVRSFs414bhUERAK9GyfBD/bA/JhonzS?= =?us-ascii?Q?PoiGFf0vj/jIKO2XVoSutSeqTANOU7lIKGoFj4ff6+WJ+lhj3mYVzb67Sbj1?= =?us-ascii?Q?Ct99bONfglW3oS1K2hwnlg0SdeBZ1kWhjf33ISq1WtcP2DMSipB5ot1BRvFL?= =?us-ascii?Q?klL4rRgkdFB0r5uTrKQ=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(376014)(7416014)(82310400026)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Nov 2025 03:19:54.9296 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a1328027-235f-4cb3-6040-08de27e3ad2c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD7B.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4424 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Stop creating cxl_dax during cxl_region_probe(). Early DAX registration can online memory before ownership of Soft Reserved ranges is finalized. This makes it difficult to tear down regions later when HMEM determines that a region should not claim that range. Introduce a register_dax flag in struct cxl_region_params and gate DAX registration on this flag. Leave probe time registration disabled for regions discovered during early CXL enumeration; set the flag only for regions created dynamically at runtime to preserve existing behaviour. This patch prepares the region code for later changes where cxl_dax setup occurs from the HMEM path only after ownership arbitration completes. Signed-off-by: Smita Koralahalli --- drivers/cxl/core/region.c | 21 ++++++++++++++++----- drivers/cxl/cxl.h | 1 + 2 files changed, 17 insertions(+), 5 deletions(-) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 94dbbd6b5513..c17cd8706b9d 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -2540,9 +2540,11 @@ static int cxl_region_calculate_adistance(struct not= ifier_block *nb, static struct cxl_region *devm_cxl_add_region(struct cxl_root_decoder *cxl= rd, int id, enum cxl_partition_mode mode, - enum cxl_decoder_type type) + enum cxl_decoder_type type, + bool register_dax) { struct cxl_port *port =3D to_cxl_port(cxlrd->cxlsd.cxld.dev.parent); + struct cxl_region_params *p; struct cxl_region *cxlr; struct device *dev; int rc; @@ -2553,6 +2555,9 @@ static struct cxl_region *devm_cxl_add_region(struct = cxl_root_decoder *cxlrd, cxlr->mode =3D mode; cxlr->type =3D type; =20 + p =3D &cxlr->params; + p->register_dax =3D register_dax; + dev =3D &cxlr->dev; rc =3D dev_set_name(dev, "region%d", id); if (rc) @@ -2593,7 +2598,8 @@ static ssize_t create_ram_region_show(struct device *= dev, } =20 static struct cxl_region *__create_region(struct cxl_root_decoder *cxlrd, - enum cxl_partition_mode mode, int id) + enum cxl_partition_mode mode, int id, + bool register_dax) { int rc; =20 @@ -2615,7 +2621,8 @@ static struct cxl_region *__create_region(struct cxl_= root_decoder *cxlrd, return ERR_PTR(-EBUSY); } =20 - return devm_cxl_add_region(cxlrd, id, mode, CXL_DECODER_HOSTONLYMEM); + return devm_cxl_add_region(cxlrd, id, mode, CXL_DECODER_HOSTONLYMEM, + register_dax); } =20 static ssize_t create_region_store(struct device *dev, const char *buf, @@ -2629,7 +2636,7 @@ static ssize_t create_region_store(struct device *dev= , const char *buf, if (rc !=3D 1) return -EINVAL; =20 - cxlr =3D __create_region(cxlrd, mode, id); + cxlr =3D __create_region(cxlrd, mode, id, true); if (IS_ERR(cxlr)) return PTR_ERR(cxlr); =20 @@ -3523,7 +3530,7 @@ static struct cxl_region *construct_region(struct cxl= _root_decoder *cxlrd, =20 do { cxlr =3D __create_region(cxlrd, cxlds->part[part].mode, - atomic_read(&cxlrd->region_id)); + atomic_read(&cxlrd->region_id), false); } while (IS_ERR(cxlr) && PTR_ERR(cxlr) =3D=3D -EBUSY); =20 if (IS_ERR(cxlr)) { @@ -3930,6 +3937,10 @@ static int cxl_region_probe(struct device *dev) p->res->start, p->res->end, cxlr, is_system_ram) > 0) return 0; + + if (!p->register_dax) + return 0; + return devm_cxl_add_dax_region(cxlr); default: dev_dbg(&cxlr->dev, "unsupported region mode: %d\n", diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index af78c9fd37f2..324220596890 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -495,6 +495,7 @@ struct cxl_region_params { struct cxl_endpoint_decoder *targets[CXL_DECODER_MAX_INTERLEAVE]; int nr_targets; resource_size_t cache_size; + bool register_dax; }; =20 enum cxl_partition_mode { --=20 2.17.1