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client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by CH1PEPF0000AD7A.mail.protection.outlook.com (10.167.244.59) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9343.9 via Frontend Transport; Thu, 20 Nov 2025 03:19:37 +0000 Received: from ethanolx50f7host.amd.com (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Wed, 19 Nov 2025 19:19:36 -0800 From: Smita Koralahalli To: , , , , CC: Alison Schofield , Vishal Verma , Ira Weiny , Dan Williams , Jonathan Cameron , Yazen Ghannam , Dave Jiang , Davidlohr Bueso , Matthew Wilcox , Jan Kara , "Rafael J . Wysocki" , Len Brown , Pavel Machek , Li Ming , Jeff Johnson , "Ying Huang" , Yao Xingtao , Peter Zijlstra , Greg KH , Nathan Fontenot , Terry Bowman , Robert Richter , Benjamin Cheatham , Zhijian Li , "Borislav Petkov" , Ard Biesheuvel Subject: [PATCH v4 1/9] dax/hmem, e820, resource: Defer Soft Reserved insertion until hmem is ready Date: Thu, 20 Nov 2025 03:19:17 +0000 Message-ID: <20251120031925.87762-2-Smita.KoralahalliChannabasappa@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20251120031925.87762-1-Smita.KoralahalliChannabasappa@amd.com> References: <20251120031925.87762-1-Smita.KoralahalliChannabasappa@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD7A:EE_|DM6PR12MB4187:EE_ X-MS-Office365-Filtering-Correlation-Id: 9dfcb96a-98dd-4d02-e9ff-08de27e3a2d0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|82310400026|376014|7416014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?Os3U+mGKs4LdhYCNM2+eeFLN1kHciZeuiSa9RNVFhz/Wxb+I5/r9VPO96fHh?= =?us-ascii?Q?k9d1ZPhF8327lJ1ihxLpDGsMulztcr7hjM5rImNsXNaPBRrk1MrG3ugt3CBe?= =?us-ascii?Q?/rik08PMmglub2BjPPGUE9+93MOdrPdwm1piyX4582N54YbP82QWL2CGVi6d?= =?us-ascii?Q?at9m+9rpOSoUMJLxxCvvPDjzI8KmxHkT5KvvDctmGWr3V/sQO3SyfyLpcfqn?= =?us-ascii?Q?Oy3GuIKcySrCT2s6WVsUuhgWaITKOSudZl2aFidRmdBRInv4ktjdfXMTQblI?= =?us-ascii?Q?YMdBs6fy8+i2mVWM5nwPO9Cieag0MBBUomqQfuW79M1R/APx4g05iAqg3JTQ?= =?us-ascii?Q?iVEWCMpeTdJxhRPeKyCHNur4OPzA1omnPBuQmvk113y8M9TEXTDFlalYoYm8?= =?us-ascii?Q?dwPvne2SBq1yeAagihZwUj4uuPo8TdBFloOr2eDrKTBDgLpveMRYJlDjTQs/?= =?us-ascii?Q?3/FE3+/VL99MvE4pm9Q+AscSYTtBRhL/S+DsGIWgxr1Prv+Mjw2kjsRXd1rZ?= =?us-ascii?Q?Wn7phA/k6OpJAb/0vOkttKvYHLYmpYCJsx3lM/qwDd8ej/XNZpDyH8YI57eh?= =?us-ascii?Q?AjO9f5z6ueBYCdrxjFHlH0WmoUOzFryDZoDZIct1hKD5Oss17yQzBT9vRt81?= =?us-ascii?Q?HD3bwxxaTsqcW3gvRSh04l7iwFnYBfPpWqFJMWiQscWbKaH7TOE6SH23LR63?= =?us-ascii?Q?LoHNizk0safrLAhb/GR8Aa07ptZ6/uwPagCxOkozH8D0s8IzARfFof7KKP8y?= =?us-ascii?Q?cOlghw6u+pP78w1crwk50/wCFBLNw6frc2OWMjWUvX/txOD4OntdkT26DWk1?= =?us-ascii?Q?BJmOUmJV7OgY0v9LrrzgqwIoL/ZJSvOVtfkVgA1qbDuKzSVyOmAuwY6OfeSh?= =?us-ascii?Q?pLj0WiLVTEi/QlpGZuRCDr2HB4aE23zunRr4DSaK5HS3ZZaW8NTH++KhF0hr?= =?us-ascii?Q?r88B92pqF7lS5jvcElJyiXet5eho9hdN3mEs3cZPF+kERnLAP+ygDb5Ney3S?= =?us-ascii?Q?JbhC9xjeN9Z3dC0OFe6RfcXsDv3rEC5RL6EYoilQoKsUB1spH/5fa12bJW95?= =?us-ascii?Q?3Si6Ls9igRhbzMTfPhWSLMzwPy48WKJFTTEtwCfMLRSxonbJEZO4ZyGhkrTJ?= =?us-ascii?Q?IHdjtwFuMkjw1W2SNWH4lpsMSUV7IXX96aVVLseor6ad8zSHCFHqIffZ5d4X?= =?us-ascii?Q?bpxYl88YhgF+0OmD+IoO7IcG5TP4Y95YvJpHkcuqOz9lJt+Y6+Nwosmd3YfK?= =?us-ascii?Q?tXJH/0/YOTB7ClEEFOovTyg9gBlptE7uApPSbKIMmGjZy1bBlt493fhOMOiz?= =?us-ascii?Q?zPpzJBBlhWG4C8Pi4aPTWE9u3QNm0TPNdKKRyCxV2uQxsewy12YAcoFmP8ch?= =?us-ascii?Q?dOFdiT8RH6INDfw8MXb+RATjPE+ofWlRh0S1SfqX22GnoFZRTtw5C0o0lVfK?= =?us-ascii?Q?yJhQy75VF96xEklKm3YYAl0/YgKPkkcZSsRhgdCTKlpw/uXiDD4ZNJBaomFy?= =?us-ascii?Q?I1TQ1AfcBAVRoyjvQMDQYrmOjl/vgJQH+AQnbL8o5VO9XS5YEEHtwm0WJ+fY?= =?us-ascii?Q?TGIIbYpcUaKUKmB2TEs=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(1800799024)(82310400026)(376014)(7416014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Nov 2025 03:19:37.5522 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9dfcb96a-98dd-4d02-e9ff-08de27e3a2d0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD7A.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4187 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Dan Williams Insert Soft Reserved memory into a dedicated soft_reserve_resource tree instead of the iomem_resource tree at boot. Delay publishing these ranges into the iomem hierarchy until ownership is resolved and the HMEM path is ready to consume them. Publishing Soft Reserved ranges into iomem too early conflicts with CXL hotplug and prevents region assembly when those ranges overlap CXL windows. Follow up patches will reinsert Soft Reserved ranges into iomem after CXL window publication is complete and HMEM is ready to claim the memory. This provides a cleaner handoff between EFI-defined memory ranges and CXL resource management without trimming or deleting resources later. Signed-off-by: Dan Williams Signed-off-by: Smita Koralahalli --- arch/x86/kernel/e820.c | 2 +- drivers/cxl/acpi.c | 2 +- drivers/dax/hmem/device.c | 4 +- drivers/dax/hmem/hmem.c | 7 ++- include/linux/ioport.h | 13 +++++- kernel/resource.c | 92 +++++++++++++++++++++++++++++++++------ 6 files changed, 100 insertions(+), 20 deletions(-) diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c index c3acbd26408b..c32f144f0e4a 100644 --- a/arch/x86/kernel/e820.c +++ b/arch/x86/kernel/e820.c @@ -1153,7 +1153,7 @@ void __init e820__reserve_resources_late(void) res =3D e820_res; for (i =3D 0; i < e820_table->nr_entries; i++) { if (!res->parent && res->end) - insert_resource_expand_to_fit(&iomem_resource, res); + insert_resource_expand_to_fit(res); res++; } =20 diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c index bd2e282ca93a..b37858f797be 100644 --- a/drivers/cxl/acpi.c +++ b/drivers/cxl/acpi.c @@ -847,7 +847,7 @@ static int add_cxl_resources(struct resource *cxl_res) */ cxl_set_public_resource(res, new); =20 - insert_resource_expand_to_fit(&iomem_resource, new); + __insert_resource_expand_to_fit(&iomem_resource, new); =20 next =3D res->sibling; while (next && resource_overlaps(new, next)) { diff --git a/drivers/dax/hmem/device.c b/drivers/dax/hmem/device.c index f9e1a76a04a9..22732b729017 100644 --- a/drivers/dax/hmem/device.c +++ b/drivers/dax/hmem/device.c @@ -83,8 +83,8 @@ static __init int hmem_register_one(struct resource *res,= void *data) =20 static __init int hmem_init(void) { - walk_iomem_res_desc(IORES_DESC_SOFT_RESERVED, - IORESOURCE_MEM, 0, -1, NULL, hmem_register_one); + walk_soft_reserve_res_desc(IORES_DESC_SOFT_RESERVED, IORESOURCE_MEM, 0, + -1, NULL, hmem_register_one); return 0; } =20 diff --git a/drivers/dax/hmem/hmem.c b/drivers/dax/hmem/hmem.c index c18451a37e4f..48f4642f4bb8 100644 --- a/drivers/dax/hmem/hmem.c +++ b/drivers/dax/hmem/hmem.c @@ -73,11 +73,14 @@ static int hmem_register_device(struct device *host, in= t target_nid, return 0; } =20 - rc =3D region_intersects(res->start, resource_size(res), IORESOURCE_MEM, - IORES_DESC_SOFT_RESERVED); + rc =3D region_intersects_soft_reserve(res->start, resource_size(res), + IORESOURCE_MEM, + IORES_DESC_SOFT_RESERVED); if (rc !=3D REGION_INTERSECTS) return 0; =20 + /* TODO: Add Soft-Reserved memory back to iomem */ + id =3D memregion_alloc(GFP_KERNEL); if (id < 0) { dev_err(host, "memregion allocation failure for %pr\n", res); diff --git a/include/linux/ioport.h b/include/linux/ioport.h index e8b2d6aa4013..e20226870a81 100644 --- a/include/linux/ioport.h +++ b/include/linux/ioport.h @@ -232,6 +232,9 @@ struct resource_constraint { /* PC/ISA/whatever - the normal PC address spaces: IO and memory */ extern struct resource ioport_resource; extern struct resource iomem_resource; +#ifdef CONFIG_EFI_SOFT_RESERVE +extern struct resource soft_reserve_resource; +#endif =20 extern struct resource *request_resource_conflict(struct resource *root, s= truct resource *new); extern int request_resource(struct resource *root, struct resource *new); @@ -242,7 +245,8 @@ extern void reserve_region_with_split(struct resource *= root, const char *name); extern struct resource *insert_resource_conflict(struct resource *parent, = struct resource *new); extern int insert_resource(struct resource *parent, struct resource *new); -extern void insert_resource_expand_to_fit(struct resource *root, struct re= source *new); +extern void __insert_resource_expand_to_fit(struct resource *root, struct = resource *new); +extern void insert_resource_expand_to_fit(struct resource *new); extern int remove_resource(struct resource *old); extern void arch_remove_reservations(struct resource *avail); extern int allocate_resource(struct resource *root, struct resource *new, @@ -409,6 +413,13 @@ walk_system_ram_res_rev(u64 start, u64 end, void *arg, extern int walk_iomem_res_desc(unsigned long desc, unsigned long flags, u64 start, u6= 4 end, void *arg, int (*func)(struct resource *, void *)); +extern int +walk_soft_reserve_res_desc(unsigned long desc, unsigned long flags, + u64 start, u64 end, void *arg, + int (*func)(struct resource *, void *)); +extern int +region_intersects_soft_reserve(resource_size_t start, size_t size, + unsigned long flags, unsigned long desc); =20 struct resource *devm_request_free_mem_region(struct device *dev, struct resource *base, unsigned long size); diff --git a/kernel/resource.c b/kernel/resource.c index b9fa2a4ce089..208eaafcc681 100644 --- a/kernel/resource.c +++ b/kernel/resource.c @@ -321,13 +321,14 @@ static bool is_type_match(struct resource *p, unsigne= d long flags, unsigned long } =20 /** - * find_next_iomem_res - Finds the lowest iomem resource that covers part = of - * [@start..@end]. + * find_next_res - Finds the lowest resource that covers part of + * [@start..@end]. * * If a resource is found, returns 0 and @*res is overwritten with the part * of the resource that's within [@start..@end]; if none is found, returns * -ENODEV. Returns -EINVAL for invalid parameters. * + * @parent: resource tree root to search * @start: start address of the resource searched for * @end: end address of same resource * @flags: flags which the resource must have @@ -337,9 +338,9 @@ static bool is_type_match(struct resource *p, unsigned = long flags, unsigned long * The caller must specify @start, @end, @flags, and @desc * (which may be IORES_DESC_NONE). */ -static int find_next_iomem_res(resource_size_t start, resource_size_t end, - unsigned long flags, unsigned long desc, - struct resource *res) +static int find_next_res(struct resource *parent, resource_size_t start, + resource_size_t end, unsigned long flags, + unsigned long desc, struct resource *res) { struct resource *p; =20 @@ -351,7 +352,7 @@ static int find_next_iomem_res(resource_size_t start, r= esource_size_t end, =20 read_lock(&resource_lock); =20 - for_each_resource(&iomem_resource, p, false) { + for_each_resource(parent, p, false) { /* If we passed the resource we are looking for, stop */ if (p->start > end) { p =3D NULL; @@ -382,16 +383,23 @@ static int find_next_iomem_res(resource_size_t start,= resource_size_t end, return p ? 0 : -ENODEV; } =20 -static int __walk_iomem_res_desc(resource_size_t start, resource_size_t en= d, - unsigned long flags, unsigned long desc, - void *arg, - int (*func)(struct resource *, void *)) +static int find_next_iomem_res(resource_size_t start, resource_size_t end, + unsigned long flags, unsigned long desc, + struct resource *res) +{ + return find_next_res(&iomem_resource, start, end, flags, desc, res); +} + +static int walk_res_desc(struct resource *parent, resource_size_t start, + resource_size_t end, unsigned long flags, + unsigned long desc, void *arg, + int (*func)(struct resource *, void *)) { struct resource res; int ret =3D -EINVAL; =20 while (start < end && - !find_next_iomem_res(start, end, flags, desc, &res)) { + !find_next_res(parent, start, end, flags, desc, &res)) { ret =3D (*func)(&res, arg); if (ret) break; @@ -402,6 +410,15 @@ static int __walk_iomem_res_desc(resource_size_t start= , resource_size_t end, return ret; } =20 +static int __walk_iomem_res_desc(resource_size_t start, resource_size_t en= d, + unsigned long flags, unsigned long desc, + void *arg, + int (*func)(struct resource *, void *)) +{ + return walk_res_desc(&iomem_resource, start, end, flags, desc, arg, func); +} + + /** * walk_iomem_res_desc - Walks through iomem resources and calls func() * with matching resource ranges. @@ -426,6 +443,26 @@ int walk_iomem_res_desc(unsigned long desc, unsigned l= ong flags, u64 start, } EXPORT_SYMBOL_GPL(walk_iomem_res_desc); =20 +#ifdef CONFIG_EFI_SOFT_RESERVE +struct resource soft_reserve_resource =3D { + .name =3D "Soft Reserved", + .start =3D 0, + .end =3D -1, + .desc =3D IORES_DESC_SOFT_RESERVED, + .flags =3D IORESOURCE_MEM, +}; +EXPORT_SYMBOL_GPL(soft_reserve_resource); + +int walk_soft_reserve_res_desc(unsigned long desc, unsigned long flags, + u64 start, u64 end, void *arg, + int (*func)(struct resource *, void *)) +{ + return walk_res_desc(&soft_reserve_resource, start, end, flags, desc, + arg, func); +} +EXPORT_SYMBOL_GPL(walk_soft_reserve_res_desc); +#endif + /* * This function calls the @func callback against all memory ranges of type * System RAM which are marked as IORESOURCE_SYSTEM_RAM and IORESOUCE_BUSY. @@ -648,6 +685,22 @@ int region_intersects(resource_size_t start, size_t si= ze, unsigned long flags, } EXPORT_SYMBOL_GPL(region_intersects); =20 +#ifdef CONFIG_EFI_SOFT_RESERVE +int region_intersects_soft_reserve(resource_size_t start, size_t size, + unsigned long flags, unsigned long desc) +{ + int ret; + + read_lock(&resource_lock); + ret =3D __region_intersects(&soft_reserve_resource, start, size, flags, + desc); + read_unlock(&resource_lock); + + return ret; +} +EXPORT_SYMBOL_GPL(region_intersects_soft_reserve); +#endif + void __weak arch_remove_reservations(struct resource *avail) { } @@ -966,7 +1019,7 @@ EXPORT_SYMBOL_GPL(insert_resource); * Insert a resource into the resource tree, possibly expanding it in order * to make it encompass any conflicting resources. */ -void insert_resource_expand_to_fit(struct resource *root, struct resource = *new) +void __insert_resource_expand_to_fit(struct resource *root, struct resourc= e *new) { if (new->parent) return; @@ -997,7 +1050,20 @@ void insert_resource_expand_to_fit(struct resource *r= oot, struct resource *new) * to use this interface. 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Wed, 19 Nov 2025 19:19:37 -0800 From: Smita Koralahalli To: , , , , CC: Alison Schofield , Vishal Verma , Ira Weiny , Dan Williams , Jonathan Cameron , Yazen Ghannam , Dave Jiang , Davidlohr Bueso , Matthew Wilcox , Jan Kara , "Rafael J . Wysocki" , Len Brown , Pavel Machek , Li Ming , Jeff Johnson , "Ying Huang" , Yao Xingtao , Peter Zijlstra , Greg KH , Nathan Fontenot , Terry Bowman , Robert Richter , Benjamin Cheatham , Zhijian Li , "Borislav Petkov" , Ard Biesheuvel Subject: [PATCH v4 2/9] dax/hmem: Request cxl_acpi and cxl_pci before walking Soft Reserved ranges Date: Thu, 20 Nov 2025 03:19:18 +0000 Message-ID: <20251120031925.87762-3-Smita.KoralahalliChannabasappa@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20251120031925.87762-1-Smita.KoralahalliChannabasappa@amd.com> References: <20251120031925.87762-1-Smita.KoralahalliChannabasappa@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD75:EE_|SA1PR12MB5657:EE_ X-MS-Office365-Filtering-Correlation-Id: 30b2b7a9-a5be-4acb-0c86-08de27e3a369 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|7416014|376014|30052699003|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?vudv8M7FCpYtCYmWAkO18yPJHASZZ4fidW6CebdfrwsmUaBF465VsSOv6Vl/?= =?us-ascii?Q?AGjVriDN+OFGHfcmZ/3hafQaSOhzDcINu0d+c4oCtg84K91mOuUEJt1fNdKh?= =?us-ascii?Q?b8sOB6ENFSXMD3xBA72oWrnzMG7pTjUEw59f7iUJOPk9p9x2FO2m8A2Fiylx?= =?us-ascii?Q?MvnCPJ0WSP6vanvM21eraNHtdM95qpHO55XnspTi2PDXXXO833lIAsCattvW?= =?us-ascii?Q?jRZD1+sozL7MHB/LIcj48W8ofsexos7rlGE1e3I2p/TihoFnd3ZxzRpFCzH9?= =?us-ascii?Q?LG+UFsM7uzeI16/tovtcG6R9GVPcrpgx7BjCPcRjR98ZLHGah7ve6DpJEm8L?= =?us-ascii?Q?MqT5U30QrGYGRveAZc/CIcqe6jl/OKbXyEuLGVidiJobeql6ib8f4IdxbrRZ?= =?us-ascii?Q?DqqDU1C5taZWD6K9zqqgLYxhzMZQwmY66I80H3lw2vfGM4kynCZ2Dr4xOdzc?= =?us-ascii?Q?QlLj9DDKVMYRxAq4wQ8KHsnLjJ2kWcV2oRL3YBg0bJSDaz+Elwm8ZOEg1YkS?= =?us-ascii?Q?uq075Fvf3DSguAaGqpdpS12PBhPzhYRjNemcTT2TPU2HNsCArNVO+1YFVpcB?= =?us-ascii?Q?ZH7ENYf5C2wm/maWQzOrvIOY0nCGGT2DwM0+VkKHjpMfb/TxP7Z+6Wyp4MPe?= =?us-ascii?Q?f2YyZhKFWSg/qyTbaSIgwElc09FXAVgfECjAH+/0Sf1glPouApM7yEjcFE0Y?= =?us-ascii?Q?RvR/zJxOvDcdi4f8IzvUqHErouuWryAIisJtlYcVUDd9dUJJ30YH2eQlOdSL?= =?us-ascii?Q?HkfQvFMz0jPxflzVOCvQMf9sDBdzRRj4jhx01YregYrarp1i/USIvAwgu2+b?= =?us-ascii?Q?4oHItVcdiLK3PV64viyoWPJAyPlMt5UwpYy5f8NM1NOUt4iXkJMGXxp0ozLA?= =?us-ascii?Q?kEfut/WgxNA2FupzBPsxfDt+pGkuw/5bhkc5c+s6JS0GVaZq5tYj0tZ6Ry9F?= =?us-ascii?Q?jpEeVkghJA+fDLdPFoTAt0f49BX7HQ3O593WR5k7IW4qJvAdbBaPSnN+ju3A?= =?us-ascii?Q?jqRi8TBxpIUysKW39Lxp9ckF9jCXRxIGSZZmdxTEjUaWXvMW5OvzyRkSNqQP?= =?us-ascii?Q?80xoNbIvk+uTTymaZkogDrtYXzi1ICBnJO3AmDWCsNU8oZwPpmRR0BLed/lJ?= =?us-ascii?Q?RTbY69qeM1o47SKjoAMqZ/FJ+B8/A9cNbylJZ2PiGLDiBD8/okTHClHJQFR8?= =?us-ascii?Q?LqCHaQBAJHRnFT3+NIUwcNuFlDdVq5jIW6yVjOZSyw75eu4vLWIwvyMw6fUJ?= =?us-ascii?Q?nLEEd8i01kW/4lI6hh+MqcF9OZDwTh0ij71EphlafKiWoUFz8WsB4rBTJhMc?= =?us-ascii?Q?2E/9JotaxdVcgxqWN8dlzcRHY5c+/fjOIECSfEA1G7FJvqV1jyMarxS1Eahh?= =?us-ascii?Q?qcz04vHUw5TAOP9tnTTdpF0ZVXuqMNeYwtPGyeHqKiJD5es7e1QXN8OCp9oZ?= =?us-ascii?Q?5HGf4TGq3zwMZa4g2MYPJoyJuPsdK0FAUwSYD3L4g3DK1bs0eE54iLLHL9G2?= =?us-ascii?Q?BVoByIAbIvlQHAw5lQGw2JG3mjTydjLD4xlHi5+XSL8sXCJD9H8+CUgMbxhT?= =?us-ascii?Q?nuH4Fl/HZNFxmFSCP1Y=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(7416014)(376014)(30052699003)(36860700013)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Nov 2025 03:19:38.5484 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 30b2b7a9-a5be-4acb-0c86-08de27e3a369 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD75.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB5657 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Dan Williams Ensure cxl_acpi has published CXL Window resources before HMEM walks Soft Reserved ranges. Replace MODULE_SOFTDEP("pre: cxl_acpi") with an explicit, synchronous request_module("cxl_acpi"). MODULE_SOFTDEP() only guarantees eventual loading, it does not enforce that the dependency has finished init before the current module runs. This can cause HMEM to start before cxl_acpi has populated the resource tree, breaking detection of overlaps between Soft Reserved and CXL Windows. Also, request cxl_pci before HMEM walks Soft Reserved ranges. Unlike cxl_acpi, cxl_pci attach is asynchronous and creates dependent devices that trigger further module loads. Asynchronous probe flushing (wait_for_device_probe()) is added later in the series in a deferred context before HMEM makes ownership decisions for Soft Reserved ranges. Add an additional explicit Kconfig ordering so that CXL_ACPI and CXL_PCI must be initialized before DEV_DAX_HMEM. This prevents HMEM from consuming Soft Reserved ranges before CXL drivers have had a chance to claim them. Signed-off-by: Dan Williams Signed-off-by: Smita Koralahalli Reviewed-by: Dave Jiang --- drivers/dax/Kconfig | 2 ++ drivers/dax/hmem/hmem.c | 17 ++++++++++------- 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/drivers/dax/Kconfig b/drivers/dax/Kconfig index d656e4c0eb84..3683bb3f2311 100644 --- a/drivers/dax/Kconfig +++ b/drivers/dax/Kconfig @@ -48,6 +48,8 @@ config DEV_DAX_CXL tristate "CXL DAX: direct access to CXL RAM regions" depends on CXL_BUS && CXL_REGION && DEV_DAX default CXL_REGION && DEV_DAX + depends on CXL_ACPI >=3D DEV_DAX_HMEM + depends on CXL_PCI >=3D DEV_DAX_HMEM help CXL RAM regions are either mapped by platform-firmware and published in the initial system-memory map as "System RAM", mapped diff --git a/drivers/dax/hmem/hmem.c b/drivers/dax/hmem/hmem.c index 48f4642f4bb8..02e79c7adf75 100644 --- a/drivers/dax/hmem/hmem.c +++ b/drivers/dax/hmem/hmem.c @@ -141,6 +141,16 @@ static __init int dax_hmem_init(void) { int rc; =20 + /* + * Ensure that cxl_acpi and cxl_pci have a chance to kick off + * CXL topology discovery at least once before scanning the + * iomem resource tree for IORES_DESC_CXL resources. + */ + if (IS_ENABLED(CONFIG_DEV_DAX_CXL)) { + request_module("cxl_acpi"); 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Wysocki" , Len Brown , Pavel Machek , Li Ming , Jeff Johnson , "Ying Huang" , Yao Xingtao , Peter Zijlstra , Greg KH , Nathan Fontenot , Terry Bowman , Robert Richter , Benjamin Cheatham , Zhijian Li , "Borislav Petkov" , Ard Biesheuvel Subject: [PATCH v4 3/9] dax/hmem: Gate Soft Reserved deferral on DEV_DAX_CXL Date: Thu, 20 Nov 2025 03:19:19 +0000 Message-ID: <20251120031925.87762-4-Smita.KoralahalliChannabasappa@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20251120031925.87762-1-Smita.KoralahalliChannabasappa@amd.com> References: <20251120031925.87762-1-Smita.KoralahalliChannabasappa@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD7B:EE_|PH0PR12MB7982:EE_ X-MS-Office365-Filtering-Correlation-Id: 9c33421c-dab1-4c75-d1da-08de27e3a3f4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700013|376014|7416014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?hhC1Gdhuzb5dp2pRT6lji7uFOOooXPA7nMAnotlNiLwR+Nye1x7v0/n2HDYR?= =?us-ascii?Q?zzsQ+0h25prH376rFIadkTGq9bXaMVhw84gDQP6P3AkP9+hUDk7FsZ5YUFcJ?= =?us-ascii?Q?bXTJ0+7ZBH8eRFcwCi+xx/YGuSEqANPZsCtyQvdN0pspBZa34jYr5vFQ3Mln?= =?us-ascii?Q?ZJmPl4o1EU+WVI8OBZlbSYJXM3iMWRX+peQhc0RZi8ZqB+S30mmdg5RKNeR/?= =?us-ascii?Q?WRx/jkbjHxmpAR9sYkhMAJbEnVza+BXk6MDRfMjHdGLARmdjK5P7JizoESso?= =?us-ascii?Q?xV8jo46ZauePP+afNAXCbkf15NuiOVzUei/2V/xzUxqKszF8DUOkejPJt9Bg?= =?us-ascii?Q?5wrSxJPW85dgl59aeOUCtCaCftQX4Z554gjkYnOPEbyQEpnmlH+iHY64beWv?= =?us-ascii?Q?p48cM6N89ovwgXfF0C+4T5paXZwXXodMOFxJYzOt3gdT1EBD2UIqOtRbqZQR?= =?us-ascii?Q?czMi8zT/9JrKYVbf1nfD4pMJ6xRV+bcwor2RkmRXBLrT1AVTR7mTLoRUOcIQ?= =?us-ascii?Q?cLTD/IV8KV3vsEw1iZV4Ee1y9sCwdsD3ZEX00KIHiqy6dmzyVCTro7/IutcM?= =?us-ascii?Q?el9r/3nBwQUrMQrUaNaV8hqd/WMHzoswThQ09FxCuZ2xkI4oLl9NziLnyCK4?= =?us-ascii?Q?oOd7ir4aVPsQvoGqHeCcDS2UudaijhqwgiikL81X28+b8Ok7zz1QZ8Q8hFhf?= =?us-ascii?Q?v5F2Dqhfcj1L5eMt1zaBOjrNm+7EHwd6ck6LTETw/Ief21GlVd6k3cLB4aqq?= =?us-ascii?Q?hanadx/07BkjahSIYT4IlPlPSUKOHskAw6HSbH8ke/GInI7IlZOKBKnIK+L1?= =?us-ascii?Q?LCeDGw+AUFmCstXsp/Hv9PXuA9rdPQ7b7IEVHpmy4f4YhOLBBgyW0G5PwASt?= =?us-ascii?Q?kuelJVQuZhnnZJFvwtCRhzahjG9DAIbYYsGQ++j7zVBl+OBWnigemttEbNXy?= =?us-ascii?Q?6nydg9awrMT6nDzQbCdaXaFuhoY5Z72ruXvxISs+r1JQxRb0nu/pEq9S9xbd?= =?us-ascii?Q?4HX/28lJbz4VbV+1wNYt9Klnje/YAiY3yR5RAI3HhJIT41FKCAYiqXWrXtpJ?= =?us-ascii?Q?oxmTwwRG+JyOU13XR9lsMGcw3fR5QufrLOh1jGzW/thSFqsjTw5D0OqOdVlY?= =?us-ascii?Q?u0ORWNe0UgVdsu2kUo3RqFWhPJq9wtYr3LbIE64m+AuzvR/PAJBZL4ZK2SXQ?= =?us-ascii?Q?GZUg838ZEg+ODqgBnI3fgo4OZ0jCdjoTRfBa9aiWFaySjVbtFysxmS970xd+?= =?us-ascii?Q?K4MMxiYkDlCXD75nxXSOtTeZwKy4n3BHcPrNc0bOGIW7mlC9veCqh8VoXeXT?= =?us-ascii?Q?Y+xGbjQNfT+gH1NOXfBlHfeA3/m7LeF5q3ODkCtcTA+zs/QxMC0TFqoYcSpB?= =?us-ascii?Q?K5/wmqNh08KbNWEhfR0xstg8eMEmou0AtbajngJ9T40d3+t6TV55Sjl8YTV1?= =?us-ascii?Q?uNYRO7zm+pbhJwawe5Yq2FJNWEwT27Ogu4W9qOzCsp2r44o54Ljg7bbmlN3+?= =?us-ascii?Q?PrR/dWLdADhCCRvwx7i7mnUzb4raCRbzKTqTOSgbK+7Uw0Ty2fKhQJqCM6q5?= =?us-ascii?Q?DgrJYRRU5atjQoVpH80=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(36860700013)(376014)(7416014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Nov 2025 03:19:39.4647 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9c33421c-dab1-4c75-d1da-08de27e3a3f4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD7B.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB7982 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Dan Williams Replace IS_ENABLED(CONFIG_CXL_REGION) with IS_ENABLED(CONFIG_DEV_DAX_CXL) so that HMEM only defers Soft Reserved ranges when CXL DAX support is enabled. This makes the coordination between HMEM and the CXL stack more precise and prevents deferral in unrelated CXL configurations. Signed-off-by: Dan Williams Signed-off-by: Smita Koralahalli --- drivers/dax/hmem/hmem.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dax/hmem/hmem.c b/drivers/dax/hmem/hmem.c index 02e79c7adf75..c2c110b194e5 100644 --- a/drivers/dax/hmem/hmem.c +++ b/drivers/dax/hmem/hmem.c @@ -66,7 +66,7 @@ static int hmem_register_device(struct device *host, int = target_nid, long id; int rc; =20 - if (IS_ENABLED(CONFIG_CXL_REGION) && + if (IS_ENABLED(CONFIG_DEV_DAX_CXL) && region_intersects(res->start, resource_size(res), IORESOURCE_MEM, IORES_DESC_CXL) !=3D REGION_DISJOINT) { dev_dbg(host, "deferring range to CXL: %pr\n", res); --=20 2.17.1 From nobody Tue Dec 2 02:06:36 2025 Received: from SN4PR0501CU005.outbound.protection.outlook.com (mail-southcentralusazon11011032.outbound.protection.outlook.com [40.93.194.32]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5CF8E302CA3; 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Wed, 19 Nov 2025 19:19:39 -0800 From: Smita Koralahalli To: , , , , CC: Alison Schofield , Vishal Verma , Ira Weiny , Dan Williams , Jonathan Cameron , Yazen Ghannam , Dave Jiang , Davidlohr Bueso , Matthew Wilcox , Jan Kara , "Rafael J . Wysocki" , Len Brown , Pavel Machek , Li Ming , Jeff Johnson , "Ying Huang" , Yao Xingtao , Peter Zijlstra , Greg KH , Nathan Fontenot , Terry Bowman , Robert Richter , Benjamin Cheatham , Zhijian Li , "Borislav Petkov" , Ard Biesheuvel Subject: [PATCH v4 4/9] dax/hmem: Defer handling of Soft Reserved ranges that overlap CXL windows Date: Thu, 20 Nov 2025 03:19:20 +0000 Message-ID: <20251120031925.87762-5-Smita.KoralahalliChannabasappa@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20251120031925.87762-1-Smita.KoralahalliChannabasappa@amd.com> References: <20251120031925.87762-1-Smita.KoralahalliChannabasappa@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD7B:EE_|DS7PR12MB8346:EE_ X-MS-Office365-Filtering-Correlation-Id: 7de15c55-bbb8-479a-7fc2-08de27e3a479 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|30052699003|1800799024|7416014|376014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?K5NkHZiemw2oWJ1jB+ns/M/JdNfqVCvEBakQrpcyKAYdJzA9OXXbO7ILfJMB?= =?us-ascii?Q?f21UkADFfcyjOWFuoa6cEkd6gwKa0cicb8LPXvP1+WMI4oxGdnBE5EtocAB0?= =?us-ascii?Q?us9qIaoj96oK2shIyTG07pHDaFzo+3j+RE4hCljXgVFDNNSfxBoCqeNnIsVT?= =?us-ascii?Q?yrkR3rhhvHi0abC99nScD8029VRMJ53sxD9RND/TXJE96P/ZCC4J8vLslSUr?= =?us-ascii?Q?b4yJ+OQOT4d54s0U7nxbXt7VXL8eRhduGg1WPIlxrWJk3NeTFBM/+agwZdY4?= =?us-ascii?Q?hWQFMnS8HSVoqrd5j80ipmIowORS4LlMXYJ0PnlFplWJxYQGr7gXkovwwRXG?= =?us-ascii?Q?yDcaIofFQGkHlaujGAiICDLx35jx5bbq73QWXwyYHW9cWv4MzkWNabxW/lcS?= =?us-ascii?Q?H1tauDSoRaElbPuUvdOePjRTQTqvQTuZS0nN7cKW8dzdgQRTFy9B0DjdN6B3?= =?us-ascii?Q?Cm2s8lG9w7BX5slekHb+YdTGPwR7/zbu8MqSkjZvsDwT4E+TrEp8lTlPAS5t?= =?us-ascii?Q?sa7jADg9rpn7nCYBnlfV5Xl4NQJzmtX0LQml4ggCafqQU7hN0kF25MVqolQ2?= =?us-ascii?Q?BLd+pJb8jtYJuJm8UTrIDTvoPIkk8Z2Q9W4ilEqiWrdiLfVE4IXHG+ictnAj?= =?us-ascii?Q?TJegNT9OjD6pu0bpL/NfFCCoNimhvYdjnWMUw5ljMCUyN7HqlTbRbehgYltT?= =?us-ascii?Q?TQwoIHxFOAL2TXTjb3/x/vzxeLhQ959jo3eVhPn/T0NK65j2WtoseMFw+jo1?= =?us-ascii?Q?vdHhfKLOthvrDMigvUVBuvU9az9IFqqrINF4icVycNajrzPCDHtLgJ7gcPx5?= =?us-ascii?Q?eDxu1klTdCrjjG5SSZratlMcNRI0hEjCKqIcsEGexe6crJAaADt+uG3Ruzfc?= =?us-ascii?Q?+is3Ey1nzddW3iwb2YnOUkHnO2kvmeUr4BG9UYa5LkugvLAhxN+K/oJniDOe?= =?us-ascii?Q?XrQ96e0OHcm+x41qOUiuNNVV94DsnVEmO9skQJAVJ83qul0L6AREhqj+uRtC?= =?us-ascii?Q?W6PXKoASOxYspU/bqHNtcsASHl7QBo4PrIcw3GD1kj/z6owTYMZLPPZTOeMs?= =?us-ascii?Q?y8UfevD4iFXnyr7tgEo7JDxu1RFZhwQGixbhE3NoREb+R8ZmAw4nv0iFhK9A?= =?us-ascii?Q?Y8n5dQygii0xmPfvmiw2xZLgw7D6C7e8Vzwkr8UvDmBuhN2dmor/VoSMf079?= =?us-ascii?Q?cBWUyjL4KdBpFt6lByAvhYjK9qCSDa1/ZfbF98AiSekP7Rc5e3uyrIj99f6s?= =?us-ascii?Q?JOkmhGF50MBzScRsu5lNXpPkcWSD1eyJixKTN+sTZ3O8dVf+p50/6uTU1ti2?= =?us-ascii?Q?ipZn1V8s1qRSfhOBRKFcNVuqfQW0DU1RQwo9lQO2VTmtagBNDoaM0vO94x6O?= =?us-ascii?Q?7xjAkwv45IHLsqk5MgpeanCBHmAKSicOQ2R5hlMBGRlm/12Da7iGzwM9XLHx?= =?us-ascii?Q?IpnX45Z84dEb9zCLZDfWd71fOobUPuyYE7Q9fp80lsHYl4QHLDYehugqjQgj?= =?us-ascii?Q?y4KQBHIjIQXzc5nnCz9yHlNThsZWNgjIUshpRuorZxA75K3e6LkRIe2OYnzV?= =?us-ascii?Q?0THoIfelKzqeYUkCURg=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(30052699003)(1800799024)(7416014)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Nov 2025 03:19:40.3359 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7de15c55-bbb8-479a-7fc2-08de27e3a479 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD7B.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB8346 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Dan Williams Defer handling of Soft Reserved ranges that intersect CXL windows at probe time. Delay processing until after device discovery so that the CXL stack can publish windows and assemble regions before HMEM claims those address ranges. Add a deferral path that schedules deferred work when HMEM detects a Soft Reserved range intersecting a CXL window during probe. The deferred work runs after probe completes and allows the CXL subsystem to finish resource discovery and region setup before HMEM takes any action. This change does not address region assembly failures. It only delays HMEM handling to avoid prematurely claiming ranges that CXL may own. Signed-off-by: Dan Williams Signed-off-by: Smita Koralahalli --- drivers/dax/hmem/hmem.c | 66 +++++++++++++++++++++++++++++++++++++++-- 1 file changed, 64 insertions(+), 2 deletions(-) diff --git a/drivers/dax/hmem/hmem.c b/drivers/dax/hmem/hmem.c index c2c110b194e5..f70a0688bd11 100644 --- a/drivers/dax/hmem/hmem.c +++ b/drivers/dax/hmem/hmem.c @@ -58,9 +58,21 @@ static void release_hmem(void *pdev) platform_device_unregister(pdev); } =20 +static enum dax_cxl_mode { + DAX_CXL_MODE_DEFER, + DAX_CXL_MODE_REGISTER, + DAX_CXL_MODE_DROP, +} dax_cxl_mode; + +struct dax_defer_work { + struct platform_device *pdev; + struct work_struct work; +}; + static int hmem_register_device(struct device *host, int target_nid, const struct resource *res) { + struct dax_defer_work *work =3D dev_get_drvdata(host); struct platform_device *pdev; struct memregion_info info; long id; @@ -69,8 +81,18 @@ static int hmem_register_device(struct device *host, int= target_nid, if (IS_ENABLED(CONFIG_DEV_DAX_CXL) && region_intersects(res->start, resource_size(res), IORESOURCE_MEM, IORES_DESC_CXL) !=3D REGION_DISJOINT) { - dev_dbg(host, "deferring range to CXL: %pr\n", res); - return 0; + switch (dax_cxl_mode) { + case DAX_CXL_MODE_DEFER: + dev_dbg(host, "deferring range to CXL: %pr\n", res); + schedule_work(&work->work); + return 0; + case DAX_CXL_MODE_REGISTER: + dev_dbg(host, "registering CXL range: %pr\n", res); + break; + case DAX_CXL_MODE_DROP: + dev_dbg(host, "dropping CXL range: %pr\n", res); + return 0; + } } =20 rc =3D region_intersects_soft_reserve(res->start, resource_size(res), @@ -125,8 +147,48 @@ static int hmem_register_device(struct device *host, i= nt target_nid, return rc; } =20 +static int handle_deferred_cxl(struct device *host, int target_nid, + const struct resource *res) +{ + /* TODO: Handle region assembly failures */ + return 0; +} + +static void process_defer_work(struct work_struct *_work) +{ + struct dax_defer_work *work =3D container_of(_work, typeof(*work), work); + struct platform_device *pdev =3D work->pdev; + + /* relies on cxl_acpi and cxl_pci having had a chance to load */ + wait_for_device_probe(); + + walk_hmem_resources(&pdev->dev, handle_deferred_cxl); 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Wed, 19 Nov 2025 19:19:40 -0800 From: Smita Koralahalli To: , , , , CC: Alison Schofield , Vishal Verma , Ira Weiny , Dan Williams , Jonathan Cameron , Yazen Ghannam , Dave Jiang , Davidlohr Bueso , Matthew Wilcox , Jan Kara , "Rafael J . Wysocki" , Len Brown , Pavel Machek , Li Ming , Jeff Johnson , "Ying Huang" , Yao Xingtao , Peter Zijlstra , Greg KH , Nathan Fontenot , Terry Bowman , Robert Richter , Benjamin Cheatham , Zhijian Li , "Borislav Petkov" , Ard Biesheuvel Subject: [PATCH v4 5/9] cxl/region, dax/hmem: Arbitrate Soft Reserved ownership with cxl_regions_fully_map() Date: Thu, 20 Nov 2025 03:19:21 +0000 Message-ID: <20251120031925.87762-6-Smita.KoralahalliChannabasappa@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20251120031925.87762-1-Smita.KoralahalliChannabasappa@amd.com> References: <20251120031925.87762-1-Smita.KoralahalliChannabasappa@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD7B:EE_|IA0PR12MB7698:EE_ X-MS-Office365-Filtering-Correlation-Id: 3926b48f-8ecd-4dd3-257f-08de27e3ab9d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|7416014|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?NjCuZgP86AomoyS9po2+RNHCJR0X8ookUxCxpY2hcY03gdm0HZS6qQdoCDTi?= =?us-ascii?Q?LtWUOFVkZ9zzWYc55ow+Iyfs50BrXQi/wp0ly70MhvF43QgtXFk95YaSWh9C?= =?us-ascii?Q?5ndLU5DRuH92Iw+mf4a+CU25nQq8joK5BNC6u26IrnXPmOigs8HUNtOtrVxL?= =?us-ascii?Q?XX27Aia8+5suoNpf04zTieBOFJB0mwxFc0tUYtR7cX5HJ7SolkwEZXky2rDY?= =?us-ascii?Q?PuFDMeGX345j/E3qm8v1zSsimlXqrNWjko/c2MWfU1zHWzPbDeNRTEH3cAp+?= =?us-ascii?Q?+L5Rv3E6HdZ/3Lv3ZLg8QQlsYvvPm/2NzMNdWhBoJer9WSJeRBc1Q7sZCQwo?= =?us-ascii?Q?xVx/+UfreffS7Qa/HoBwhH4+pmiqkHDiflGXcjndtCqeVYoUcxbTSopXKe4R?= =?us-ascii?Q?Xe+jVMfN8jvIMuaCZRut56XPmxPSz70T3zCSgzse4jBGObWeaMRfRbhIIfLa?= =?us-ascii?Q?P2QEDZAVUkdYEs/3FOw/jU6H+XA7HjOBdvmjnlwIlsI/gsrYVLWNDcBxBDyo?= =?us-ascii?Q?J1cyxUbUMhZeN36IYfX2hxuHZ4pJbXyzfgVaqFsYAPFiqRtWFeJ7bM38TtT4?= =?us-ascii?Q?i0FI7xHQc2d7fRksod4onf1XX96YowhcvVAZ3qLjZ/Wf+6k12hdp2qaXS+Av?= =?us-ascii?Q?bRdgwdCzPpBKV2lUqUlJ+sCpCNhLqRu6FclOgKYMy1CBxv/RdCBEgoYC/8H5?= =?us-ascii?Q?yMfcOJB24nlAfEU4PSeY728yymSHbExL6WU2zkGOseYCLSttClL0ztAnVxV5?= =?us-ascii?Q?pPCriFl2xX4D+nRR8S5jA+Q5kxcMM2CpPpl1TwZ5KzfRMgykKgvIcupfLqOG?= =?us-ascii?Q?AJnurzYGp1yyH7KwYrDJIz+KTvV7VpK1ed7m28YjoJqKsCm1BshCLU32CaNn?= =?us-ascii?Q?Ftlho+cg3zUIWUvOYNAOmnj6+1PnoDyDuWJVo+XcHLeyX/ameAc/ddr0a2ti?= =?us-ascii?Q?eTdkqSGrkO//iny/M3k2ph8LOvD6v/a0L9/zryQu9jwBc0xnBsVjgx3YYlEe?= =?us-ascii?Q?BYpSVe+74kgrjrSjrJgMD9ybrXK/3EGcH79rgZt6sZio2J4pYoG7faVT2nB1?= =?us-ascii?Q?+MtdDq0eHAPjStE7WK5GTIMfJo00/l++JvWbuKAUWwlHNoFZxW3WH6pgYDhC?= =?us-ascii?Q?dUUhJgLtoNdy+0V58y9DKit6Gmli/UAZnLP3Ct4FDiLfx6l8aQvVsOCx4HuA?= =?us-ascii?Q?nJ+ThGG45y9FP8HnKnC2mCSATkPuMBml+u4D2OtAZfuJlgYcs0BRm8gnWdpe?= =?us-ascii?Q?+KhuYmfM2Ay0NnBfQ2PNhbadp2ViHLvQH6tFgcS8vlj5e/U4DiLasi+3sbeh?= =?us-ascii?Q?8fmad6d6Ch3Z9H1bxGe5JINfuvQq0PjC11k1bnUxRjgxh/xKZGafLo4yJW5A?= =?us-ascii?Q?Y+ERCGgtiQTZ6J6PCBYAbM5bgfmTo2HOG1kFIaPgALEmkzy/NAtsF5zuTZAX?= =?us-ascii?Q?Zsf8Oae2cdEBw41iB8pBgPDAO+2NCRvE/aGIxijmTDsmXTv5MaEDk0Y3WhJM?= =?us-ascii?Q?dl89yTbFZOhMbWa/OkXpJHPexCO4KhUnU2MOU0PcnePVhuAt+wW6P2zB/F3G?= =?us-ascii?Q?BsxJiwp252v6dqgpZEc=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(376014)(7416014)(36860700013)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Nov 2025 03:19:52.3120 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3926b48f-8ecd-4dd3-257f-08de27e3ab9d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD7B.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB7698 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Introduce cxl_regions_fully_map() to check whether CXL regions form a single contiguous, non-overlapping cover of a given Soft Reserved range. Use this helper to decide whether Soft Reserved memory overlapping CXL regions should be owned by CXL or registered by HMEM. If the span is fully covered by CXL regions, treat the Soft Reserved range as owned by CXL and have HMEM skip registration. Else, let HMEM claim the range and register the corresponding devdax for it. Signed-off-by: Smita Koralahalli --- drivers/cxl/core/region.c | 80 +++++++++++++++++++++++++++++++++++++++ drivers/cxl/cxl.h | 6 +++ drivers/dax/hmem/hmem.c | 14 ++++++- 3 files changed, 99 insertions(+), 1 deletion(-) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index b06fee1978ba..94dbbd6b5513 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -3749,6 +3749,86 @@ static int cxl_region_debugfs_poison_clear(void *dat= a, u64 offset) DEFINE_DEBUGFS_ATTRIBUTE(cxl_poison_clear_fops, NULL, cxl_region_debugfs_poison_clear, "%llx\n"); =20 +static struct cxl_region * +cxlr_overlapping_range(struct device *dev, resource_size_t s, resource_siz= e_t e) +{ + struct cxl_region *cxlr; + struct resource *r; + + if (!is_cxl_region(dev)) + return NULL; + + cxlr =3D to_cxl_region(dev); + r =3D cxlr->params.res; + if (!r) + return NULL; + + if (r->start > e || r->end < s) + return NULL; + + return cxlr; +} + +struct cxl_range_ctx { + resource_size_t start; + resource_size_t end; + resource_size_t pos; + resource_size_t map_end; + bool found; +}; + +static int cxl_region_map_cb(struct device *dev, void *data) +{ + struct cxl_range_ctx *ctx =3D data; + struct cxl_region *cxlr; + struct resource *r; + + cxlr =3D cxlr_overlapping_range(dev, ctx->pos, ctx->end); + if (!cxlr) + return 0; + + r =3D cxlr->params.res; + if (r->start !=3D ctx->pos) + return 0; + + if (!ctx->found) { + ctx->found =3D true; + ctx->map_end =3D r->end; + return 0; + } + + return 1; +} + +bool cxl_regions_fully_map(resource_size_t start, resource_size_t end) +{ + resource_size_t pos =3D start; + int rc; + + while (pos <=3D end) { + struct cxl_range_ctx ctx =3D { + .start =3D start, + .end =3D end, + .pos =3D pos, + .found =3D false, + }; + + rc =3D bus_for_each_dev(&cxl_bus_type, NULL, &ctx, + cxl_region_map_cb); + + if (rc || !ctx.found || ctx.map_end > end) + return false; + + if (ctx.map_end =3D=3D end) + break; + + pos =3D ctx.map_end + 1; + } + + return true; +} +EXPORT_SYMBOL_GPL(cxl_regions_fully_map); + static int cxl_region_can_probe(struct cxl_region *cxlr) { struct cxl_region_params *p =3D &cxlr->params; diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 231ddccf8977..af78c9fd37f2 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -877,6 +877,7 @@ struct cxl_pmem_region *to_cxl_pmem_region(struct devic= e *dev); int cxl_add_to_region(struct cxl_endpoint_decoder *cxled); struct cxl_dax_region *to_cxl_dax_region(struct device *dev); u64 cxl_port_get_spa_cache_alias(struct cxl_port *endpoint, u64 spa); +bool cxl_regions_fully_map(resource_size_t start, resource_size_t end); #else static inline bool is_cxl_pmem_region(struct device *dev) { @@ -899,6 +900,11 @@ static inline u64 cxl_port_get_spa_cache_alias(struct = cxl_port *endpoint, { return 0; } +static inline bool cxl_regions_fully_map(resource_size_t start, + resource_size_t end) +{ + return false; +} #endif =20 void cxl_endpoint_parse_cdat(struct cxl_port *port); diff --git a/drivers/dax/hmem/hmem.c b/drivers/dax/hmem/hmem.c index f70a0688bd11..db4c46337ac3 100644 --- a/drivers/dax/hmem/hmem.c +++ b/drivers/dax/hmem/hmem.c @@ -3,6 +3,8 @@ #include #include #include + +#include "../../cxl/cxl.h" #include "../bus.h" =20 static bool region_idle; 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Wed, 19 Nov 2025 19:19:40 -0800 From: Smita Koralahalli To: , , , , CC: Alison Schofield , Vishal Verma , Ira Weiny , Dan Williams , Jonathan Cameron , Yazen Ghannam , Dave Jiang , Davidlohr Bueso , Matthew Wilcox , Jan Kara , "Rafael J . Wysocki" , Len Brown , Pavel Machek , Li Ming , Jeff Johnson , "Ying Huang" , Yao Xingtao , Peter Zijlstra , Greg KH , Nathan Fontenot , Terry Bowman , Robert Richter , Benjamin Cheatham , Zhijian Li , "Borislav Petkov" , Ard Biesheuvel Subject: [PATCH v4 6/9] cxl/region: Add register_dax flag to defer DAX setup Date: Thu, 20 Nov 2025 03:19:22 +0000 Message-ID: <20251120031925.87762-7-Smita.KoralahalliChannabasappa@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20251120031925.87762-1-Smita.KoralahalliChannabasappa@amd.com> References: <20251120031925.87762-1-Smita.KoralahalliChannabasappa@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD7B:EE_|MN2PR12MB4424:EE_ X-MS-Office365-Filtering-Correlation-Id: a1328027-235f-4cb3-6040-08de27e3ad2c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|7416014|82310400026|36860700013; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?SYLgpHzE21Ka0LQ0+9/C5YRXkACktLEDhojjXngWHyS+WuLfc5e9Guq4vUmO?= =?us-ascii?Q?W9zKaDxXoF2/J7LxyF8Exp5fxlcPlW7ol4//1gu6fMj1matrRFMWIfaPzGri?= =?us-ascii?Q?yg2pRj6DNCabUf89BcMW5mEua5ORyhmDfP3bGC/Im1NhoxiuQ/8MHGONdrEW?= =?us-ascii?Q?qPNxro7kUBGK+/ygQWbxVPYbUBGVbfU5SesgeKdR/Nrlmj1e5G2P9rZgQh5u?= =?us-ascii?Q?WImyWUJ+oC85zZMh+W5ZoctKgmXG7ojkL07PkZZ+EMGc+WQvdqm/AXG8G8uk?= =?us-ascii?Q?DAXEnT6+aIT2QkNJE7o7pe7DIW4l8v6G4aVwZJRwpdlwe85hGhE6RF+8Y1Gg?= =?us-ascii?Q?Umn5FiT69mFGe2txCXx1mEc0GJsu/98GQnj03A/1YPDtna5kWRKZUqc/AJJp?= =?us-ascii?Q?1tOINDDv/IEbmX1WBS2C9DiLMoBdHReApsJufW0+4x4l92IvRcEwXEPQdB83?= =?us-ascii?Q?W+T9LV6gqcdDfRK7c1493ErGhZnH+VSUWazUnrXK12vgK1tmvTI5usTAi21T?= =?us-ascii?Q?64FuraPAo3KZvfbULzlr2wl5EZD7TL+8/MaHm4ZQ0kyT2Uq44S4kb8dQ66q/?= =?us-ascii?Q?NCPNVmKgoaYl2na2Gndg2+E/PekTLlV6iiHdv+jyluBclmt5uX8fyLmRuhvK?= =?us-ascii?Q?ebwwg9cVo9tkYL/OE4KQoxGFG6Rl67Llko84S+c/pycy19CJrQcZvJd9W3Bv?= =?us-ascii?Q?1sCnye8QeUFHRb4CKvO7J8MexTUt7v2GdlB0OtbSR2Tt+jMXGC36DGGZ1hvQ?= =?us-ascii?Q?JsBvt0qKXkQ4vFl9suSpynB01OsM4AVw8MMd3YWS8Q2ZFiNJQBk33gZY8zUz?= =?us-ascii?Q?DmYDODgPjactCS8/ykg0V6immTu/W5SUYWYANPy0MO3T/VT8WV1zOd7JvToz?= =?us-ascii?Q?BTw4OcTwWCpFUSgsBrkx+GK2L3Q7hgKFJEUWaFNCxIssE0RhC+gOA1IyM9mE?= =?us-ascii?Q?nrUKrC8BYW5XhueOFbSR6268Z8hpGI0y+DwtdMLGmUse8DV4oge8G0cF4J4g?= =?us-ascii?Q?Jj5a6c0qceaiS1s4hNsH3mVNMaVf3Rw9QXJDat/7nLTIKWyXuVxDLxkfkt+D?= =?us-ascii?Q?l3nmyVvsU3vsmu659G9BqMVWBiP6Ze1Zx83H71ZvCKzCBPF+ikxu9Uzk+u8C?= =?us-ascii?Q?WRfmqyJnE8O3Sa+QeWoYSPidQF5MHOmFP54FSainnfTjPTzWqBV7W+rI1ON2?= =?us-ascii?Q?eVknJfoFvXhik3BU98kSS0BQGe6ool06/N3ossQcVCc+Fi4PdSae719vNcy/?= =?us-ascii?Q?Bu1Qg3B/vH4Q0uZgfZD07E8AED8ovGbiG4y8M2JgDNYUuciODLZDxR9Nkeuz?= =?us-ascii?Q?iO0uYbAxRcGwrMpvQxtM8wHw6fVvR3hiwmh9KAV8DKIXXasmQULA3ZQ+cu8r?= =?us-ascii?Q?c3SYDT6h/R7p+steZRFqbrb2jhNflVRSFs414bhUERAK9GyfBD/bA/JhonzS?= =?us-ascii?Q?PoiGFf0vj/jIKO2XVoSutSeqTANOU7lIKGoFj4ff6+WJ+lhj3mYVzb67Sbj1?= =?us-ascii?Q?Ct99bONfglW3oS1K2hwnlg0SdeBZ1kWhjf33ISq1WtcP2DMSipB5ot1BRvFL?= =?us-ascii?Q?klL4rRgkdFB0r5uTrKQ=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(376014)(7416014)(82310400026)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Nov 2025 03:19:54.9296 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a1328027-235f-4cb3-6040-08de27e3ad2c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD7B.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4424 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Stop creating cxl_dax during cxl_region_probe(). Early DAX registration can online memory before ownership of Soft Reserved ranges is finalized. This makes it difficult to tear down regions later when HMEM determines that a region should not claim that range. Introduce a register_dax flag in struct cxl_region_params and gate DAX registration on this flag. Leave probe time registration disabled for regions discovered during early CXL enumeration; set the flag only for regions created dynamically at runtime to preserve existing behaviour. This patch prepares the region code for later changes where cxl_dax setup occurs from the HMEM path only after ownership arbitration completes. Signed-off-by: Smita Koralahalli --- drivers/cxl/core/region.c | 21 ++++++++++++++++----- drivers/cxl/cxl.h | 1 + 2 files changed, 17 insertions(+), 5 deletions(-) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 94dbbd6b5513..c17cd8706b9d 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -2540,9 +2540,11 @@ static int cxl_region_calculate_adistance(struct not= ifier_block *nb, static struct cxl_region *devm_cxl_add_region(struct cxl_root_decoder *cxl= rd, int id, enum cxl_partition_mode mode, - enum cxl_decoder_type type) + enum cxl_decoder_type type, + bool register_dax) { struct cxl_port *port =3D to_cxl_port(cxlrd->cxlsd.cxld.dev.parent); + struct cxl_region_params *p; struct cxl_region *cxlr; struct device *dev; int rc; @@ -2553,6 +2555,9 @@ static struct cxl_region *devm_cxl_add_region(struct = cxl_root_decoder *cxlrd, cxlr->mode =3D mode; cxlr->type =3D type; =20 + p =3D &cxlr->params; + p->register_dax =3D register_dax; + dev =3D &cxlr->dev; rc =3D dev_set_name(dev, "region%d", id); if (rc) @@ -2593,7 +2598,8 @@ static ssize_t create_ram_region_show(struct device *= dev, } =20 static struct cxl_region *__create_region(struct cxl_root_decoder *cxlrd, - enum cxl_partition_mode mode, int id) + enum cxl_partition_mode mode, int id, + bool register_dax) { int rc; =20 @@ -2615,7 +2621,8 @@ static struct cxl_region *__create_region(struct cxl_= root_decoder *cxlrd, return ERR_PTR(-EBUSY); } =20 - return devm_cxl_add_region(cxlrd, id, mode, CXL_DECODER_HOSTONLYMEM); + return devm_cxl_add_region(cxlrd, id, mode, CXL_DECODER_HOSTONLYMEM, + register_dax); } =20 static ssize_t create_region_store(struct device *dev, const char *buf, @@ -2629,7 +2636,7 @@ static ssize_t create_region_store(struct device *dev= , const char *buf, if (rc !=3D 1) return -EINVAL; =20 - cxlr =3D __create_region(cxlrd, mode, id); + cxlr =3D __create_region(cxlrd, mode, id, true); if (IS_ERR(cxlr)) return PTR_ERR(cxlr); =20 @@ -3523,7 +3530,7 @@ static struct cxl_region *construct_region(struct cxl= _root_decoder *cxlrd, =20 do { cxlr =3D __create_region(cxlrd, cxlds->part[part].mode, - atomic_read(&cxlrd->region_id)); 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Wed, 19 Nov 2025 19:19:41 -0800 From: Smita Koralahalli To: , , , , CC: Alison Schofield , Vishal Verma , Ira Weiny , Dan Williams , Jonathan Cameron , Yazen Ghannam , Dave Jiang , Davidlohr Bueso , Matthew Wilcox , Jan Kara , "Rafael J . Wysocki" , Len Brown , Pavel Machek , Li Ming , Jeff Johnson , "Ying Huang" , Yao Xingtao , Peter Zijlstra , Greg KH , Nathan Fontenot , Terry Bowman , Robert Richter , Benjamin Cheatham , Zhijian Li , "Borislav Petkov" , Ard Biesheuvel Subject: [PATCH v4 7/9] cxl/region, dax/hmem: Register cxl_dax only when CXL owns Soft Reserved span Date: Thu, 20 Nov 2025 03:19:23 +0000 Message-ID: <20251120031925.87762-8-Smita.KoralahalliChannabasappa@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20251120031925.87762-1-Smita.KoralahalliChannabasappa@amd.com> References: <20251120031925.87762-1-Smita.KoralahalliChannabasappa@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD7B:EE_|MN2PR12MB4240:EE_ X-MS-Office365-Filtering-Correlation-Id: adf5591d-a73b-477b-b1f9-08de27e3ad6b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|7416014|82310400026|376014|36860700013; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?zd75eiLN5FROJtvmQWsZ8deileN5c2GrMR4iNHXda8Sm02P9Qp4ta4OR6mdB?= =?us-ascii?Q?uYUloaWR9As7e/QsZdJbPcvBmpFQzZfRDZFOsYwea4rxyQ8FEp+d+4r+9qoB?= =?us-ascii?Q?aKh7NlODFXMpzL3aQnTv9gzW75RI+X28ytVgRE9c4ROJhz4LNv7xuI99D4ov?= =?us-ascii?Q?dsa4p/8KNuf6KrFBNgWiGeqUO8VHKH4zo97Uuln3wTRnwGOA0KVIfeT4dmtD?= =?us-ascii?Q?kOA8fHhtWGYmiNFsOEgvVpygnEvnz8GZ10Nh7fb3rhAKabLNE2d4Fv1mOhap?= =?us-ascii?Q?3yl2yVzrk7xZoDYgPI/R0TxOyaJWsVx3GUkBxdAdrKZGowpk6+Loso4EX4VE?= =?us-ascii?Q?psLMFnqMGxQ9aOia4iw4oMDO5XbkaDujY59+BkpSJKOz8rAve4kGi6NjC3rV?= =?us-ascii?Q?DzvQuMPYFOrvbzsnOau7NkgTqKrcnNpSMrkqXOWWxvdBwMxNV0YYmzjuM77N?= =?us-ascii?Q?4XhpiIhrdgSR9vFbMXD5fR8Z0uEy2XOrS/xXOaKSHyW8JUuAkCjRS2s9/E1w?= =?us-ascii?Q?JkinfsUOU1YmW+FPPZ1sVfb9kFPpkB8WVvmueit/Ue/lYin3MWGNWO590Qtq?= =?us-ascii?Q?HBS7J49xb38PMfGUJ3cR10ydlIGtMFqddtzW/c4nxWXCPBi1eDgsSrD2SGsY?= =?us-ascii?Q?+70e46SQLH0qDoVWfEmObn0her6hrEO1W2TscLmk4mU5PmX6d7mYQ08NsScE?= =?us-ascii?Q?R6YXVxq53msS55F/g9WDiE+kE4cfTiE1W29ykEWulh1hWBeEQ3AZ8sVBGR8c?= =?us-ascii?Q?DzQUxyywfXW/okEe473V+4kERPhqM+zmN5xoJyAJxw4IMsCfk8MIR6bJSP2s?= =?us-ascii?Q?Qogk1qRHecVKAHSKftDjAFRmyg1MNzBp+HMtB2Aa/2sNeGcpKPgHVVhVBAWD?= =?us-ascii?Q?4dVwvKAgGZ9ytPSZXL6WVPfSm6hk7OBf5aVYjoqhuSXnsNvuRTHfbjl2jZSb?= =?us-ascii?Q?VVKi2VZo76eVbMfviL0VxKzZyLGNI9cNUbi0/ZRh/m3jtEDguLOLx3Lfg7rP?= =?us-ascii?Q?F8vFbuI0g1Tjube/XzuuKxWjxeRkmu/SjFqIFGJW5mFpLH1QFifPC7GJPjdO?= =?us-ascii?Q?tkElmXSHQ3VTUAANyo7+PWTIyCjB+N5AZqeD6JitgzBxcT6wCxo0RrXs65GA?= =?us-ascii?Q?ieY/tTfyFNO7W4TtfNPAZmrww4tRyvI8Ne8BRMhFHtoK/1w6GZSNCyqGELOT?= =?us-ascii?Q?PC97NEDjUlhxKWQI1w/sHrXA4qGsUcx0eAPfumKQ/6H+QjcqRqiLDN9Xl7Mc?= =?us-ascii?Q?OehhGVfIiyT+F2v0xTzbpNgGHk5no4i/ZOYpSgsegpGMt456wcUkzbky/LCc?= =?us-ascii?Q?6J/HO5TxHwdLEbEHkZ/3mh8wSnO0soUAsEvuC4GdWEftJfXPtqzYM2UCe+gz?= =?us-ascii?Q?FX4Z/Mdfr5poXIKAoTcWnPT18KIvVrZt1bL5xTMr3UxwAvTQe/OahPxNwd9T?= =?us-ascii?Q?M0Bg+zeRfCESRB+hBeE0WQwD4u5iOHsY8QxqvEAzUawaDXNaFCxIWvhMWm30?= =?us-ascii?Q?k8fbarRnmHhepqr+ncuIoCfg8Ua0eG+LwNzmz6xpT0BxJ+rglpAJ5Fq8Twkd?= =?us-ascii?Q?9pp4QW38qU8lspgzPcg=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(7416014)(82310400026)(376014)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Nov 2025 03:19:55.3437 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: adf5591d-a73b-477b-b1f9-08de27e3ad6b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD7B.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4240 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Register DAX from the HMEM path only after determining that CXL owns Soft Reserved range. This avoids onlining memory under CXL before ownership is finalized and prevents failed teardown when HMEM must reclaim the range. Introduce cxl_register_dax() to walk overlapping CXL regions and register DAX from CXL only when cxl_regions_fully_map() confirms full coverage of the span. If CXL does not own the span, skip cxl_dax setup and allow HMEM to register DAX and online memory. With probe time DAX creation already suppressed in the previous patch, this change ensures that only the single owner (CXL or HMEM) performs DAX/KMEM setup. Signed-off-by: Smita Koralahalli --- drivers/cxl/core/region.c | 42 +++++++++++++++++++++++++++++++++++++++ drivers/cxl/cxl.h | 5 +++++ drivers/dax/hmem/hmem.c | 5 +++-- 3 files changed, 50 insertions(+), 2 deletions(-) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index c17cd8706b9d..38e7ec6a087b 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -3784,6 +3784,48 @@ struct cxl_range_ctx { bool found; }; =20 +static void cxl_region_enable_dax(struct cxl_region *cxlr) +{ + struct cxl_region_params *p =3D &cxlr->params; + int rc; + + if (walk_iomem_res_desc(IORES_DESC_NONE, + IORESOURCE_SYSTEM_RAM | IORESOURCE_BUSY, + p->res->start, p->res->end, cxlr, + is_system_ram) > 0) + return; + + rc =3D devm_cxl_add_dax_region(cxlr); + if (rc) + dev_warn(&cxlr->dev, "failed to add DAX for %s: %d\n", + dev_name(&cxlr->dev), rc); +} + +static int cxl_register_dax_cb(struct device *dev, void *data) +{ + struct cxl_range_ctx *ctx =3D data; + struct cxl_region *cxlr; + + cxlr =3D cxlr_overlapping_range(dev, ctx->start, ctx->end); + if (!cxlr) + return 0; + + if (cxlr->mode !=3D CXL_PARTMODE_RAM) + return 0; + + cxl_region_enable_dax(cxlr); + + return 0; +} + +void cxl_register_dax(resource_size_t start, resource_size_t end) +{ + struct cxl_range_ctx ctx =3D { .start =3D start, .end =3D end }; + + bus_for_each_dev(&cxl_bus_type, NULL, &ctx, cxl_register_dax_cb); +} +EXPORT_SYMBOL_GPL(cxl_register_dax); + static int cxl_region_map_cb(struct device *dev, void *data) { struct cxl_range_ctx *ctx =3D data; diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 324220596890..414ddf6c35d7 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -879,6 +879,7 @@ int cxl_add_to_region(struct cxl_endpoint_decoder *cxle= d); struct cxl_dax_region *to_cxl_dax_region(struct device *dev); u64 cxl_port_get_spa_cache_alias(struct cxl_port *endpoint, u64 spa); bool cxl_regions_fully_map(resource_size_t start, resource_size_t end); +void cxl_register_dax(resource_size_t start, resource_size_t end); #else static inline bool is_cxl_pmem_region(struct device *dev) { @@ -906,6 +907,10 @@ static inline bool cxl_regions_fully_map(resource_size= _t start, { return false; } +static inline void cxl_register_dax(resource_size_t start, + resource_size_t end) +{ +} #endif =20 void cxl_endpoint_parse_cdat(struct cxl_port *port); diff --git a/drivers/dax/hmem/hmem.c b/drivers/dax/hmem/hmem.c index db4c46337ac3..b9312e0f2e62 100644 --- a/drivers/dax/hmem/hmem.c +++ b/drivers/dax/hmem/hmem.c @@ -155,9 +155,10 @@ static int handle_deferred_cxl(struct device *host, in= t target_nid, if (region_intersects(res->start, resource_size(res), IORESOURCE_MEM, IORES_DESC_CXL) !=3D REGION_DISJOINT) { =20 - if (cxl_regions_fully_map(res->start, res->end)) + if (cxl_regions_fully_map(res->start, res->end)) { dax_cxl_mode =3D DAX_CXL_MODE_DROP; - else + cxl_register_dax(res->start, res->end); + } else dax_cxl_mode =3D DAX_CXL_MODE_REGISTER; =20 hmem_register_device(host, target_nid, res); --=20 2.17.1 From nobody Tue Dec 2 02:06:36 2025 Received: from MW6PR02CU001.outbound.protection.outlook.com (mail-westus2azon11012063.outbound.protection.outlook.com [52.101.48.63]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2C64A30AACA; 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Wed, 19 Nov 2025 19:19:42 -0800 From: Smita Koralahalli To: , , , , CC: Alison Schofield , Vishal Verma , Ira Weiny , Dan Williams , Jonathan Cameron , Yazen Ghannam , Dave Jiang , Davidlohr Bueso , Matthew Wilcox , Jan Kara , "Rafael J . Wysocki" , Len Brown , Pavel Machek , Li Ming , Jeff Johnson , "Ying Huang" , Yao Xingtao , Peter Zijlstra , Greg KH , Nathan Fontenot , Terry Bowman , Robert Richter , Benjamin Cheatham , Zhijian Li , "Borislav Petkov" , Ard Biesheuvel Subject: [PATCH v4 8/9] cxl/region, dax/hmem: Tear down CXL regions when HMEM reclaims Soft Reserved Date: Thu, 20 Nov 2025 03:19:24 +0000 Message-ID: <20251120031925.87762-9-Smita.KoralahalliChannabasappa@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20251120031925.87762-1-Smita.KoralahalliChannabasappa@amd.com> References: <20251120031925.87762-1-Smita.KoralahalliChannabasappa@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD7B:EE_|PH7PR12MB5974:EE_ X-MS-Office365-Filtering-Correlation-Id: 246f79ed-560d-4e1b-89a9-08de27e3ad97 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|7416014|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?RedRE+Q8EFXAdxdsOm4f5sK6hE5CkLyQ/Z4SVUUmsqdDxZ663Hni/2Axuxdn?= =?us-ascii?Q?xD5eDKPmxzpjg52xd6LqMqi0yqAn7CkC+sRtnfRX88kd1nzZf8aao2aU0VMR?= =?us-ascii?Q?n36+rl0yoeP77EuUO7nzCqYTXXkh8Z0bWWZh56hCR75oc4R5TVeOFFgTb8YA?= =?us-ascii?Q?HvcxphvJFKIJD97OGEcUk8b5gAMh5h/Oa+sJqunJwn+X/jmWQiUAZJkWE1Fr?= =?us-ascii?Q?ckccLTObfZqQI4UtcYrRbCrKrqYi3NF/ZPib/aSR+fM8OIlUm8FZ78geq9lk?= =?us-ascii?Q?xAv7OceZnP9GQ5qax/V3jgbLxeS7pgPoYdWpNwNlYpl9QZEh+Fk1p3nE6jpR?= =?us-ascii?Q?/zZqiFPtBsuXqJH1LC9vVk+7xAyu58R7KeJjosk/lVymAvy4lx9Js3JIK8q2?= =?us-ascii?Q?LOhR04ENlsSJB8UyB68syx9+U22FKC8aYDfL4fXUv6ZnDpIaQxX+WLfGACov?= =?us-ascii?Q?rBgfaIRk9kQ9qnIlKnoNF4PxxIJ3096/kh0aCcbEEEq1JDNly/9S/vvlDDft?= =?us-ascii?Q?rzhJWcttaJjTmx7wC7KAQUwOfctoyWaU3dEz7WOn9RpAYxDN11Vb/o128EK6?= =?us-ascii?Q?30GnIDz+uK0Tvig/GpfrBev/9NuT5xDPKSolt06Xm6160e9v8ogyCO7e6/uk?= =?us-ascii?Q?Ik747Fyu0mJPzZXdgKWydRFTsfu0WRTNmBAmLr+M5NQWEYnE6kwXGBIuyQN3?= =?us-ascii?Q?Wr1977H4Z/IR9s8s/BCsDRY/EnhatVf7liStgiPDg7+OvNqvk92P6MNQoYe4?= =?us-ascii?Q?mh+YSUYL7lML6E4+FHU391UNQIy7t9xDfOfFGyTEWTJsz+yEw4DMgEKQTd0q?= =?us-ascii?Q?kJfZ8IlkvY0J4g3S+ybu5LFxp+REKkq4wv+eDIE+ADSc0x4WHinYyQCvExqZ?= =?us-ascii?Q?SOGgnhbDNw8FyAZg0k5SWoSnX9sj9CD/RAkY9RTmjW02e2vjvH5ryfGmImCR?= =?us-ascii?Q?ZrdH/NHNMTONi4lfABFUW/rsUoOqIuY12z9ATqMIGy/5SWe/9icEMGO98Mkd?= =?us-ascii?Q?PCxjnaaOed2SIc7iVFA+bK+MEIEt+R+jXr0unn1KzqJKh5PsBS0OsmGt++4Z?= =?us-ascii?Q?L9G/AyUboIIs4Bh6uJo7hSEM+bSPAJotNnvihK0/qS76RmuihUfVns4wXES4?= =?us-ascii?Q?aRmmrGZK54tjkABPDsAUGRsRucESQOjY/QVddj7rP8N2USf/jSFSXvBuAQ4F?= =?us-ascii?Q?0RMLNJjLeIGqVJ5c/TqUsMB5mYqEmRFvOse75xl+43qNojM2aOP/WTqnUUPF?= =?us-ascii?Q?6DA6LX9NxsUGv/9u28mw9DC749IjSI0dd4EZatIr2qwN+rytUlvAI1mvU3tk?= =?us-ascii?Q?hNOGeg1SCYmosGO6FnBAht98WnPCdRpPAktus6kn8qWx1CdRxUv76ORC5lxr?= =?us-ascii?Q?j13hnhiVjLxt0AdkL7H/vDzb8RICh/j5uH4v6O4CV0D+3q4xwJuEglKcCLP6?= =?us-ascii?Q?Fsvr8+sjmhpGD+MSVfgZNQ0xrRpilPRT5JO3tKEooGh7DW0rDkLWGzTyQvPl?= =?us-ascii?Q?64TTXiwjr9/8IiqK3aIcYCFnCtYWNbPmvKAHREjVhGnIHQ5Cw2190WcE2IiF?= =?us-ascii?Q?0sftl0RTdN6ZfEBpGU4=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(82310400026)(7416014)(36860700013)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Nov 2025 03:19:55.6315 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 246f79ed-560d-4e1b-89a9-08de27e3ad97 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD7B.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB5974 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" If CXL regions do not fully cover a Soft Reserved span, HMEM takes ownership. Tear down overlapping CXL regions before allowing HMEM to register and online the memory. Add cxl_region_teardown() to walk CXL regions overlapping a span and unregister them via devm_release_action() and unregister_region(). Force the region state back to CXL_CONFIG_ACTIVE before unregistering to prevent the teardown path from resetting decoders HMEM still relies on to create its dax and online memory. Co-developed-by: Alison Schofield Signed-off-by: Alison Schofield Signed-off-by: Smita Koralahalli --- drivers/cxl/core/region.c | 38 ++++++++++++++++++++++++++++++++++++++ drivers/cxl/cxl.h | 5 +++++ drivers/dax/hmem/hmem.c | 4 +++- 3 files changed, 46 insertions(+), 1 deletion(-) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 38e7ec6a087b..266b24028df0 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -3784,6 +3784,44 @@ struct cxl_range_ctx { bool found; }; =20 +static int cxl_region_teardown_cb(struct device *dev, void *data) +{ + struct cxl_range_ctx *ctx =3D data; + struct cxl_root_decoder *cxlrd; + struct cxl_region_params *p; + struct cxl_region *cxlr; + struct cxl_port *port; + + cxlr =3D cxlr_overlapping_range(dev, ctx->start, ctx->end); + if (!cxlr) + return 0; + + cxlrd =3D to_cxl_root_decoder(cxlr->dev.parent); + port =3D cxlrd_to_port(cxlrd); + p =3D &cxlr->params; + + /* Force the region state back to CXL_CONFIG_ACTIVE so that + * unregister_region() does not run the full decoder reset path + * which would invalidate the decoder programming that HMEM + * relies on to create its DAX device and online the underlying + * memory. + */ + scoped_guard(rwsem_write, &cxl_rwsem.region) + p->state =3D min(p->state, CXL_CONFIG_ACTIVE); + + devm_release_action(port->uport_dev, unregister_region, cxlr); + + return 0; +} + +void cxl_region_teardown(resource_size_t start, resource_size_t end) +{ + struct cxl_range_ctx ctx =3D { .start =3D start, .end =3D end }; + + bus_for_each_dev(&cxl_bus_type, NULL, &ctx, cxl_region_teardown_cb); +} +EXPORT_SYMBOL_GPL(cxl_region_teardown); + static void cxl_region_enable_dax(struct cxl_region *cxlr) { struct cxl_region_params *p =3D &cxlr->params; diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 414ddf6c35d7..a215a88ef59c 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -880,6 +880,7 @@ struct cxl_dax_region *to_cxl_dax_region(struct device = *dev); u64 cxl_port_get_spa_cache_alias(struct cxl_port *endpoint, u64 spa); bool cxl_regions_fully_map(resource_size_t start, resource_size_t end); void cxl_register_dax(resource_size_t start, resource_size_t end); +void cxl_region_teardown(resource_size_t start, resource_size_t end); #else static inline bool is_cxl_pmem_region(struct device *dev) { @@ -911,6 +912,10 @@ static inline void cxl_register_dax(resource_size_t st= art, resource_size_t end) { } +static inline void cxl_region_teardown(resource_size_t start, + resource_size_t end) +{ +} #endif =20 void cxl_endpoint_parse_cdat(struct cxl_port *port); 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This restores visibility in /proc/iomem for ranges actively in use, while avoiding the early-boot conflicts that occurred when Soft Reserved was published into iomem before CXL window and region discovery. Link: https://lore.kernel.org/linux-cxl/29312c0765224ae76862d59a17748c8188f= b95f1.1692638817.git.alison.schofield@intel.com/ Co-developed-by: Alison Schofield Signed-off-by: Alison Schofield Co-developed-by: Zhijian Li Signed-off-by: Zhijian Li Signed-off-by: Smita Koralahalli Reviewed-by: Dave Jiang Reviewed-by: Jonathan Cameron --- drivers/dax/hmem/hmem.c | 32 +++++++++++++++++++++++++++++++- 1 file changed, 31 insertions(+), 1 deletion(-) diff --git a/drivers/dax/hmem/hmem.c b/drivers/dax/hmem/hmem.c index 7d874ee169ac..5f36b0374cf4 100644 --- a/drivers/dax/hmem/hmem.c +++ b/drivers/dax/hmem/hmem.c @@ -71,6 +71,34 @@ struct dax_defer_work { struct work_struct work; }; =20 +static void remove_soft_reserved(void *r) +{ + remove_resource(r); + kfree(r); +} + +static int add_soft_reserve_into_iomem(struct device *host, + const struct resource *res) +{ + struct resource *soft __free(kfree) =3D + kzalloc(sizeof(*soft), GFP_KERNEL); + int rc; + + if (!soft) + return -ENOMEM; + + *soft =3D DEFINE_RES_NAMED_DESC(res->start, (res->end - res->start + 1), + "Soft Reserved", IORESOURCE_MEM, + IORES_DESC_SOFT_RESERVED); + + rc =3D insert_resource(&iomem_resource, soft); + if (rc) + return rc; + + return devm_add_action_or_reset(host, remove_soft_reserved, + no_free_ptr(soft)); +} + static int hmem_register_device(struct device *host, int target_nid, const struct resource *res) { @@ -103,7 +131,9 @@ static int hmem_register_device(struct device *host, in= t target_nid, if (rc !=3D REGION_INTERSECTS) return 0; =20 - /* TODO: Add Soft-Reserved memory back to iomem */ + rc =3D add_soft_reserve_into_iomem(host, res); + if (rc) + return rc; =20 id =3D memregion_alloc(GFP_KERNEL); if (id < 0) { --=20 2.17.1