From nobody Tue Dec 2 02:04:30 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3E199376BC3; Thu, 20 Nov 2025 16:26:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763655990; cv=none; b=gcpnjLrpqnn1232FogVUwBmYPWbTq4K5QvXMN16N7oTMG/7KZl/jIRkHuRmF9pqJz8r0xiaZUScTyWrpcIK5hzMUimUJe5qYybjH3j16jwVRWCZE3bkI/galv6+tV+L2d94HJiIjEpljDVWQ4tEEdAtO0h3lf1TfIdTFPl9w0LI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763655990; c=relaxed/simple; bh=9bWXO/rkH5hXXpMBCIUifaVfnaubGBQH6NPhUvWS5Oo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=VLaJ3CIv/Zkx6G78GHB4yHlPrRxc/TvxivHYF1RnRVGAzGHJCkd1+ZJcdzeK+YUHfPsE76BHtCnFRVXYvJSuT/aUNzvWy0mHNpiQzQ8YbIt8q5gVjXx+1I8yy5FAgQABPWMuBTZ+Szl4nl9NUjKkG/RKfBVlE2oek6H2IErUc/Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=hwYdWZhJ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="hwYdWZhJ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C339AC4CEF1; Thu, 20 Nov 2025 16:26:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1763655990; bh=9bWXO/rkH5hXXpMBCIUifaVfnaubGBQH6NPhUvWS5Oo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hwYdWZhJDaU1ii5P7JCnre7uCG1ODITkC1bOXYS1NAm2hgT8ql1m8TRvudhqMZDnm gUyJ8m6N4a/xBuYSUmyYsdbkW9m6cMO35OwKLEUSFYZxiq66gUT96VYCbC6+1Q9ZO7 bOqFDe2JWtcHiAtpj8fwsoNpQymYgi6qHYHUsll0BpMxkUpVIUjpxWR7GVRyDx8or2 dEVymLuDjD+gnvqI+MiUb6Mnm1YqNArbVCUb6nWf90fDBCaQJvwh9XPm3QOCKTC/tL qSUfRI0Ek58WJt7bZi8COoFoPQ30v01bKLWOu8jb8M40QpMaS3xjaLj3kzAKuB/a3p t74jQx3T7riNA== From: Conor Dooley To: netdev@vger.kernel.org Cc: conor@kernel.org, Conor Dooley , Valentina.FernandezAlanis@microchip.com, Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Daire McNamara , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Nicolas Ferre , Claudiu Beznea , Richard Cochran , Samuel Holland , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Neil Armstrong , Dave Stevenson , Sean Anderson , Vineeth Karumanchi , Abin Joseph Subject: [RFC net-next v1 1/7] riscv: dts: microchip: add tsu clock to macb on mpfs Date: Thu, 20 Nov 2025 16:26:03 +0000 Message-ID: <20251120-ahead-filth-d4d9c560d213@spud> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251120-jubilant-purposely-67ec45ce4e2f@spud> References: <20251120-jubilant-purposely-67ec45ce4e2f@spud> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3446; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=G/EjKmDyaKdtOf0TBw6CiN96scA4kHOYzQWM+SxTmwY=; b=owGbwMvMwCVWscWwfUFT0iXG02pJDJnyjlLGp6IdPmo3nMrNv7VewcYvMuKQ74F+oymWgRdWz PE/Wri7o5SFQYyLQVZMkSXxdl+L1Po/Ljuce97CzGFlAhnCwMUpABOZ1MLwP2VZg2P99MzedW+/ TSjexfNHo/T7Dp4qWTbBJJl6o0WLJjIyLGhm/GFovJiJlVtzDeepK/Pcy+cX/XpdKfGp6DufRFk VMwA= X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Conor Dooley In increment mode, the tsu clock for the macb is provided separately to the pck, usually the same clock as the reference to the rtc provided by an off-chip oscillator. pclk is 150 MHz typically, and the reference is either 100 MHz or 125 MHz, so having the tsu clock is required for correct rate selection. Signed-off-by: Conor Dooley --- arch/riscv/boot/dts/microchip/Makefile.orig | 26 +++++++++++++++++++++ arch/riscv/boot/dts/microchip/mpfs.dtsi | 8 +++---- 2 files changed, 30 insertions(+), 4 deletions(-) create mode 100644 arch/riscv/boot/dts/microchip/Makefile.orig diff --git a/arch/riscv/boot/dts/microchip/Makefile.orig b/arch/riscv/boot/= dts/microchip/Makefile.orig new file mode 100644 index 000000000000..e94f4096fd40 --- /dev/null +++ b/arch/riscv/boot/dts/microchip/Makefile.orig @@ -0,0 +1,26 @@ +# SPDX-License-Identifier: GPL-2.0 +<<<<<<< HEAD +dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) +=3D mpfs-beaglev-fire.dtb +dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) +=3D mpfs-disco-kit.dtb +dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) +=3D mpfs-icicle-kit.dtb +dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) +=3D mpfs-icicle-kit-prod.dtb +dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) +=3D mpfs-m100pfsevp.dtb +dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) +=3D mpfs-polarberry.dtb +dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) +=3D mpfs-sev-kit.dtb +dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) +=3D mpfs-tysom-m.dtb +||||||| constructed fake ancestor +dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) +=3D mpfs-beaglev-fire.dtb +dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) +=3D mpfs-icicle-kit.dtb +dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) +=3D mpfs-m100pfsevp.dtb +dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) +=3D mpfs-polarberry.dtb +dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) +=3D mpfs-sev-kit.dtb +dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) +=3D mpfs-tysom-m.dtb +=3D=3D=3D=3D=3D=3D=3D +dtb-$(CONFIG_ARCH_MICROCHIP) +=3D mpfs-beaglev-fire.dtb +dtb-$(CONFIG_ARCH_MICROCHIP) +=3D mpfs-icicle-kit.dtb +dtb-$(CONFIG_ARCH_MICROCHIP) +=3D mpfs-m100pfsevp.dtb +dtb-$(CONFIG_ARCH_MICROCHIP) +=3D mpfs-polarberry.dtb +dtb-$(CONFIG_ARCH_MICROCHIP) +=3D mpfs-sev-kit.dtb +dtb-$(CONFIG_ARCH_MICROCHIP) +=3D mpfs-tysom-m.dtb +>>>>>>> riscv: dts: microchip: remove POLARFIRE mention in Makefile +dtb-$(CONFIG_ARCH_MICROCHIP) +=3D pic64gx-curiosity-kit.dtb diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/= microchip/mpfs.dtsi index 9883ca3554c5..68e130550130 100644 --- a/arch/riscv/boot/dts/microchip/mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi @@ -445,8 +445,8 @@ mac0: ethernet@20110000 { interrupt-parent =3D <&plic>; interrupts =3D <64>, <65>, <66>, <67>, <68>, <69>; local-mac-address =3D [00 00 00 00 00 00]; - clocks =3D <&clkcfg CLK_MAC0>, <&clkcfg CLK_AHB>; - clock-names =3D "pclk", "hclk"; + clocks =3D <&clkcfg CLK_MAC0>, <&clkcfg CLK_AHB>, <&refclk>; + clock-names =3D "pclk", "hclk", "tsu_clk"; resets =3D <&clkcfg CLK_MAC0>; status =3D "disabled"; }; @@ -459,8 +459,8 @@ mac1: ethernet@20112000 { interrupt-parent =3D <&plic>; interrupts =3D <70>, <71>, <72>, <73>, <74>, <75>; local-mac-address =3D [00 00 00 00 00 00]; - clocks =3D <&clkcfg CLK_MAC1>, <&clkcfg CLK_AHB>; - clock-names =3D "pclk", "hclk"; + clocks =3D <&clkcfg CLK_MAC1>, <&clkcfg CLK_AHB>, <&refclk>; + clock-names =3D "pclk", "hclk", "tsu_clk"; resets =3D <&clkcfg CLK_MAC1>; status =3D "disabled"; }; --=20 2.51.0 From nobody Tue Dec 2 02:04:30 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D5AF7348867; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="OUP7Q68P" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6E99CC4CEF1; Thu, 20 Nov 2025 16:26:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1763655995; bh=uTA+9by6WkTj/YyfrRJaP6uWrGxXUK8E1OGGD6svXNk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OUP7Q68P6m2hQLa6Yx7/cAJrv+1/blhA4zCLQkPSXtvz+EUdA88migDRkMrmrJtr3 rwkZywC88dG/x/WIvmwd8dWAc4WjKgyQk1h2B2ff0i35FqCZYsW2PGjBXLvcrQojYh zng3tHYtG+JYW92klZlGfZMReaaRa8rrgS1WNSmddn6MJlSkGxM+Xt6qEP12mruCq/ 03ba7fOIMgi4EiaGOZYumPnQ4RzqkwT7XDOgMFpgi/W7gK5bx6+zy2Q7us9EAsnrOg S1HiJKY7NOLd1ivURQSDxb4zo98lUBDZOfWf9Aduo8+KIqV/hV+zmoq6D6liINiaKn dwI8HjbFJkVLw== From: Conor Dooley To: netdev@vger.kernel.org Cc: conor@kernel.org, Conor Dooley , Valentina.FernandezAlanis@microchip.com, Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Daire McNamara , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Nicolas Ferre , Claudiu Beznea , Richard Cochran , Samuel Holland , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Neil Armstrong , Dave Stevenson , Sean Anderson , Vineeth Karumanchi , Abin Joseph Subject: [RFC net-next v1 2/7] net: macb: warn on pclk use as a tsu_clk fallback Date: Thu, 20 Nov 2025 16:26:04 +0000 Message-ID: <20251120-guts-grandma-15cf7838b0aa@spud> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251120-jubilant-purposely-67ec45ce4e2f@spud> References: <20251120-jubilant-purposely-67ec45ce4e2f@spud> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3306; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=v3962aZmMGVHfkgDFXhApnPxgvXxwo2H9ZQ6D4IRJzc=; b=owGbwMvMwCVWscWwfUFT0iXG02pJDJnyjlISvNuTixaHS5zRuum9YtpeL9Gd2wMfnnvxYrvD/ xl+FlLZHaUsDGJcDLJiiiyJt/tapNb/cdnh3PMWZg4rE8gQBi5OAZiIpRTDXzHxP/+K5azEdgRr Npk+f77oxd69tzgvGVydXrg6YFLlBjaG/44bVqw1O7blu4GbwFeTrdxPrgWn6yml68RXJSl/fBc tyg4A X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Conor Dooley Not a serious patch as-is, but I think this pclk fallback code is not really a good idea. I think the reason that it exists is that there is a parameter for the IP that will make the hardware use the pclk to clock the timestamper, but from a devicetree and driver point of view I don't think this is actually really relevant and this code is just bug prone. It makes more sense for the binding/driver if the tsu_clk clock represents whatever clock is clocking the timestamper, not specifically the tsu_clk input to the IP block, because what it does at the moment will register the ptp clock with an incorrect clock in the "right" (or wrong I guess) circumstances. This can happen when the capability MACB_CAPS_GEM_HAS_PTP is set for the integration, MACB_USE_HWSTAMP is set (which a multiplatform kernel would) but the devicetree does not provide a tsu_clk. Sure, that probably means the devicetree is wrong, but there's no per-compatible clocks enforcement in the binding so getting it right might not be so easy! It's my opinion that, regardless of the way the parameter is set, it makes sense for the binding/driver if the "tsu_clk" clock actually represents the clock being used by the timestamper, not strictly the clock provided to the tsu_clk input to the IP block. That's because there appears to be nothing done differently between the two cases w.r.t. configuring the hardware at runtime and it allows us to be sure the ptp clock will not be registered with the wrong clock. Obviously, for compatibility reasons I can't just delete this fallback though, because there are devices using it, so just warn in the hopes that the devices that actually use pclk for the timestamper can be updated to explicitly provide it. Out of the devices that claim MACB_CAPS_GEM_HAS_PTP the fu540, mpfs, sama5d2 and sama7g5-emac (but not sama7g5-gem) are at risk of having this problem. It may be that these platforms actually do use the pclk for the timestamper (either by supplying pclk to the tsu_clk input of the IP, or by having the IP block configured to use pclk instead of the tsu_clk input). mpfs is wrong though, it does not use pclk for the tsu_clk, so the driver is registering the ptp clock incorrectly. Signed-off-by: Conor Dooley --- As I say, not a serious patch at the moment, but I'd like to know what folks think here. All of the Xilinx platforms I looked at explicitly provide the tsu_clk, so aren't impacted. I know this changes the meaning of the dt-binding, but I don't think it is harmful to do so, as it is a nop for any existing devices that provide tsu_clk. --- drivers/net/ethernet/cadence/macb_main.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/etherne= t/cadence/macb_main.c index ca2386b83473..b9248f52dd5b 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -3567,6 +3567,7 @@ static unsigned int gem_get_tsu_rate(struct macb *bp) else if (!IS_ERR(bp->pclk)) { tsu_clk =3D bp->pclk; tsu_rate =3D clk_get_rate(tsu_clk); + dev_warn(&bp->pdev->dev, "devicetree missing tsu_clk, using pclk as fall= back\n"); } else return -ENOTSUPP; return tsu_rate; --=20 2.51.0 From nobody Tue Dec 2 02:04:30 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9666B3659FE; Thu, 20 Nov 2025 16:26:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763656001; cv=none; b=rMahV974hFm6xERcdxWSyiY0/6S2BqZHk+V+Q1Oj/e+4f3qxYC5BfTThKLVJ5sN9PvS2RNguJxnVMFSsDtXHrywmKOiD3qV2qnqtdor6ab6Nru1/AMgJZqHHpNmcxbhNqTJl6bCEo4nj+8wVDQNMXKcyeuDYTa8sovnL83AKKTc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763656001; c=relaxed/simple; bh=GWtPvPMHcUUiUNVWuDOWqUJ+vRXynNCElKr8HT+DF74=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sXHP0z/fsBT8MBPij1eZINh2RUOTImiIN9C/M6sUc2wXD7erMIgxG17NAo0lwlcSlXnoBNMZBR3cako5KjZcqvXygeYjZWt3ZJFLdZPVLxEvQh79TM3uxCLseCEmrbKUZ+Wyylz3jRfskBnWahvc73AEhxxKePImGIGZTPK3/cA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=R1KRO87e; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="R1KRO87e" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 194FBC4CEF1; Thu, 20 Nov 2025 16:26:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1763656001; bh=GWtPvPMHcUUiUNVWuDOWqUJ+vRXynNCElKr8HT+DF74=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=R1KRO87equ51T3Ha9PTGyUR1cRUv3e1cfZRISDzF0XCFsbT4xT+dE/zzurlDJy+/n w6dH4vnXrL3LooIs1E+EKH0qRUae5A9HpmQsyMVJ5byqt6CnhXmh0eTzWnShD3j0xS R1g0T+STfgmDH2ef2GT/CsesvkJYk4ZmrR6muYiK7tamqgYYcmjqfhuNNbcykYC9R5 OitZU8OXWK8MlTwpMrdMqwXN0TELz2fGX3NTtmea0u6sIWTveNyulrv/NqUK+V5Msz z8ab2AOpk1jq+ojH0A2ON41bn2eeJlIOBPcgTh0V51Ic0xVQHbUxHlyFx/gCgb+5JT P0B901W2B03cQ== From: Conor Dooley To: netdev@vger.kernel.org Cc: conor@kernel.org, Conor Dooley , Valentina.FernandezAlanis@microchip.com, Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Daire McNamara , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Nicolas Ferre , Claudiu Beznea , Richard Cochran , Samuel Holland , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Neil Armstrong , Dave Stevenson , Sean Anderson , Vineeth Karumanchi , Abin Joseph Subject: [RFC net-next v1 3/7] net: macb: rename macb_default_usrio to at91_default_usrio as not all platforms have mii mode control in usrio Date: Thu, 20 Nov 2025 16:26:05 +0000 Message-ID: <20251120-plaza-congrats-b6c5c1bf5c3d@spud> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251120-jubilant-purposely-67ec45ce4e2f@spud> References: <20251120-jubilant-purposely-67ec45ce4e2f@spud> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=10639; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=lUQf5fZpGrUYR4+IhT13hqornTECH9jG0iwfs4OOUJc=; b=owGbwMvMwCVWscWwfUFT0iXG02pJDJnyjlKNgRznWY6+vWkaqFacrHhh0qtnNjY1j+e/P3KL8 fxGp8cZHaUsDGJcDLJiiiyJt/tapNb/cdnh3PMWZg4rE8gQBi5OAZjI+QBGhl8/2YJ0+pn6nkbu 3CQ8+Wqm5TbHxAyxpyoplhG8kV8KlzD8Fcg2in6i79HKs2ayShH3n/gVH9it3yteU9Y277sb4ji JDQA= X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Conor Dooley Calling this structure macb_default_usrio is misleading, I believe, as it implies that it should be used if your platform has nothing special to do in usrio. Since usrio is platform dependant, the default here is probably for each usrio to do nothing, with the macb documentation I have access to prescribing no standard behaviour here. We noticed that this was problematic because on mpfs, a bit that macb_default_usrio sets to deal with the MII mode actually changes the source for the tsu_clk to something with how the majority of mpfs devices are actually configured! Rename it to at91_default_usrio, since that's where the values actually come from for these. I have no idea if any of the other platforms that use the default actually copied at91's usrio configuration or if they have usrio configurations where what the driver does has no impact. Gate touching these bits behind a capability, like the clken refclock usrio knob, so that platforms without the MII mode stuff can avoid running this code. Signed-off-by: Conor Dooley --- drivers/net/ethernet/cadence/macb.h | 1 + drivers/net/ethernet/cadence/macb_main.c | 106 +++++++++++++---------- 2 files changed, 62 insertions(+), 45 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cad= ence/macb.h index 0830c48973aa..59881c48485b 100644 --- a/drivers/net/ethernet/cadence/macb.h +++ b/drivers/net/ethernet/cadence/macb.h @@ -769,6 +769,7 @@ #define MACB_CAPS_NEED_TSUCLK 0x00000400 #define MACB_CAPS_QUEUE_DISABLE 0x00000800 #define MACB_CAPS_QBV 0x00001000 +#define MACB_CAPS_USRIO_HAS_MII 0x00002000 #define MACB_CAPS_PCS 0x01000000 #define MACB_CAPS_HIGH_SPEED 0x02000000 #define MACB_CAPS_CLK_HW_CHG 0x04000000 diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/etherne= t/cadence/macb_main.c index b9248f52dd5b..888a72c40f26 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -4636,13 +4636,15 @@ static int macb_init(struct platform_device *pdev) =20 if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) { val =3D 0; - if (phy_interface_mode_is_rgmii(bp->phy_interface)) - val =3D bp->usrio->rgmii; - else if (bp->phy_interface =3D=3D PHY_INTERFACE_MODE_RMII && - (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII)) - val =3D bp->usrio->rmii; - else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII)) - val =3D bp->usrio->mii; + if (bp->caps & MACB_CAPS_USRIO_HAS_MII) { + if (phy_interface_mode_is_rgmii(bp->phy_interface)) + val =3D bp->usrio->rgmii; + else if (bp->phy_interface =3D=3D PHY_INTERFACE_MODE_RMII && + (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII)) + val =3D bp->usrio->rmii; + else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII)) + val =3D bp->usrio->mii; + } =20 if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN) val |=3D bp->usrio->refclk; @@ -4660,13 +4662,6 @@ static int macb_init(struct platform_device *pdev) return 0; } =20 -static const struct macb_usrio_config macb_default_usrio =3D { - .mii =3D MACB_BIT(MII), - .rmii =3D MACB_BIT(RMII), - .rgmii =3D GEM_BIT(RGMII), - .refclk =3D MACB_BIT(CLKEN), -}; - #if defined(CONFIG_OF) /* 1518 rounded up */ #define AT91ETHER_MAX_RBUFF_SZ 0x600 @@ -5217,6 +5212,13 @@ static int init_reset_optional(struct platform_devic= e *pdev) return ret; } =20 +static const struct macb_usrio_config at91_default_usrio =3D { + .mii =3D MACB_BIT(MII), + .rmii =3D MACB_BIT(RMII), + .rgmii =3D GEM_BIT(RGMII), + .refclk =3D MACB_BIT(CLKEN), +}; + static const struct macb_usrio_config sama7g5_usrio =3D { .mii =3D 0, .rmii =3D 1, @@ -5227,104 +5229,114 @@ static const struct macb_usrio_config sama7g5_usr= io =3D { =20 static const struct macb_config fu540_c000_config =3D { .caps =3D MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO | - MACB_CAPS_GEM_HAS_PTP, + MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_USRIO_HAS_MII, .dma_burst_length =3D 16, .clk_init =3D fu540_c000_clk_init, .init =3D fu540_c000_init, .jumbo_max_len =3D 10240, - .usrio =3D &macb_default_usrio, + .usrio =3D &at91_default_usrio, }; =20 static const struct macb_config at91sam9260_config =3D { - .caps =3D MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII, + .caps =3D MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII= | + MACB_CAPS_USRIO_HAS_MII, .clk_init =3D macb_clk_init, .init =3D macb_init, - .usrio =3D &macb_default_usrio, + .usrio =3D &at91_default_usrio, }; =20 static const struct macb_config sama5d3macb_config =3D { .caps =3D MACB_CAPS_SG_DISABLED | - MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII, + MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | + MACB_CAPS_USRIO_HAS_MII, .clk_init =3D macb_clk_init, .init =3D macb_init, - .usrio =3D &macb_default_usrio, + .usrio =3D &at91_default_usrio, }; =20 static const struct macb_config pc302gem_config =3D { - .caps =3D MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE, + .caps =3D MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE | + MACB_CAPS_USRIO_HAS_MII, .dma_burst_length =3D 16, .clk_init =3D macb_clk_init, .init =3D macb_init, - .usrio =3D &macb_default_usrio, + .usrio =3D &at91_default_usrio, }; =20 static const struct macb_config sama5d2_config =3D { - .caps =3D MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | MACB_CAPS_JUMBO, + .caps =3D MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | MACB_CAPS_JUMBO | + MACB_CAPS_USRIO_HAS_MII, .dma_burst_length =3D 16, .clk_init =3D macb_clk_init, .init =3D macb_init, .jumbo_max_len =3D 10240, - .usrio =3D &macb_default_usrio, + .usrio =3D &at91_default_usrio, }; =20 static const struct macb_config sama5d29_config =3D { - .caps =3D MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | MACB_CAPS_GEM_HAS_PTP, + .caps =3D MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | MACB_CAPS_GEM_HAS_PTP | + MACB_CAPS_USRIO_HAS_MII, .dma_burst_length =3D 16, .clk_init =3D macb_clk_init, .init =3D macb_init, - .usrio =3D &macb_default_usrio, + .usrio =3D &at91_default_usrio, }; =20 static const struct macb_config sama5d3_config =3D { .caps =3D MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE | - MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | MACB_CAPS_JUMBO, + MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | MACB_CAPS_JUMBO | + MACB_CAPS_USRIO_HAS_MII, .dma_burst_length =3D 16, .clk_init =3D macb_clk_init, .init =3D macb_init, .jumbo_max_len =3D 10240, - .usrio =3D &macb_default_usrio, + .usrio =3D &at91_default_usrio, }; =20 static const struct macb_config sama5d4_config =3D { - .caps =3D MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII, + .caps =3D MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | + MACB_CAPS_USRIO_HAS_MII, .dma_burst_length =3D 4, .clk_init =3D macb_clk_init, .init =3D macb_init, - .usrio =3D &macb_default_usrio, + .usrio =3D &at91_default_usrio, }; =20 static const struct macb_config emac_config =3D { - .caps =3D MACB_CAPS_NEEDS_RSTONUBR | MACB_CAPS_MACB_IS_EMAC, + .caps =3D MACB_CAPS_NEEDS_RSTONUBR | MACB_CAPS_MACB_IS_EMAC | + MACB_CAPS_USRIO_HAS_MII, .clk_init =3D at91ether_clk_init, .init =3D at91ether_init, - .usrio =3D &macb_default_usrio, + .usrio =3D &at91_default_usrio, }; =20 static const struct macb_config np4_config =3D { .caps =3D MACB_CAPS_USRIO_DISABLED, .clk_init =3D macb_clk_init, .init =3D macb_init, - .usrio =3D &macb_default_usrio, + .usrio =3D &at91_default_usrio, }; =20 static const struct macb_config zynqmp_config =3D { .caps =3D MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO | - MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH, + MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH | + MACB_CAPS_USRIO_HAS_MII, .dma_burst_length =3D 16, .clk_init =3D macb_clk_init, .init =3D init_reset_optional, .jumbo_max_len =3D 10240, - .usrio =3D &macb_default_usrio, + .usrio =3D &at91_default_usrio, }; =20 static const struct macb_config zynq_config =3D { .caps =3D MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_NO_GIGABIT_HALF | - MACB_CAPS_NEEDS_RSTONUBR, + MACB_CAPS_NEEDS_RSTONUBR | + MACB_CAPS_USRIO_HAS_MII, .dma_burst_length =3D 16, .clk_init =3D macb_clk_init, .init =3D macb_init, - .usrio =3D &macb_default_usrio, + .usrio =3D &at91_default_usrio, }; =20 static const struct macb_config mpfs_config =3D { @@ -5334,7 +5346,7 @@ static const struct macb_config mpfs_config =3D { .dma_burst_length =3D 16, .clk_init =3D macb_clk_init, .init =3D init_reset_optional, - .usrio =3D &macb_default_usrio, + .usrio =3D &at91_default_usrio, .max_tx_length =3D 4040, /* Cadence Erratum 1686 */ .jumbo_max_len =3D 4040, }; @@ -5342,7 +5354,8 @@ static const struct macb_config mpfs_config =3D { static const struct macb_config sama7g5_gem_config =3D { .caps =3D MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_CLK_HW_CHG | MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | - MACB_CAPS_MIIONRGMII | MACB_CAPS_GEM_HAS_PTP, + MACB_CAPS_MIIONRGMII | MACB_CAPS_GEM_HAS_PTP | + MACB_CAPS_USRIO_HAS_MII, .dma_burst_length =3D 16, .clk_init =3D macb_clk_init, .init =3D macb_init, @@ -5352,7 +5365,8 @@ static const struct macb_config sama7g5_gem_config = =3D { static const struct macb_config sama7g5_emac_config =3D { .caps =3D MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII | MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_MIIONRGMII | - MACB_CAPS_GEM_HAS_PTP, + MACB_CAPS_GEM_HAS_PTP | + MACB_CAPS_USRIO_HAS_MII, .dma_burst_length =3D 16, .clk_init =3D macb_clk_init, .init =3D macb_init, @@ -5363,22 +5377,24 @@ static const struct macb_config versal_config =3D { .caps =3D MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO | MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH | MACB_CAPS_NEED_TSUCLK | MACB_CAPS_QUEUE_DISABLE | - MACB_CAPS_QBV, + MACB_CAPS_QBV | + MACB_CAPS_USRIO_HAS_MII, .dma_burst_length =3D 16, .clk_init =3D macb_clk_init, .init =3D init_reset_optional, .jumbo_max_len =3D 10240, - .usrio =3D &macb_default_usrio, + .usrio =3D &at91_default_usrio, }; =20 static const struct macb_config raspberrypi_rp1_config =3D { .caps =3D MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_CLK_HW_CHG | MACB_CAPS_JUMBO | - MACB_CAPS_GEM_HAS_PTP, + MACB_CAPS_GEM_HAS_PTP | + MACB_CAPS_USRIO_HAS_MII, .dma_burst_length =3D 16, .clk_init =3D macb_clk_init, .init =3D macb_init, - .usrio =3D &macb_default_usrio, + .usrio =3D &at91_default_usrio, .jumbo_max_len =3D 10240, }; =20 @@ -5418,7 +5434,7 @@ static const struct macb_config default_gem_config = =3D { .dma_burst_length =3D 16, .clk_init =3D macb_clk_init, .init =3D macb_init, - .usrio =3D &macb_default_usrio, + .usrio =3D &at91_default_usrio, .jumbo_max_len =3D 10240, }; =20 --=20 2.51.0 From nobody Tue Dec 2 02:04:30 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E732366573; Thu, 20 Nov 2025 16:26:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Thu, 20 Nov 2025 16:26:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1763656007; bh=0AGNlvqqr0qu4bwYr8AQBoa4jNlfvu8ZN5pTq4ez5ZE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Wis8FnzWPhKLKU+uK1W0nWROE0rAfq+mPjJk2YhoLyjqhObcBYjrDRf33s6Bq7Fnx Sy1KyRr3Q93U59KEH4r9K2fpnCh4EpuhDgBGJhtXmw67UciyXZa3aM9zpZJCE37L4k +BMQTePTqHmRqdy92goxx5+Hh4BmmR2FG/zB/ixK9vL0yYf2Vy8vexwYbI8DMhrAzF tDhEHIuS19Y57Z1j6HEmllx9zoK2QSfgSXv4IjAbkUWMI4m8U7DMUcjHaO3TS0Agsk xgfD2Bel5PM6UCXlTRl3kdn+ZwcxWsbnE3DC9vGCfdn2mhZ+3FTs8rwcBda7tv2wWb Iexs3zgkdcTJg== From: Conor Dooley To: netdev@vger.kernel.org Cc: conor@kernel.org, Conor Dooley , Valentina.FernandezAlanis@microchip.com, Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Daire McNamara , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Nicolas Ferre , Claudiu Beznea , Richard Cochran , Samuel Holland , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Neil Armstrong , Dave Stevenson , Sean Anderson , Vineeth Karumanchi , Abin Joseph Subject: [RFC net-next v1 4/7] net: macb: np4 doesn't need a usrio pointer Date: Thu, 20 Nov 2025 16:26:06 +0000 Message-ID: <20251120-native-steadier-481bc9453d04@spud> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251120-jubilant-purposely-67ec45ce4e2f@spud> References: <20251120-jubilant-purposely-67ec45ce4e2f@spud> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=818; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=tC+n+f2MenYJnWXWr5SyA85ikQiWhM9zmnDvVhPzymI=; b=owGbwMvMwCVWscWwfUFT0iXG02pJDJnyjlIXF6/531VxvHi70bQzkc9PevhM38O2ZXMzK0voS pb0yjWvO0pZGMS4GGTFFFkSb/e1SK3/47LDuectzBxWJpAhDFycAjARiZeMDKdUWNfKiSdvijvi +jVo7kReqbBelX1rH/0X/yA2v/WMOwfDX/HTjBxqL+Z3i2qY3Dl/beKV3TrP2W15fr+65/AqdsG DM0wA X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Conor Dooley USRIO is disabled on this platform, having a pointer to a usrio config structure doesn't actually do anything other than look weird. Signed-off-by: Conor Dooley --- drivers/net/ethernet/cadence/macb_main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/etherne= t/cadence/macb_main.c index 888a72c40f26..21045575f19c 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -5314,7 +5314,7 @@ static const struct macb_config np4_config =3D { .caps =3D MACB_CAPS_USRIO_DISABLED, .clk_init =3D macb_clk_init, .init =3D macb_init, - .usrio =3D &at91_default_usrio, + .usrio =3D NULL, }; =20 static const struct macb_config zynqmp_config =3D { --=20 2.51.0 From nobody Tue Dec 2 02:04:30 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C0FBB366DC7; Thu, 20 Nov 2025 16:26:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763656012; cv=none; b=EJY5YRfIuoCsu0zg2nMH82HUU/JsEGFcSk/G9Idds7cb4IpS49zWYHVWyAqy7LT6Trput6kUcN2KjQxewePlr8Oa5DXVWhB+VHFOjRY8aYYy9snAwTHwRsymi5yRznlaBGdXbM0WQ/1fsd+LfmI5ouYL8BayCWvMfqvPozhP8S0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763656012; c=relaxed/simple; bh=rkNBjbwLoFq9BqcRqqIp3a/rpQWG6VvjMT67WwIxYzY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qtZP4voUcdRMu/W2qbSS8qW4451Vp+BgTEx/97FE8xbAm4Wej2bqs/ZS2mlrb28lOAqm95xsH1/qTASYnEstb3m7Ta34ggeN91MY26/uDSDB6XBAxPSQ1L+XnSiJ8PE0Efn6UyFFapTDkH0+XOYP8H9I5mmyb/bMLfsnAxGCz6I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=OuBwFOIQ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="OuBwFOIQ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 62E8AC4CEF1; Thu, 20 Nov 2025 16:26:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1763656012; bh=rkNBjbwLoFq9BqcRqqIp3a/rpQWG6VvjMT67WwIxYzY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OuBwFOIQtvJZo4UvFhnNNYeKkLD2w5SzhLhRQTWxfYBdQ965AZrT+gm8T05WDE6/c roNe31hpHWTh7xmbB+ZM4LrItzMwgO6mshm5Eq67KB31QjgKSGkW627WPO2DdGpYym NvRXeKY9WyO8f6wTfOdew+02CiXs3iHjshf8h8V/SWdJW4JJX1tU7v293SR7p6h4kE POfCwD7TGZkWoD1z8xHKlW59FVmuGGzIrO1ZpOXNGhGU1CGraNkrci4gqW7vdkzrIl M/3lWIYLbAM+OTEYK+R1mTfT6f88RBRXKT+n+/7tsSWfQMn37wHz34XSPGIS3IkwZJ C9VsCmHpMx3wg== From: Conor Dooley To: netdev@vger.kernel.org Cc: conor@kernel.org, Conor Dooley , Valentina.FernandezAlanis@microchip.com, Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Daire McNamara , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Nicolas Ferre , Claudiu Beznea , Richard Cochran , Samuel Holland , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Neil Armstrong , Dave Stevenson , Sean Anderson , Vineeth Karumanchi , Abin Joseph Subject: [RFC net-next v1 5/7] dt-bindings: net: macb: add property indicating timer adjust mode Date: Thu, 20 Nov 2025 16:26:07 +0000 Message-ID: <20251120-drudge-disloyal-9b8a88079905@spud> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251120-jubilant-purposely-67ec45ce4e2f@spud> References: <20251120-jubilant-purposely-67ec45ce4e2f@spud> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1146; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=NDamtq5JNE/kXNNE44aa9YujEMn703V/vjt2FaQ3+K8=; b=kA0DAAoWeLQxh6CCYtIByyZiAGkfQRuhTkDIGxVQJ8t/SMCYg4kOkb8JzlWdyFTz6FOW5pgU9 Yh1BAAWCgAdFiEEYduOhBqv/ES4Q4zteLQxh6CCYtIFAmkfQRsACgkQeLQxh6CCYtKeZAD/W+QW 1evt7Irt7dIdI65P4eITbL18e/FN8tPb5HbKQyQBANeQMpJgIgUt6nCK2WOnnI0Hu3iQkOkY8mH UTLhpneMM X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Conor Dooley Signed-off-by: Conor Dooley --- .../devicetree/bindings/net/cdns,macb.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documen= tation/devicetree/bindings/net/cdns,macb.yaml index 1029786a855c..4cea288412b5 100644 --- a/Documentation/devicetree/bindings/net/cdns,macb.yaml +++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml @@ -116,6 +116,12 @@ properties: power-domains: maxItems: 1 =20 + cdns,timer-adjust: + type: boolean + description: + Set when the hardware is operating in timer-adjust mode, where the t= imer + is controlled by the gem_tsu_inc_ctrl and gem_tsu_ms inputs. + cdns,refclk-ext: type: boolean description: @@ -182,6 +188,15 @@ allOf: properties: reg: maxItems: 1 + - if: + not: + properties: + compatible: + contains: + const: microchip,mpfs-macb + then: + properties: + cdns,timer-adjust: false =20 unevaluatedProperties: false =20 --=20 2.51.0 From nobody Tue Dec 2 02:04:30 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 77DDE3644D9; Thu, 20 Nov 2025 16:26:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763656018; cv=none; b=h1PbA/tF7sLasudcYtQRq1uPzWuFf6i7q0DsXcdCSM/HgTgBD3qZfoyladhcooc4/yZSkfzh7lAR0ffqiCh7e2d9kFyRHGN29v6WnshIjsOCDylOuqKMNwfbWBoeDqoPO505yBTwKwdc/eIcKjnHFYTxmqBWpkW+bLtF5vwo4/4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763656018; c=relaxed/simple; bh=vyKf7oAe73jG7REVIeUhuNZDGGytb/NVXkzSMRKd0IY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JATx9W9GBrzzg9wlk//syyEUNRpvg7LDtPxEZjoSmM3d1Q4XSMML7iJzl8rTsBK5PtysO5EexRcYceJLlDewnMlRsWHQSwtuFDAYp1BJ6U4Ig8UclrQsjDQwu5jZ9km31noEp1BQcq9K2RwAjTGNXBrsZ8GCSu6+r2CpTzO4qAM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=S1U8Lsrs; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="S1U8Lsrs" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0E521C4CEF1; Thu, 20 Nov 2025 16:26:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1763656018; bh=vyKf7oAe73jG7REVIeUhuNZDGGytb/NVXkzSMRKd0IY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=S1U8Lsrs/SxWVweihN4p0v2fQXX5uuo5KT1E0ATmGO7U44Cg1lZoRLt2akgeKu5Eu PhVO5/ACbGAAMWNLo37apEbqD/B6pt5iXzcQylc8Fuo+KwWMVAxs9vKh9KtKHRsp3I BF5MyxkA8z+Z2FakraOKNu8wzeBjd7VQYsEIMEin7CXevE6XJnzIziNcuzcLF7/ooQ eGum4pIH22+TM8VL8dzK5EgnpvgL5JEavG3gjOb13fdaJenmDJpMu5GUCa9u8rTIzq xeZSeTNSzZ0LdFZveCpuaO/nQXKN/TKwcEVRD8upoH5VE0V/ScIylChZgSZIKbOeP7 234s5P0on+iKQ== From: Conor Dooley To: netdev@vger.kernel.org Cc: conor@kernel.org, Conor Dooley , Valentina.FernandezAlanis@microchip.com, Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Daire McNamara , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Nicolas Ferre , Claudiu Beznea , Richard Cochran , Samuel Holland , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Neil Armstrong , Dave Stevenson , Sean Anderson , Vineeth Karumanchi , Abin Joseph Subject: [RFC net-next v1 6/7] net: macb: afaict, the driver doesn't support tsu timer adjust mode Date: Thu, 20 Nov 2025 16:26:08 +0000 Message-ID: <20251120-grudging-gargle-690dad0a5c5f@spud> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251120-jubilant-purposely-67ec45ce4e2f@spud> References: <20251120-jubilant-purposely-67ec45ce4e2f@spud> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1079; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=QT0eIvEE2MWf5tzLxJfFcb6I4liyojXQm/8lvAoxpqw=; b=owGbwMvMwCVWscWwfUFT0iXG02pJDJnyjtKnJH/Lxxx509ptxp515eBnJpeuOYL35+0MqxUql ki+Fzito5SFQYyLQVZMkSXxdl+L1Po/Ljuce97CzGFlAhnCwMUpABNpqmX4X3H0yh7VtcUdBfyq VSytl5j+zt/+vuHQnrgJbv8E8wXX2jEytFx9vHXprXMbp3Nyhx7ercrvwSgSGSN/LqVpzmqBPZ0 nmAE= X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Conor Dooley The ptp portion of this driver controls the tsu's timer, which is not compatible with the hardware trying to control it via the gem_tsu_inc_ctrl and gem_tsu_ms inputs afaict. Abort probe if someone tries to use it. Signed-off-by: Conor Dooley --- drivers/net/ethernet/cadence/macb_main.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/etherne= t/cadence/macb_main.c index 21045575f19c..4ad1409dab63 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -5531,6 +5531,12 @@ static int macb_probe(struct platform_device *pdev) =20 bp->usrio =3D macb_config->usrio; =20 + if (of_property_read_bool(bp->pdev->dev.of_node, "cdns,timer-adjust") && + IS_ENABLED(CONFIG_MACB_USE_HWSTAMP)) { + dev_err(&pdev->dev, "Timer adjust mode is not supported\n"); + goto err_out_free_netdev; + } + /* By default we set to partial store and forward mode for zynqmp. * Disable if not set in devicetree. */ --=20 2.51.0 From nobody Tue Dec 2 02:04:30 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3509336A00B; Thu, 20 Nov 2025 16:27:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763656024; cv=none; b=SwjmSt4V7PJHkwNTrdlCQh50eMuLQozhmOJvkE/5sQXCnh97jLWY87MHPSf61DcKyUCGnqlMQ/TVHMbuIKEabCHlpkHCcJznPw3PYcNxGCjOReqE/9Fc1ubvsS7Zk6IR4eVEZtvnjhGB6vnU73I5IdKFuB7JF6c2F7jHcNEMAko= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763656024; c=relaxed/simple; bh=OweOwTJ7iRHriV/3fFMI8DxPPwMu/XvNOTvcHJ/FBOw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=eFhZKG8wkec7URzB9GLUOTThT0S/yeDRVCk7QzSGgO2WO4hvpQt359EEux0CgK66BOdpoxqT4zc+acgbs21J6rIwFkfI3cAkRC1VLmQGi2iDxAOqWaDWjwKcbOKeV1WFwnWghFoUfHJcOjx71iP+iESb2t/fLo6DScYiG1b0XlQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=fdETgA+g; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="fdETgA+g" Received: by smtp.kernel.org (Postfix) with ESMTPSA id AE44CC4CEF1; Thu, 20 Nov 2025 16:26:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1763656024; bh=OweOwTJ7iRHriV/3fFMI8DxPPwMu/XvNOTvcHJ/FBOw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fdETgA+g3R0EW6aeW24bHZPgm6m62uRkdrkMSCVi0kiUZewS7iAJ97yY89ZtTQuSk DO0hsLOu/n557vc1K7hsKouuh9xfSsZCAiBQt043xMJR5x2ESkQPcilKWCXMSI1wS9 FU3v07driVnBcdVUJ+Zw8acieRE7aNLP81fjfaILvO1S3ru4mGR8oIhNrupORw5boJ bjAd3+dpbKdMkoZpfuCKYCWGMHrzNlsm8S+A/AuLY2kQLzfPGDJl7a4/F3A6FmvEul kByIz41Rw460euta3a8d9P/W3isykL/Gu9mJGhpi0TE04S4A4fYEuMRL3oX8onHZ99 ZALHhLjG8v1ew== From: Conor Dooley To: netdev@vger.kernel.org Cc: conor@kernel.org, Conor Dooley , Valentina.FernandezAlanis@microchip.com, Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Daire McNamara , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Nicolas Ferre , Claudiu Beznea , Richard Cochran , Samuel Holland , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Neil Armstrong , Dave Stevenson , Sean Anderson , Vineeth Karumanchi , Abin Joseph Subject: [RFC net-next v1 7/7] net: macb: add mpfs specific usrio configuration Date: Thu, 20 Nov 2025 16:26:09 +0000 Message-ID: <20251120-unspoken-licking-5c9263746766@spud> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251120-jubilant-purposely-67ec45ce4e2f@spud> References: <20251120-jubilant-purposely-67ec45ce4e2f@spud> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2990; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=G93/q3yEc1yTjdzyW1V6PNGqUts7lOELWRE7rxMzpvM=; b=owGbwMvMwCVWscWwfUFT0iXG02pJDJnyjtK7S6/pLjiezpBr8WV9wQf+7r47SanNTzT8PGVWa 0tqL+brKGVhEONikBVTZEm83dcitf6Pyw7nnrcwc1iZQIYwcHEKwEQ+T2b4K5iq3y1x2dJuTlFo c8iavutfrm/+N1/V6I3ahnnP8md+TWL476iluaLKWCL5l4i+fVUT60MHFsPnszPvnfdyTRRc8P8 eNwA= X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Conor Dooley On mpfs the driver needs to make sure the tsu clock source is not the fabric, as this requires that the hardware is in Timer Adjust mode, which is not compatible with the linux driver trying to control the hardware AFAICT. Signed-off-by: Conor Dooley --- This may actually be a waste of time, since a) the peripheral is reset by the driver during probe which zeroes it, b) the timer-adjust mode is not permitted, so setting a 1 here is not ever done and c) the value written by the driver to the usrio register starts as zero, so would clear this bit anyway, were it to be set somehow. The alternative would be just setting the usrio struct pointer to NULL since none of the caps that would cause it to be accessed are set on this platform. --- drivers/net/ethernet/cadence/macb.h | 2 ++ drivers/net/ethernet/cadence/macb_main.c | 12 ++++++++++-- 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cad= ence/macb.h index 59881c48485b..d30682db410a 100644 --- a/drivers/net/ethernet/cadence/macb.h +++ b/drivers/net/ethernet/cadence/macb.h @@ -770,6 +770,7 @@ #define MACB_CAPS_QUEUE_DISABLE 0x00000800 #define MACB_CAPS_QBV 0x00001000 #define MACB_CAPS_USRIO_HAS_MII 0x00002000 +#define MACB_CAPS_USRIO_TSUCLK_SOURCE 0x00004000 #define MACB_CAPS_PCS 0x01000000 #define MACB_CAPS_HIGH_SPEED 0x02000000 #define MACB_CAPS_CLK_HW_CHG 0x04000000 @@ -1217,6 +1218,7 @@ struct macb_usrio_config { u32 rgmii; u32 refclk; u32 hdfctlen; + u32 tsu_source; }; =20 struct macb_config { diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/etherne= t/cadence/macb_main.c index 4ad1409dab63..dd14bb4c9e26 100644 --- a/drivers/net/ethernet/cadence/macb_main.c +++ b/drivers/net/ethernet/cadence/macb_main.c @@ -4649,6 +4649,9 @@ static int macb_init(struct platform_device *pdev) if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN) val |=3D bp->usrio->refclk; =20 + if (bp->caps & MACB_CAPS_USRIO_TSUCLK_SOURCE) + val |=3D bp->usrio->tsu_source; + macb_or_gem_writel(bp, USRIO, val); } =20 @@ -5219,6 +5222,10 @@ static const struct macb_usrio_config at91_default_u= srio =3D { .refclk =3D MACB_BIT(CLKEN), }; =20 +static const struct macb_usrio_config mpfs_usrio =3D { + .tsu_source =3D 0, +}; + static const struct macb_usrio_config sama7g5_usrio =3D { .mii =3D 0, .rmii =3D 1, @@ -5342,11 +5349,12 @@ static const struct macb_config zynq_config =3D { static const struct macb_config mpfs_config =3D { .caps =3D MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO | - MACB_CAPS_GEM_HAS_PTP, + MACB_CAPS_GEM_HAS_PTP | + MACB_CAPS_USRIO_TSUCLK_SOURCE, .dma_burst_length =3D 16, .clk_init =3D macb_clk_init, .init =3D init_reset_optional, - .usrio =3D &at91_default_usrio, + .usrio =3D &mpfs_usrio, .max_tx_length =3D 4040, /* Cadence Erratum 1686 */ .jumbo_max_len =3D 4040, }; --=20 2.51.0