From nobody Tue Dec 2 02:17:32 2025 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3E1A22BE03C for ; Fri, 21 Nov 2025 04:43:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763700233; cv=none; b=ezZBdPyURDw41fLorvmNrSbgcd0xHWpXzeGcoifiWhz6PCd2HDQ3bFbziCwApCnvpPjH8TrDoxJK+ucheAe/Ed9uieDYlK17QpWu/fojYkuSTnTN1k8LTKJx12HYJAextVwAetA34h+aGg2GwVNXboVbqA+D0yZB2VJuiW6pZmM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763700233; c=relaxed/simple; bh=3QdjZvYokFkYzksvR9JE/DnqxUC72qU9ux2zv/3+rSs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Y+ujE8vjfM/rZnabwvBmFh4mRq3VBMJi57+Mz5IC1hlFN0qH8P80bEvZPWfcDzphSq15R/9Oh9eiGAGMt5FTzfLLprXeaOprFIpJ1GUaLBkS89JsRNM+AwKuzLgfIhWVEjE6wShVKbTe65bwzQ2gfsGM5dSKAQdMM/3Pwx9519A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=fB0uXKKT; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=gYJLEkk+; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="fB0uXKKT"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="gYJLEkk+" Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 5AKKAoYh1718175 for ; Fri, 21 Nov 2025 04:43:47 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= IcXgK2n5jAG1mriGbPmsrkH1L/P4MAnAlREwQeeAink=; b=fB0uXKKTbLMQUR6l wELygVZOTuuLlsnIWchh38SKqfx/YbZraB6Fv0sKL83e03rPy442vIfRKTxVItrW ZqPsOTy1LVuNJZQuYXE/rXodLJjxC/w20JMnu2TdGhEDM4hcaYNRM/xESFHMAxbd juJ6dLVZVtotap9yMsz1HcNwAbCGbIMLf0oAzZShPoB0Vn/m800SPxuPUTgzkiE5 wPl/K/A9ytLmCvsfuXBmOZah2+NMZDS8K/Whsn67ocna6dflQxSVl8NJTt46RguH aKrC0SvzI2ykaOxbW1beRHmc+BDf+5GBNp5WXFUqQtKVoKXIa2c4yS+pkm0+n0gS Qpmgng== Received: from mail-oi1-f200.google.com (mail-oi1-f200.google.com [209.85.167.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ahxrnbh4v-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Fri, 21 Nov 2025 04:43:47 +0000 (GMT) Received: by mail-oi1-f200.google.com with SMTP id 5614622812f47-450be8a012cso2783853b6e.0 for ; Thu, 20 Nov 2025 20:43:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1763700226; x=1764305026; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=IcXgK2n5jAG1mriGbPmsrkH1L/P4MAnAlREwQeeAink=; b=gYJLEkk+UXV4vn/RNuLOzCCo6/QaYv3PBeso4i9mIrvHvYtmL1k5jOHmwgmBu/RsgQ UX5T+hvqZIt6EuTeQl5Wxq+kYZg28UjIxJFMaJ1hhYv/P4RRIrL/aWK5DoQtq/pGI9+x eIQQApYE8ucK7k2gXutgBR6ZVyJBBgm6GwhdRVe7PEVvbWqWPV7zRgOvHZGfYXUqawfh 52/NllgLEOdQ1rAOY116e/NC1lywEzuJFlp2afJxULFmpsP4KtnTWdkcCaJHsh9UcC+s WoMLTwa/JYMNI/4uo1+FFVFCjWZy4EzyUwosAZL6oslVtEfgRmG1ZBi7EVuvXZBoxlgU 5HYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1763700226; x=1764305026; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=IcXgK2n5jAG1mriGbPmsrkH1L/P4MAnAlREwQeeAink=; b=L5fdFPGdUVU/ugszgfG7NBAbKWwWmYahj9Jnp5a9mBIGyxVUPKVl+2ZaZAGo8zcr1n jRzJ3CVdLmLrWmMlTnWaNR+RVlcBf7J4Ub0X9WyLg6W2/CZh7zCCO7O+STx6WNyilR9k NtydDxBclx+f0svmqfyiNfbFZT/eWLyh0g5MmgzYEuK+8PPLO+l824TAgi4SOt9CqhCD AZpkptSmte+szRC1w+p8ctGgsmD1iDSEIFfuuOYGJ8cLCf3HREE/QbBv/xRqjv3qsXA4 VXp+m9QP4O+5YI/CVORRXsrmrJxOmClS0i3RqwGRydY1GlZF3ZyWC6XP1bWzXXNEptYM ekEg== X-Forwarded-Encrypted: i=1; AJvYcCUV/pNlXTE49/nGnHlNII8grAfSNwB4dkuDwCJN5DGq6jHVjH8td5V0Kv985Oirqqmcatkfu2ULQ0CbZvc=@vger.kernel.org X-Gm-Message-State: AOJu0YxoxzVkVwhrtisbUmk+PyAR4oK772if/vIKSU/q/Zti7gPdz59y WdczsBpvr2jePkanT923Q4ItfVOBH5X+z49igNVmy4M8IhHOYN/2i2ise8QTX6EVDwFlsVWL+mo 1iW6Sp8MzNRpSCEfBs+JFIdo+oEvICOdS+4OEYPeHvScGke2tDcaiSHqf2Xhax8+86f4= X-Gm-Gg: ASbGnct53J2/N1hZ2/S5SlgKa9C2XaOT+n7PVI9HNvkPsxHbz4ZM5WNPMgLrQjT/Uaa iEewWF1fFA2AIn7H5zfj9zHFa5/6pE5+jNTkRXKiYyGkFki2Eq8Ogftr4dLEwNj9UJHnQVD8hVZ s+biDf4lQRqmccGLzs+lCw2rp36/WAm39SAG2pia1UfViM1QERZBZ9sAjcMc5gjeJ6hDOqRfMpj sTEOMxqLWeex4LxVadbwC0FFEBPwKCJqzQ3m39/Ku74ViyM1Qkdu7k/w/w8YB5GG+G0th3I51ZM hXurifj4jl1uvYHRqcw0PNcMXmWrn7rUoISvEsOPXqMK6aqrIAt8+arK2Db2KfO5thMusB0ZtnU RiXIHPhwAWKqhjR0jEhchNsaLtKR0HExby6jsVrckU1cHv0akFUjUhp8AqCfo64Be X-Received: by 2002:a05:6808:4fec:b0:450:d693:4d1b with SMTP id 5614622812f47-45115a32f6bmr328890b6e.26.1763700226281; Thu, 20 Nov 2025 20:43:46 -0800 (PST) X-Google-Smtp-Source: AGHT+IE5xDv/j1gozr0rstq4O8NMpvM+Vp/dtqvslXpWF+00NhXGxfm7PBhjadcba4Wn80bdIebLAQ== X-Received: by 2002:a05:6808:4fec:b0:450:d693:4d1b with SMTP id 5614622812f47-45115a32f6bmr328880b6e.26.1763700225734; Thu, 20 Nov 2025 20:43:45 -0800 (PST) Received: from hu-hangxian-lv.qualcomm.com (Global_NAT1.qualcomm.com. [129.46.96.20]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-3ec9dc2185dsm2198927fac.13.2025.11.20.20.43.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Nov 2025 20:43:45 -0800 (PST) From: Hangxiang Ma Date: Thu, 20 Nov 2025 20:43:13 -0800 Subject: [PATCH v7 1/5] media: dt-bindings: Add CAMSS device for Kaanapali Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251120-add-support-for-camss-on-kaanapali-v7-1-de27f9a67ce6@oss.qualcomm.com> References: <20251120-add-support-for-camss-on-kaanapali-v7-0-de27f9a67ce6@oss.qualcomm.com> In-Reply-To: <20251120-add-support-for-camss-on-kaanapali-v7-0-de27f9a67ce6@oss.qualcomm.com> To: Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Todor Tomov , Vladimir Zapolskiy , Mauro Carvalho Chehab , Bryan O'Donoghue Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, aiqun.yu@oss.qualcomm.com, tingwei.zhang@oss.qualcomm.com, trilok.soni@oss.qualcomm.com, yijie.yang@oss.qualcomm.com, Jingyi Wang , Atiya Kailany , Hangxiang Ma , Krzysztof Kozlowski X-Mailer: b4 0.14.3 X-Proofpoint-ORIG-GUID: uf2brqOobUDE4yXUbfUv8PD4H4qseFhY X-Proofpoint-GUID: uf2brqOobUDE4yXUbfUv8PD4H4qseFhY X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTIxMDAzNCBTYWx0ZWRfX+LiBAvVRw3Qe BEliIjhz49gcJYa8rPs5MQxbRMVYuAcS9Vmrqlj4POLgh3Qf6467Bi83ZXCg2l4b6x8t3wEqq/o cDtLKRjy+kI0m+7VJ6Cdex+ytRUcPfIP/7kDge0VWG9aRT5OnVb0nAit06E5RS3tAYFDsOS/SQE Yf+lfbX86wnjKqiPeq2EHfPsH55oHIddSzxRjOagiFG6Y4DVyp61kB1rU2mSxsOSkXq5MzS4zNM MD+dxRQe2Vy5w5/cwjRGzKm5QYcS3xnWq1k/RarXvrjj20Ss7A+oTbjRwA8b9cB6eLVv+j6UJWt 78R3rpZ3EG19vMFj0PNp+R13kd4krQjv9VZRyA4ALd9ZCeDNfWyGSSzPmFXJYfujSYfaevxfSDt AjFVa5sXR/dDS2EFhu/wm6pDUznX/g== X-Authority-Analysis: v=2.4 cv=S6TUAYsP c=1 sm=1 tr=0 ts=691fee03 cx=c_pps a=AKZTfHrQPB8q3CcvmcIuDA==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=gEfo2CItAAAA:8 a=KKAkSRfTAAAA:8 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=78032wgmgAfrEkmTq9UA:9 a=QEXdDO2ut3YA:10 a=pF_qn-MSjDawc0seGVz6:22 a=sptkURWiP4Gy88Gu7hUp:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-21_02,2025-11-20_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 suspectscore=0 clxscore=1015 adultscore=0 spamscore=0 impostorscore=0 lowpriorityscore=0 bulkscore=0 phishscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511210034 Add the compatible string "qcom,kaanapali-camss" to support the Camera Subsystem (CAMSS) on the Qualcomm Kaanapali platform. The Kaanapali platform provides: - 3 x VFE, 5 RDI per VFE - 2 x VFE Lite, 4 RDI per VFE Lite - 3 x CSID - 2 x CSID Lite - 6 x CSIPHY Reviewed-by: Bryan O'Donoghue Reviewed-by: Krzysztof Kozlowski Signed-off-by: Hangxiang Ma --- .../bindings/media/qcom,kaanapali-camss.yaml | 647 +++++++++++++++++= ++++ 1 file changed, 647 insertions(+) diff --git a/Documentation/devicetree/bindings/media/qcom,kaanapali-camss.y= aml b/Documentation/devicetree/bindings/media/qcom,kaanapali-camss.yaml new file mode 100644 index 000000000000..094287c01a79 --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,kaanapali-camss.yaml @@ -0,0 +1,647 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,kaanapali-camss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Kaanapali Camera Subsystem (CAMSS) + +maintainers: + - Hangxiang Ma + +description: + This binding describes the camera subsystem hardware found on Kaanapali + Qualcomm SoCs. It includes submodules such as CSIPHY (CSI Physical layer) + and CSID (CSI Decoder), which comply with the MIPI CSI2 protocol. + + The subsystem also integrates a set of real-time image processing engines + and their associated configuration modules, as well as non-real-time eng= ines. + + Additionally, it encompasses a test pattern generator (TPG) submodule. + +properties: + compatible: + const: qcom,kaanapali-camss + + reg: + items: + - description: Registers for CSID 0 + - description: Registers for CSID 1 + - description: Registers for CSID 2 + - description: Registers for CSID Lite 0 + - description: Registers for CSID Lite 1 + - description: Registers for CSIPHY 0 + - description: Registers for CSIPHY 1 + - description: Registers for CSIPHY 2 + - description: Registers for CSIPHY 3 + - description: Registers for CSIPHY 4 + - description: Registers for CSIPHY 5 + - description: Registers for VFE (Video Front End) 0 + - description: Registers for VFE 1 + - description: Registers for VFE 2 + - description: Registers for VFE Lite 0 + - description: Registers for VFE Lite 1 + - description: Registers for ICP (Imaging Control Processor) 0 + - description: Registers for ICP 0 SYS + - description: Registers for ICP 1 + - description: Registers for ICP 1 SYS + - description: Registers for IPE (Image Processing Engine) + - description: Registers for JPEG DMA & Downscaler + - description: Registers for JPEG Encoder + - description: Registers for OFE (Offline Front End) + - description: Registers for RT CDM (Camera Data Mover) 0 + - description: Registers for RT CDM 1 + - description: Registers for RT CDM 2 + - description: Registers for RT CDM 3 + - description: Registers for RT CDM 4 + - description: Registers for TPG 0 + - description: Registers for TPG 1 + - description: Registers for TPG 2 + + reg-names: + items: + - const: csid0 + - const: csid1 + - const: csid2 + - const: csid_lite0 + - const: csid_lite1 + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: csiphy3 + - const: csiphy4 + - const: csiphy5 + - const: vfe0 + - const: vfe1 + - const: vfe2 + - const: vfe_lite0 + - const: vfe_lite1 + - const: icp0 + - const: icp0_sys + - const: icp1 + - const: icp1_sys + - const: ipe + - const: jpeg_dma + - const: jpeg_enc + - const: ofe + - const: rt_cdm0 + - const: rt_cdm1 + - const: rt_cdm2 + - const: rt_cdm3 + - const: rt_cdm4 + - const: tpg0 + - const: tpg1 + - const: tpg2 + + clocks: + maxItems: 60 + + clock-names: + items: + - const: camnoc_nrt_axi + - const: camnoc_rt_axi + - const: camnoc_rt_vfe0 + - const: camnoc_rt_vfe1 + - const: camnoc_rt_vfe2 + - const: camnoc_rt_vfe_lite + - const: cam_top_ahb + - const: cam_top_fast_ahb + - const: csid + - const: csid_csiphy_rx + - const: csiphy0 + - const: csiphy0_timer + - const: csiphy1 + - const: csiphy1_timer + - const: csiphy2 + - const: csiphy2_timer + - const: csiphy3 + - const: csiphy3_timer + - const: csiphy4 + - const: csiphy4_timer + - const: csiphy5 + - const: csiphy5_timer + - const: gcc_hf_axi + - const: vfe0 + - const: vfe0_fast_ahb + - const: vfe1 + - const: vfe1_fast_ahb + - const: vfe2 + - const: vfe2_fast_ahb + - const: vfe_lite + - const: vfe_lite_ahb + - const: vfe_lite_cphy_rx + - const: vfe_lite_csid + - const: qdss_debug_xo + - const: camnoc_ipe_nps + - const: camnoc_ofe + - const: gcc_sf_axi + - const: icp0 + - const: icp0_ahb + - const: icp1 + - const: icp1_ahb + - const: ipe_nps + - const: ipe_nps_ahb + - const: ipe_nps_fast_ahb + - const: ipe_pps + - const: ipe_pps_fast_ahb + - const: jpeg + - const: ofe_ahb + - const: ofe_anchor + - const: ofe_anchor_fast_ahb + - const: ofe_hdr + - const: ofe_hdr_fast_ahb + - const: ofe_main + - const: ofe_main_fast_ahb + - const: vfe0_bayer + - const: vfe0_bayer_fast_ahb + - const: vfe1_bayer + - const: vfe1_bayer_fast_ahb + - const: vfe2_bayer + - const: vfe2_bayer_fast_ahb + + interrupts: + maxItems: 30 + + interrupt-names: + items: + - const: csid0 + - const: csid1 + - const: csid2 + - const: csid_lite0 + - const: csid_lite1 + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: csiphy3 + - const: csiphy4 + - const: csiphy5 + - const: vfe0 + - const: vfe1 + - const: vfe2 + - const: vfe_lite0 + - const: vfe_lite1 + - const: camnoc_nrt + - const: camnoc_rt + - const: icp0 + - const: icp1 + - const: jpeg_dma + - const: jpeg_enc + - const: rt_cdm0 + - const: rt_cdm1 + - const: rt_cdm2 + - const: rt_cdm3 + - const: rt_cdm4 + - const: tpg0 + - const: tpg1 + - const: tpg2 + + interconnects: + maxItems: 4 + + interconnect-names: + items: + - const: ahb + - const: hf_mnoc + - const: sf_icp_mnoc + - const: sf_mnoc + + iommus: + items: + - description: VFE non-protected stream + - description: ICP0 shared stream + - description: ICP1 shared stream + - description: IPE CDM non-protected stream + - description: IPE non-protected stream + - description: JPEG non-protected stream + - description: OFE CDM non-protected stream + - description: OFE non-protected stream + - description: VFE / VFE Lite CDM non-protected stream + + power-domains: + items: + - description: + VFE0 GDSC - Global Distributed Switch Controller for VFE0. + - description: + VFE1 GDSC - Global Distributed Switch Controller for VFE1. + - description: + VFE2 GDSC - Global Distributed Switch Controller for VFE2. + - description: + Titan GDSC - Global Distributed Switch Controller for the entire= camss. + - description: + IPE GDSC - Global Distributed Switch Controller for IPE. + - description: + OFE GDSC - Block Global Distributed Switch Controller for OFE. + + power-domain-names: + items: + - const: vfe0 + - const: vfe1 + - const: vfe2 + - const: top + - const: ipe + - const: ofe + + vdd-csiphy0-0p8-supply: + description: + Phandle to a 0.8V regulator supply to CSIPHY0 core block. + + vdd-csiphy0-1p2-supply: + description: + Phandle to a 1.2V regulator supply to CSIPHY0 pll block. + + vdd-csiphy1-0p8-supply: + description: + Phandle to a 0.8V regulator supply to CSIPHY1 core block. + + vdd-csiphy1-1p2-supply: + description: + Phandle to a 1.2V regulator supply to CSIPHY1 pll block. + + vdd-csiphy2-0p8-supply: + description: + Phandle to a 0.8V regulator supply to CSIPHY2 core block. + + vdd-csiphy2-1p2-supply: + description: + Phandle to a 1.2V regulator supply to CSIPHY2 pll block. + + vdd-csiphy3-0p8-supply: + description: + Phandle to a 0.8V regulator supply to CSIPHY3 core block. + + vdd-csiphy3-1p2-supply: + description: + Phandle to a 1.2V regulator supply to CSIPHY3 pll block. + + vdd-csiphy4-0p8-supply: + description: + Phandle to a 0.8V regulator supply to CSIPHY4 core block. + + vdd-csiphy4-1p2-supply: + description: + Phandle to a 1.2V regulator supply to CSIPHY4 pll block. + + vdd-csiphy5-0p8-supply: + description: + Phandle to a 0.8V regulator supply to CSIPHY5 core block. + + vdd-csiphy5-1p2-supply: + description: + Phandle to a 1.2V regulator supply to CSIPHY5 pll block. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + description: + CSI input ports. + +patternProperties: + "^port@[0-5]$": + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input ports for receiving CSI data on CSIPHY 0-5. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - data-lanes + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - interrupts + - interrupt-names + - interconnects + - interconnect-names + - iommus + - power-domains + - power-domain-names + +additionalProperties: false + +examples: + - | + #include + #include + #include + + soc { + #address-cells =3D <2>; + #size-cells =3D <2>; + + isp@9253000 { + compatible =3D "qcom,kaanapali-camss"; + + reg =3D <0x0 0x09253000 0x0 0x5e80>, + <0x0 0x09263000 0x0 0x5e80>, + <0x0 0x09273000 0x0 0x5e80>, + <0x0 0x092d3000 0x0 0x3880>, + <0x0 0x092e7000 0x0 0x3880>, + <0x0 0x09523000 0x0 0x2000>, + <0x0 0x09525000 0x0 0x2000>, + <0x0 0x09527000 0x0 0x2000>, + <0x0 0x09529000 0x0 0x2000>, + <0x0 0x0952b000 0x0 0x2000>, + <0x0 0x0952d000 0x0 0x2000>, + <0x0 0x09151000 0x0 0x20000>, + <0x0 0x09171000 0x0 0x20000>, + <0x0 0x09191000 0x0 0x20000>, + <0x0 0x092dc000 0x0 0x1300>, + <0x0 0x092f0000 0x0 0x1300>, + <0x0 0x0900e000 0x0 0x1000>, + <0x0 0x0900d000 0x0 0x1000>, + <0x0 0x0902e000 0x0 0x1000>, + <0x0 0x0902d000 0x0 0x1000>, + <0x0 0x090d7000 0x0 0x20000>, + <0x0 0x0904e000 0x0 0x1000>, + <0x0 0x0904d000 0x0 0x1000>, + <0x0 0x09057000 0x0 0x40000>, + <0x0 0x09147000 0x0 0x580>, + <0x0 0x09148000 0x0 0x580>, + <0x0 0x09149000 0x0 0x580>, + <0x0 0x0914a000 0x0 0x580>, + <0x0 0x0914b000 0x0 0x580>, + <0x0 0x093fd000 0x0 0x400>, + <0x0 0x093fe000 0x0 0x400>, + <0x0 0x093ff000 0x0 0x400>; + reg-names =3D "csid0", + "csid1", + "csid2", + "csid_lite0", + "csid_lite1", + "csiphy0", + "csiphy1", + "csiphy2", + "csiphy3", + "csiphy4", + "csiphy5", + "vfe0", + "vfe1", + "vfe2", + "vfe_lite0", + "vfe_lite1", + "icp0", + "icp0_sys", + "icp1", + "icp1_sys", + "ipe", + "jpeg_dma", + "jpeg_enc", + "ofe", + "rt_cdm0", + "rt_cdm1", + "rt_cdm2", + "rt_cdm3", + "rt_cdm4", + "tpg0", + "tpg1", + "tpg2"; + + clocks =3D <&camcc_cam_cc_camnoc_nrt_axi_clk>, + <&camcc_cam_cc_camnoc_rt_axi_clk>, + <&camcc_cam_cc_camnoc_rt_vfe_0_main_clk>, + <&camcc_cam_cc_camnoc_rt_vfe_1_main_clk>, + <&camcc_cam_cc_camnoc_rt_vfe_2_main_clk>, + <&camcc_cam_cc_camnoc_rt_vfe_lite_clk>, + <&camcc_cam_cc_cam_top_ahb_clk>, + <&camcc_cam_cc_cam_top_fast_ahb_clk>, + <&camcc_cam_cc_csid_clk>, + <&camcc_cam_cc_csid_csiphy_rx_clk>, + <&camcc_cam_cc_csiphy0_clk>, + <&camcc_cam_cc_csi0phytimer_clk>, + <&camcc_cam_cc_csiphy1_clk>, + <&camcc_cam_cc_csi1phytimer_clk>, + <&camcc_cam_cc_csiphy2_clk>, + <&camcc_cam_cc_csi2phytimer_clk>, + <&camcc_cam_cc_csiphy3_clk>, + <&camcc_cam_cc_csi3phytimer_clk>, + <&camcc_cam_cc_csiphy4_clk>, + <&camcc_cam_cc_csi4phytimer_clk>, + <&camcc_cam_cc_csiphy5_clk>, + <&camcc_cam_cc_csi5phytimer_clk>, + <&gcc_gcc_camera_hf_axi_clk>, + <&camcc_cam_cc_vfe_0_main_clk>, + <&camcc_cam_cc_vfe_0_main_fast_ahb_clk>, + <&camcc_cam_cc_vfe_1_main_clk>, + <&camcc_cam_cc_vfe_1_main_fast_ahb_clk>, + <&camcc_cam_cc_vfe_2_main_clk>, + <&camcc_cam_cc_vfe_2_main_fast_ahb_clk>, + <&camcc_cam_cc_vfe_lite_clk>, + <&camcc_cam_cc_vfe_lite_ahb_clk>, + <&camcc_cam_cc_vfe_lite_cphy_rx_clk>, + <&camcc_cam_cc_vfe_lite_csid_clk>, + <&camcc_cam_cc_qdss_debug_xo_clk>, + <&camcc_cam_cc_camnoc_nrt_ipe_nps_clk>, + <&camcc_cam_cc_camnoc_nrt_ofe_main_clk>, + <&gcc_gcc_camera_sf_axi_clk>, + <&camcc_cam_cc_icp_0_clk>, + <&camcc_cam_cc_icp_0_ahb_clk>, + <&camcc_cam_cc_icp_1_clk>, + <&camcc_cam_cc_icp_1_ahb_clk>, + <&camcc_cam_cc_ipe_nps_clk>, + <&camcc_cam_cc_ipe_nps_ahb_clk>, + <&camcc_cam_cc_ipe_nps_fast_ahb_clk>, + <&camcc_cam_cc_ipe_pps_clk>, + <&camcc_cam_cc_ipe_pps_fast_ahb_clk>, + <&camcc_cam_cc_jpeg_clk>, + <&camcc_cam_cc_ofe_ahb_clk>, + <&camcc_cam_cc_ofe_anchor_clk>, + <&camcc_cam_cc_ofe_anchor_fast_ahb_clk>, + <&camcc_cam_cc_ofe_hdr_clk>, + <&camcc_cam_cc_ofe_hdr_fast_ahb_clk>, + <&camcc_cam_cc_ofe_main_clk>, + <&camcc_cam_cc_ofe_main_fast_ahb_clk>, + <&camcc_cam_cc_vfe_0_bayer_clk>, + <&camcc_cam_cc_vfe_0_bayer_fast_ahb_clk>, + <&camcc_cam_cc_vfe_1_bayer_clk>, + <&camcc_cam_cc_vfe_1_bayer_fast_ahb_clk>, + <&camcc_cam_cc_vfe_2_bayer_clk>, + <&camcc_cam_cc_vfe_2_bayer_fast_ahb_clk>; + clock-names =3D "camnoc_nrt_axi", + "camnoc_rt_axi", + "camnoc_rt_vfe0", + "camnoc_rt_vfe1", + "camnoc_rt_vfe2", + "camnoc_rt_vfe_lite", + "cam_top_ahb", + "cam_top_fast_ahb", + "csid", + "csid_csiphy_rx", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "csiphy3", + "csiphy3_timer", + "csiphy4", + "csiphy4_timer", + "csiphy5", + "csiphy5_timer", + "gcc_hf_axi", + "vfe0", + "vfe0_fast_ahb", + "vfe1", + "vfe1_fast_ahb", + "vfe2", + "vfe2_fast_ahb", + "vfe_lite", + "vfe_lite_ahb", + "vfe_lite_cphy_rx", + "vfe_lite_csid", + "qdss_debug_xo", + "camnoc_ipe_nps", + "camnoc_ofe", + "gcc_sf_axi", + "icp0", + "icp0_ahb", + "icp1", + "icp1_ahb", + "ipe_nps", + "ipe_nps_ahb", + "ipe_nps_fast_ahb", + "ipe_pps", + "ipe_pps_fast_ahb", + "jpeg", + "ofe_ahb", + "ofe_anchor", + "ofe_anchor_fast_ahb", + "ofe_hdr", + "ofe_hdr_fast_ahb", + "ofe_main", + "ofe_main_fast_ahb", + "vfe0_bayer", + "vfe0_bayer_fast_ahb", + "vfe1_bayer", + "vfe1_bayer_fast_ahb", + "vfe2_bayer", + "vfe2_bayer_fast_ahb"; + + interrupts =3D , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names =3D "csid0", + "csid1", + "csid2", + "csid_lite0", + "csid_lite1", + "csiphy0", + "csiphy1", + "csiphy2", + "csiphy3", + "csiphy4", + "csiphy5", + "vfe0", + "vfe1", + "vfe2", + "vfe_lite0", + "vfe_lite1", + "camnoc_nrt", + "camnoc_rt", + "icp0", + "icp1", + "jpeg_dma", + "jpeg_enc", + "rt_cdm0", + "rt_cdm1", + "rt_cdm2", + "rt_cdm3", + "rt_cdm4", + "tpg0", + "tpg1", + "tpg2"; + + interconnects =3D <&gem_noc_master_appss_proc QCOM_ICC_TAG_ACT= IVE_ONLY + &config_noc_slave_camera_cfg QCOM_ICC_TAG_ACT= IVE_ONLY>, + <&mmss_noc_master_camnoc_hf QCOM_ICC_TAG_ALWAYS + &mc_virt_slave_ebi1 QCOM_ICC_TAG_ALWAYS>, + <&mmss_noc_master_camnoc_sf_icp QCOM_ICC_TAG_A= LWAYS + &mc_virt_slave_ebi1 QCOM_ICC_TAG_ALWAYS>, + <&mmss_noc_master_camnoc_sf QCOM_ICC_TAG_ALWAYS + &mc_virt_slave_ebi1 QCOM_ICC_TAG_ALWAYS>; + interconnect-names =3D "ahb", + "hf_mnoc", + "sf_icp_mnoc", + "sf_mnoc"; + + iommus =3D <&apps_smmu 0x1c00 0x00>, + <&apps_smmu 0x18c0 0x00>, + <&apps_smmu 0x1980 0x00>, + <&apps_smmu 0x1840 0x00>, + <&apps_smmu 0x1800 0x00>, + <&apps_smmu 0x18a0 0x00>, + <&apps_smmu 0x1880 0x00>, + <&apps_smmu 0x1820 0x00>, + <&apps_smmu 0x1860 0x00>; + + power-domains =3D <&camcc_cam_cc_vfe_0_gdsc>, + <&camcc_cam_cc_vfe_1_gdsc>, + <&camcc_cam_cc_vfe_2_gdsc>, + <&camcc_cam_cc_titan_top_gdsc>, + <&camcc_cam_cc_ipe_gdsc>, + <&camcc_cam_cc_ofe_gdsc>; + power-domain-names =3D "vfe0", + "vfe1", + "vfe2", + "top", + "ipe", + "ofe"; + + vdd-csiphy0-0p8-supply =3D <&vreg_0p8_supply>; + vdd-csiphy0-1p2-supply =3D <&vreg_1p2_supply>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + csiphy_ep0: endpoint { + data-lanes =3D <0 1>; + remote-endpoint =3D <&sensor_ep>; + }; + }; + }; + }; + }; --=20 2.34.1