From nobody Tue Dec 2 02:32:04 2025 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5D1D334104B; Wed, 19 Nov 2025 16:15:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763568928; cv=none; b=GHPGY7OaOs3FDdIUltB5UynDBTUUTtocqHqkzuQ5tNbq3jE/NRSccjxE7xJ+ddB7LHp9LeOG9XV3CkaZ78tn051MNjh4TL7xTRCwGboeFPP16S+sLSP8srxDBVj5sRlCVfkZmSwxzU2Mm7Veg+2VZJem7J12Qhz/f/tB1pDzOQ0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763568928; c=relaxed/simple; bh=uncqpIya2APXQ0kbchnR/WkYAHzlwEoOEhPzkJcf7f0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Uib7wdxjw9/DHwtVAB+vBN6HYOg1jdZwUL3o0dV5taISkSqD4p4IvnWzThLhYclrwB6xSe/2kNcfbIvWekz6SDPRJB75tJi4JDjFZhPS9LIJKgx4ti9jyCJ5NgIYK304Szpt62lGC93AIkAZfUS2IzUL6Wed/FfNBHj5iylZFOw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: xJ+hEUCMTMqQTIYODITZIw== X-CSE-MsgGUID: gsbP4jENRoy1IAX3O2VTSw== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 20 Nov 2025 01:15:25 +0900 Received: from demon-pc.localdomain (unknown [10.226.92.87]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 15FC4406C476; Thu, 20 Nov 2025 01:15:20 +0900 (JST) From: Cosmin Tanislav To: Fabrizio Castro , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Philipp Zabel Cc: linux-spi@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Cosmin Tanislav Subject: [PATCH v4 01/13] spi: rzv2h-rspi: make resets optional Date: Wed, 19 Nov 2025 18:14:22 +0200 Message-ID: <20251119161434.595677-2-cosmin-gabriel.tanislav.xa@renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251119161434.595677-1-cosmin-gabriel.tanislav.xa@renesas.com> References: <20251119161434.595677-1-cosmin-gabriel.tanislav.xa@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs don't have reset lines for the SPI peripheral, make them optional to prepare for adding support for them. Signed-off-by: Cosmin Tanislav --- V4: * no changes V3: * no changes V2: * no changes drivers/spi/spi-rzv2h-rspi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-rzv2h-rspi.c b/drivers/spi/spi-rzv2h-rspi.c index dcc431ba60a9..09b9362e9b1f 100644 --- a/drivers/spi/spi-rzv2h-rspi.c +++ b/drivers/spi/spi-rzv2h-rspi.c @@ -384,8 +384,8 @@ static int rzv2h_rspi_probe(struct platform_device *pde= v) =20 rspi->resets[0].id =3D "presetn"; rspi->resets[1].id =3D "tresetn"; - ret =3D devm_reset_control_bulk_get_exclusive(dev, RSPI_RESET_NUM, - rspi->resets); + ret =3D devm_reset_control_bulk_get_optional_exclusive(dev, RSPI_RESET_NU= M, + rspi->resets); if (ret) return dev_err_probe(dev, ret, "cannot get resets\n"); =20 --=20 2.52.0