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Wed, 19 Nov 2025 14:19:20 -0800 (PST) Received: from [172.16.1.8] ([2607:f2c0:b141:ac00:ca1:dc8c:d6d0:7e87]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-8846e447304sm4426866d6.4.2025.11.19.14.19.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Nov 2025 14:19:19 -0800 (PST) From: Peter Colberg Date: Wed, 19 Nov 2025 17:19:07 -0500 Subject: [PATCH 3/8] rust: pci: add {enable,disable}_sriov(), to control SR-IOV capability Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251119-rust-pci-sriov-v1-3-883a94599a97@redhat.com> References: <20251119-rust-pci-sriov-v1-0-883a94599a97@redhat.com> In-Reply-To: <20251119-rust-pci-sriov-v1-0-883a94599a97@redhat.com> To: Danilo Krummrich , Bjorn Helgaas , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , Abdiel Janulgue , Daniel Almeida , Robin Murphy , Greg Kroah-Hartman , Dave Ertman , Ira Weiny , Leon Romanovsky Cc: linux-pci@vger.kernel.org, rust-for-linux@vger.kernel.org, linux-kernel@vger.kernel.org, Alexandre Courbot , Alistair Popple , Joel Fernandes , John Hubbard , Zhi Wang , Peter Colberg , Jason Gunthorpe X-Mailer: b4 0.14.2 Add methods to enable and disable the Single Root I/O Virtualization (SR-IOV) capability for a PCI device. The wrapped C methods take care of validating whether the device is a Physical Function (PF), whether SR-IOV is currently disabled (or enabled), and whether the number of requested VFs does not exceed the total number of supported VFs. Suggested-by: Danilo Krummrich Signed-off-by: Peter Colberg --- rust/kernel/pci.rs | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/rust/kernel/pci.rs b/rust/kernel/pci.rs index 814990d386708fe2ac652ccaa674c10a6cf390cb..556a01ed9bc3b1300a3340a3d23= 83e08ceacbfe5 100644 --- a/rust/kernel/pci.rs +++ b/rust/kernel/pci.rs @@ -454,6 +454,36 @@ pub fn set_master(&self) { // SAFETY: `self.as_raw` is guaranteed to be a pointer to a valid = `struct pci_dev`. unsafe { bindings::pci_set_master(self.as_raw()) }; } + + /// Enable the Single Root I/O Virtualization (SR-IOV) capability for = this device, + /// where `nr_virtfn` is number of Virtual Functions (VF) to enable. + #[cfg(CONFIG_PCI_IOV)] + pub fn enable_sriov(&self, nr_virtfn: i32) -> Result { + // SAFETY: + // `self.as_raw` returns a valid pointer to a `struct pci_dev`. + // + // `pci_enable_sriov()` checks that the enable operation is valid: + // - the device is a Physical Function (PF), + // - SR-IOV is currently disabled, and + // - `nr_virtfn` does not exceed the total number of supported VFs. + let ret =3D unsafe { bindings::pci_enable_sriov(self.as_raw(), nr_= virtfn) }; + if ret !=3D 0 { + return Err(crate::error::Error::from_errno(ret)); + } + Ok(()) + } + + /// Disable the Single Root I/O Virtualization (SR-IOV) capability for= this device. + #[cfg(CONFIG_PCI_IOV)] + pub fn disable_sriov(&self) { + // SAFETY: + // `self.as_raw` returns a valid pointer to a `struct pci_dev`. + // + // `pci_disable_sriov()` checks that the disable operation is vali= d: + // - the device is a Physical Function (PF), and + // - SR-IOV is currently enabled. + unsafe { bindings::pci_disable_sriov(self.as_raw()) }; + } } =20 // SAFETY: `pci::Device` is a transparent wrapper of `struct pci_dev`. --=20 2.51.1