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Wed, 19 Nov 2025 10:10:27 -0800 (PST) Received: from [192.168.1.102] ([120.56.197.63]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-29b5b111016sm1408865ad.6.2025.11.19.10.10.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Nov 2025 10:10:27 -0800 (PST) From: Manivannan Sadhasivam Date: Wed, 19 Nov 2025 23:40:08 +0530 Subject: [PATCH 2/2] PCI: dwc: Do not return failure from dw_pcie_wait_for_link() if link is in Detect/Poll state Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251119-pci-dwc-suspend-rework-v1-2-aad104828562@oss.qualcomm.com> References: <20251119-pci-dwc-suspend-rework-v1-0-aad104828562@oss.qualcomm.com> In-Reply-To: <20251119-pci-dwc-suspend-rework-v1-0-aad104828562@oss.qualcomm.com> To: Jingoo Han , Manivannan Sadhasivam , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, vincent.guittot@linaro.org, zhangsenchuan@eswincomputing.com, Manivannan Sadhasivam X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; 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But if there was no device connected to the bus, then the link up failure would be expected. In that case, the callers might want to skip the failure in a hope that the link will be up later when a device gets connected. One of the callers, dw_pcie_host_init() is currently skipping the failure irrespective of the link state, in an assumption that the link may come up later. But this assumption is wrong, since LTSSM states other than Detect and Poll during link training phase are considered to be fatal and the link needs to be retrained. So to avoid callers making wrong assumptions, skip returning failure from dw_pcie_wait_for_link() if the link is in Detect or Poll state after timeout and also check the return value of the API in dw_pcie_host_init(). Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-designware-host.c | 8 +++++--- drivers/pci/controller/dwc/pcie-designware.c | 8 ++++++++ 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pc= i/controller/dwc/pcie-designware-host.c index 8fe3454f3b13..8c4845fd24aa 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -671,9 +671,11 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp) * If there is no Link Up IRQ, we should not bypass the delay * because that would require users to manually rescan for devices. */ - if (!pp->use_linkup_irq) - /* Ignore errors, the link may come up later */ - dw_pcie_wait_for_link(pci); + if (!pp->use_linkup_irq) { + ret =3D dw_pcie_wait_for_link(pci); + if (ret) + goto err_stop_link; + } =20 ret =3D pci_host_probe(bridge); if (ret) diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/con= troller/dwc/pcie-designware.c index c644216995f6..fe13c6b10ccb 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -651,6 +651,14 @@ int dw_pcie_wait_for_link(struct dw_pcie *pci) } =20 if (retries >=3D PCIE_LINK_WAIT_MAX_RETRIES) { + /* + * If the link is in Detect or Poll state, it indicates that no + * device is connected. So return success to allow the device to + * show up later. + */ + if (dw_pcie_get_ltssm(pci) <=3D DW_PCIE_LTSSM_DETECT_WAIT) + return 0; + dev_info(pci->dev, "Phy link never came up\n"); return -ETIMEDOUT; } --=20 2.48.1