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charset="utf-8" Generalize the MDIO buses for accessing memory-mapped XPCS devices (through direct or indirect I/O) to also cover the case where the CSR is behind an SPI bus. This is the case when accessing the embedded XPCS from the NXP SJA1105/SJA1110 DSA switches. Cc: Serge Semin Signed-off-by: Vladimir Oltean --- drivers/net/pcs/pcs-xpcs-plat.c | 142 +++++++++++++++++++++----------- 1 file changed, 95 insertions(+), 47 deletions(-) diff --git a/drivers/net/pcs/pcs-xpcs-plat.c b/drivers/net/pcs/pcs-xpcs-pla= t.c index c422e8d8b89f..ea6482aa8431 100644 --- a/drivers/net/pcs/pcs-xpcs-plat.c +++ b/drivers/net/pcs/pcs-xpcs-plat.c @@ -17,6 +17,7 @@ #include #include #include +#include #include =20 #include "pcs-xpcs.h" @@ -29,7 +30,8 @@ struct dw_xpcs_plat { struct mii_bus *bus; bool reg_indir; int reg_width; - void __iomem *reg_base; + unsigned int base; + struct regmap *regmap; struct clk *cclk; }; =20 @@ -52,7 +54,9 @@ static int xpcs_mmio_read_reg_indirect(struct dw_xpcs_pla= t *pxpcs, int dev, int reg) { ptrdiff_t csr, ofs; + unsigned int addr; u16 page; + u32 val; int ret; =20 csr =3D xpcs_mmio_addr_format(dev, reg); @@ -63,19 +67,21 @@ static int xpcs_mmio_read_reg_indirect(struct dw_xpcs_p= lat *pxpcs, if (ret) return ret; =20 - switch (pxpcs->reg_width) { - case 4: - writel(page, pxpcs->reg_base + (DW_VR_CSR_VIEWPORT << 2)); - ret =3D readl(pxpcs->reg_base + (ofs << 2)) & 0xffff; - break; - default: - writew(page, pxpcs->reg_base + (DW_VR_CSR_VIEWPORT << 1)); - ret =3D readw(pxpcs->reg_base + (ofs << 1)); - break; - } + addr =3D pxpcs->base + (DW_VR_CSR_VIEWPORT * pxpcs->reg_width); + ret =3D regmap_write(pxpcs->regmap, addr, page); + if (ret) + goto err_put; + + addr =3D pxpcs->base + (ofs * pxpcs->reg_width); + ret =3D regmap_read(pxpcs->regmap, addr, &val); + if (ret) + goto err_put; =20 pm_runtime_put(&pxpcs->pdev->dev); + return val & 0xffff; =20 +err_put: + pm_runtime_put(&pxpcs->pdev->dev); return ret; } =20 @@ -83,6 +89,7 @@ static int xpcs_mmio_write_reg_indirect(struct dw_xpcs_pl= at *pxpcs, int dev, int reg, u16 val) { ptrdiff_t csr, ofs; + unsigned int addr; u16 page; int ret; =20 @@ -94,26 +101,25 @@ static int xpcs_mmio_write_reg_indirect(struct dw_xpcs= _plat *pxpcs, if (ret) return ret; =20 - switch (pxpcs->reg_width) { - case 4: - writel(page, pxpcs->reg_base + (DW_VR_CSR_VIEWPORT << 2)); - writel(val, pxpcs->reg_base + (ofs << 2)); - break; - default: - writew(page, pxpcs->reg_base + (DW_VR_CSR_VIEWPORT << 1)); - writew(val, pxpcs->reg_base + (ofs << 1)); - break; - } + addr =3D pxpcs->base + (DW_VR_CSR_VIEWPORT * pxpcs->reg_width); + ret =3D regmap_write(pxpcs->regmap, addr, page); + if (ret) + goto err_put; =20 - pm_runtime_put(&pxpcs->pdev->dev); + addr =3D pxpcs->base + (ofs * pxpcs->reg_width); + ret =3D regmap_write(pxpcs->regmap, addr, val); =20 - return 0; +err_put: + pm_runtime_put(&pxpcs->pdev->dev); + return ret; } =20 static int xpcs_mmio_read_reg_direct(struct dw_xpcs_plat *pxpcs, int dev, int reg) { + unsigned int addr; ptrdiff_t csr; + u32 val; int ret; =20 csr =3D xpcs_mmio_addr_format(dev, reg); @@ -122,23 +128,23 @@ static int xpcs_mmio_read_reg_direct(struct dw_xpcs_p= lat *pxpcs, if (ret) return ret; =20 - switch (pxpcs->reg_width) { - case 4: - ret =3D readl(pxpcs->reg_base + (csr << 2)) & 0xffff; - break; - default: - ret =3D readw(pxpcs->reg_base + (csr << 1)); - break; - } + addr =3D pxpcs->base + (csr * pxpcs->reg_width); + ret =3D regmap_read(pxpcs->regmap, addr, &val); + if (ret) + goto err_put; =20 pm_runtime_put(&pxpcs->pdev->dev); + return val & 0xffff; =20 +err_put: + pm_runtime_put(&pxpcs->pdev->dev); return ret; } =20 static int xpcs_mmio_write_reg_direct(struct dw_xpcs_plat *pxpcs, int dev, int reg, u16 val) { + unsigned int addr; ptrdiff_t csr; int ret; =20 @@ -148,18 +154,11 @@ static int xpcs_mmio_write_reg_direct(struct dw_xpcs_= plat *pxpcs, if (ret) return ret; =20 - switch (pxpcs->reg_width) { - case 4: - writel(val, pxpcs->reg_base + (csr << 2)); - break; - default: - writew(val, pxpcs->reg_base + (csr << 1)); - break; - } + addr =3D pxpcs->base + (csr * pxpcs->reg_width); + ret =3D regmap_write(pxpcs->regmap, addr, val); =20 pm_runtime_put(&pxpcs->pdev->dev); - - return 0; + return ret; } =20 static int xpcs_mmio_read_c22(struct mii_bus *bus, int addr, int reg) @@ -230,11 +229,48 @@ static struct dw_xpcs_plat *xpcs_plat_create_data(str= uct platform_device *pdev) return pxpcs; } =20 +static struct regmap *xpcs_plat_create_regmap(struct dw_xpcs_plat *pxpcs, + const struct resource *res) +{ + struct platform_device *pdev =3D pxpcs->pdev; + struct regmap_config config =3D {}; + struct device *dev =3D &pdev->dev; + void __iomem *reg_base; + + reg_base =3D devm_ioremap_resource(dev, res); + if (IS_ERR(reg_base)) { + dev_err(dev, "Failed to map reg-space\n"); + return ERR_CAST(reg_base); + } + + if (pxpcs->reg_width =3D=3D 2) { + config.reg_bits =3D 16; + config.val_bits =3D 16; + config.reg_stride =3D 2; + } else { + config.reg_bits =3D 32; + config.val_bits =3D 32; + config.reg_stride =3D 4; + } + + if (pxpcs->reg_indir) + config.max_register =3D 0xff * pxpcs->reg_width; + else + config.max_register =3D 0x1fffff * pxpcs->reg_width; + + config.reg_format_endian =3D REGMAP_ENDIAN_NATIVE; + config.val_format_endian =3D REGMAP_ENDIAN_NATIVE; + + return devm_regmap_init_mmio(dev, reg_base, &config); +} + static int xpcs_plat_init_res(struct dw_xpcs_plat *pxpcs) { struct platform_device *pdev =3D pxpcs->pdev; struct device *dev =3D &pdev->dev; + bool have_reg_resource =3D false; resource_size_t spc_size; + struct regmap *regmap; struct resource *res; =20 if (!device_property_read_u32(dev, "reg-io-width", &pxpcs->reg_width)) { @@ -246,8 +282,14 @@ static int xpcs_plat_init_res(struct dw_xpcs_plat *pxp= cs) pxpcs->reg_width =3D 2; } =20 - res =3D platform_get_resource_byname(pdev, IORESOURCE_MEM, "direct") ?: - platform_get_resource_byname(pdev, IORESOURCE_MEM, "indirect"); + res =3D platform_get_resource_byname(pdev, IORESOURCE_REG, "direct") ?: + platform_get_resource_byname(pdev, IORESOURCE_REG, "indirect"); + if (res) { + have_reg_resource =3D true; + } else { + res =3D platform_get_resource_byname(pdev, IORESOURCE_MEM, "direct") ?: + platform_get_resource_byname(pdev, IORESOURCE_MEM, "indirect"); + } if (!res) { dev_err(dev, "No reg-space found\n"); return -EINVAL; @@ -266,10 +308,16 @@ static int xpcs_plat_init_res(struct dw_xpcs_plat *px= pcs) return -EINVAL; } =20 - pxpcs->reg_base =3D devm_ioremap_resource(dev, res); - if (IS_ERR(pxpcs->reg_base)) { - dev_err(dev, "Failed to map reg-space\n"); - return PTR_ERR(pxpcs->reg_base); + if (have_reg_resource) { + regmap =3D dev_get_regmap(dev->parent, NULL); + pxpcs->base =3D res->start; + } else { + regmap =3D xpcs_plat_create_regmap(pxpcs, res); + } + pxpcs->regmap =3D regmap; + if (!pxpcs->regmap) { + dev_err(dev, "No regmap available\n"); + return -ENODEV; } =20 return 0; --=20 2.34.1