From nobody Tue Dec 2 02:43:37 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F25973502BD; Tue, 18 Nov 2025 11:30:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763465444; cv=none; b=UXnFfHei1DDYedb/kgAAhRWpihFSQxHx+0hXANGqvA7ZXGDypDDB4rJHcdevpDw+BySqfMCC66KdoyDza8w4s9K1AxNgzkurnqVV/Ehqnufy/NQSxSZYn7iDe+KflnTlxYT/4hqx1cFCUQPO5pkEUqyopEwHBBl8NRcbJpqjiVc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763465444; c=relaxed/simple; bh=8aOZFPFTflbkscTIWZBhClsCIM9o4GWwmg9TXIcb2zo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=RYQf1AKdmP2aYsOC7oE0iFK72H6hVmIXmQK5mkG/3aHvlcdBJDtISz1w+H8u0BGGc1fZa1pddXdOsspm5CIMgxFQZicQIip7tk1sYa0WnUjUHGpzE0sRY7unIg5lT+lGg1azmaT2ztKAt77QaCRFxYY1l3UZeqJrWH20n+/Is6I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=vF07eux9; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="vF07eux9" Received: by smtp.kernel.org (Postfix) with ESMTPS id E5FF4C2BCB3; Tue, 18 Nov 2025 11:30:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1763465443; bh=8aOZFPFTflbkscTIWZBhClsCIM9o4GWwmg9TXIcb2zo=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=vF07eux9XSkZyvK3eQT+j/eZXoJ7u7Fae4jVybT32sur0SIsn+LhDrO2AYebJKZ8u rxp+zwOivtzKfMCNL1h5Xb075mT00+liIrsM6XTT/sdXr/ZVPhuJGa5xVjLfe/b0ui wGci7/tRJV1yL4BON0vLJOyhK3Unht0XCXqr5USnfvYI3cxTgMyHv1ie7lHLAmME/5 ampT5RBFWb1oSuUB+xFBELQTahkxzdZ+RuACGt3bjJMdkho6Jl1YtN1S7994rxwFGy k33r9Lgl0HL1q3Lagn9iwZR6Gl/r/dmraK9suoTuX8W4uY1afNP5Ti0IvEcpIgK423 ejnqOoToAaHYA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id A1F39CED620; Tue, 18 Nov 2025 11:30:42 +0000 (UTC) From: David Heidelberg via B4 Relay Date: Tue, 18 Nov 2025 12:30:36 +0100 Subject: [PATCH v3 1/8] dt-bindings: arm: qcom: Add Pixel 3 and 3 XL Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251118-pixel-3-v3-1-317a2b400d8a@ixit.cz> References: <20251118-pixel-3-v3-0-317a2b400d8a@ixit.cz> In-Reply-To: <20251118-pixel-3-v3-0-317a2b400d8a@ixit.cz> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sumit Semwal , Casey Connolly , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: phodina@protonmail.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org, dri-devel@lists.freedesktop.org, David Heidelberg X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=716; i=david@ixit.cz; h=from:subject:message-id; bh=DlXm2VUp7Ijt8uTzaBaBxliSbXJ4DoxMqfa5a4LztB0=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBpHFjg6F+JThpLkjMmprBjtyfG75J8RRGnB/rUx kGMqVGVXCiJAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCaRxY4AAKCRBgAj/E00kg cpqHEACHSQC5WpfNbxcU5X0hYKyjt7Ul+jRuZeBhkzzz6XKwM4qYp+xE4v0ETdr3CZ8Z06hW/tn cwS75DfyP78LRQ8qAbiM8/3fmqpJ1yzuZZEjnSiSfCfwS5pCzT2a1ZoIJOKpxUeviavE5tVsmTO pI5U5sYc2qosloveYRFK3AzsQ4R/56nLBmNDmWYC3WBzY6jhi4Uaj2kC2B6RDuqTJ6UedZNH4KS AnZrFssyGnmNt+XYUKUM7V/tVDT3PwqfL0Py43jN1IEHIK4WDRa6sLNDKt5RyVPe+5XetpyshOe xNZ+Z0fewLYMvRBHp/j3tcT1xB7QARyV133q1kZoKY+29SKPQXEd9u1oW+aLDAXKfNvcx6L1r2B WLiGT0Qr9O4rxf/HOc0qg3tWtQo6m8l8JeYnyx133IQAyDb5Bj6fA1tEeWXG91OKBz6AuM6q4FE Bhd2YGrIlehIdH0Ot9R2mLwIOPYK64JzTKzKPu3pGRiH7pYKpZZ9T6rrQdAIyetpzOu6njtNXKO A3IhcOnDM4U3xwGes4nP45NIU4/8tyGX9ctKvmGS5QaHwiEFccmaOiXM8dhqiKa7cD+aK7V/ErR MY6jjpVcCzillKZmqMBc+Gd+giJGB12InEkPkmRyGDZiCKJl2yHphsRMvV/o2SeOigxGeHKxax3 i19bGPqfvX54HxQ== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg Document the bindings for the Pixel 3 and 3 XL. Signed-off-by: David Heidelberg Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/qcom.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentatio= n/devicetree/bindings/arm/qcom.yaml index d84bd3bca2010..760b6633b7a55 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -900,6 +900,8 @@ properties: =20 - items: - enum: + - google,blueline + - google,crosshatch - huawei,planck - lenovo,yoga-c630 - lg,judyln --=20 2.51.0 From nobody Tue Dec 2 02:43:37 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1CDC63570A6; Tue, 18 Nov 2025 11:30:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251118-pixel-3-v3-2-317a2b400d8a@ixit.cz> References: <20251118-pixel-3-v3-0-317a2b400d8a@ixit.cz> In-Reply-To: <20251118-pixel-3-v3-0-317a2b400d8a@ixit.cz> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sumit Semwal , Casey Connolly , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: phodina@protonmail.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org, dri-devel@lists.freedesktop.org, David Heidelberg X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=1609; i=david@ixit.cz; h=from:subject:message-id; bh=rtFg229e6XLKb3HRj7KZLISBROfCdBSLoe51Y4DeXU4=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBpHFjgXde2YPgCteVu+xuiR0bTzTZi44wHE/G+T TmtOdgJbVmJAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCaRxY4AAKCRBgAj/E00kg coVGD/48ND8fm7+63DnZhZkBaRJP80bZWosvdXkjNGgE7xG2gFtWYdrNfujStsizIpp4spuIYc9 NQZKWJWnOszF1jyKSki0nTDH7DpigT5Y9wL2M9zWwIOwSpZsud2gr6d6fvf5jlyxfas62KdKD4c czS/4tF1kvo0/lNOUAK4eUVSjEcZ/1Wx9SHhJeKeb0NxaWxZ6iXX7tAZPQhqgUui3pN7fZ8I8DF CokdETV/6P2z0kyd5Ei5AqVswOs/h3x9S2jd3GiXASmvjjfj46aJdUANf1lJ75mjgWYLzFDTd+Y zXEZZGe/jIZA4ETTaCgvimkDa+dl+1Rz3rwcuz0b1qDs55fXARBugmsLFtS2OsiRnouDos4jcg3 lDZNBCJhRNz0bH33g06cysNWPECKZmvTX0NdRwkFPnpHGbRERGDE5H5FFtLnS4ZF0fbLetRBI9y XSnFaonEpo5Gs4qOrDxjAjo5MIyBtpjqAVcs5svqGDEvQk7D/UM2Q/kBkcrRu2Ua0Aal5L9RXna 7mSUOUj/7OhLODFdtNLA8BgLdxoEeOjuSs3Y3r0ThnxW9+CrUeLH0q7JsVbFXy2YaS2bilVPi0R mycCqCcaG9jCUzxkvvQZnEsN3QliKbA4fBv43wVGs9JIPonDWtjDrKpof1apTjQH5ajTs245E7l 2U7Cv2K2XRIH5TA== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg Add compatible for used LG panel. SW43408 is not panel, but DDIC. The panel itself is the LG LH546WF1-ED01, so introduce combined compatible for it. Signed-off-by: David Heidelberg --- .../devicetree/bindings/display/panel/lg,sw43408.yaml | 11 +++++++= +--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/display/panel/lg,sw43408.yam= l b/Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml index 2219d3d4ac43b..bcf5efac6902c 100644 --- a/Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml +++ b/Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml @@ -4,14 +4,16 @@ $id: http://devicetree.org/schemas/display/panel/lg,sw43408.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# =20 -title: LG SW43408 1080x2160 DSI panel +title: LG SW43408 AMOLED DDIC =20 maintainers: - Casey Connolly =20 description: - This panel is used on the Pixel 3, it is a 60hz OLED panel which - required DSC (Display Stream Compression) and has rounded corners. + The SW43408 is display driver IC with connected panel. + + LG LH546WF1-ED01 panel is used on the Pixel 3, it is a 60hz OLED panel + which required DSC (Display Stream Compression) and has rounded corners. =20 allOf: - $ref: panel-common.yaml# @@ -19,6 +21,9 @@ allOf: properties: compatible: items: + - enum: + # LG 5.46 inch, 1080x2160 pixels, 18:9 ratio + - lg,sw43408-lh546wf1-ed01 - const: lg,sw43408 =20 reg: --=20 2.51.0 From nobody Tue Dec 2 02:43:37 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 47818355803; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251118-pixel-3-v3-3-317a2b400d8a@ixit.cz> References: <20251118-pixel-3-v3-0-317a2b400d8a@ixit.cz> In-Reply-To: <20251118-pixel-3-v3-0-317a2b400d8a@ixit.cz> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sumit Semwal , Casey Connolly , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: phodina@protonmail.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org, dri-devel@lists.freedesktop.org, David Heidelberg X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=1646; i=david@ixit.cz; h=from:subject:message-id; bh=zdnKJDIMeMRyO+SWDYgfxVtOGiWokm8aDgNXOD3aXMY=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBpHFjgWqFBlPThDTkfgTV3N4jMym0YwB4V2B+dW 6PDa8UbHRCJAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCaRxY4AAKCRBgAj/E00kg cqXbD/0RNQIrlcYy/v35U2jD3fu+nnPV67tqnJajTOoTXZLZ/mcaqg/MnDG95MkVC29lhXajD5D 6E+a28DGo0YtIlZpYxLq2AcrkcVO3zfbN4WLu2eRjjZ42sgE+kQtHOnL+kWX0FnNbf0ZVoiTMnY E6Mmn+A/2nBM4BL71ZzqWQZHmD2kt1DYLle17JQAcY3EQWN8Su2sNW6ctvuB5o0yOSnJmRY5uLl 3O5NIcdDlzk9N+h8ViMTlPLLv5zzcP8t+1ozTyocz/FiY9NjxG9PBTsuoiKUCd3hW+OKVaggGFW 5307ZvWd3yI+aQD5UY05hNgif72k38Vl8Sk/CfAQIPe0lXpTzWCJ6EC9frJxyeEhnuPefGFhX+9 d/SyJE0RWM6j+klvEnZvytF44qhCXufuuaXrVReAEu6ylOC3eoyeYI20fAyBoRJPLKXnOeGxrhU OPhkXgHmVzcW4PTmaW8p8f3EKF2jhtn6RCkJ4cMQ+R8f5T7NP3wr/dI3D01Fn2A+m3r39CexR0r Gj60/U3YiSsbQMKXdc0RSZZ3OYKqiRSe81BYwNX/0rIjrZqtXvAfYPVvppybagDEmeSXUP6Do9z JlXL7jks19LwWxzmmgWsLPshA3Bl7osN5AhEYCPnuGBYQI3fzVsRqWpYd8joqBj9uKeGAL5F4zS AC8geMn3XdtDJfg== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg The supported panel is LH546WF1-ED01, add compatible and adjust the struct name to reflect that. The standalone compatible lg,sw43408 will continue to work, even thou there are no users yet. Signed-off-by: David Heidelberg --- drivers/gpu/drm/panel/panel-lg-sw43408.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-lg-sw43408.c b/drivers/gpu/drm/pan= el/panel-lg-sw43408.c index 46a56ea92ad9f..bd55f6d8f2771 100644 --- a/drivers/gpu/drm/panel/panel-lg-sw43408.c +++ b/drivers/gpu/drm/panel/panel-lg-sw43408.c @@ -149,7 +149,7 @@ static int sw43408_prepare(struct drm_panel *panel) return ret; } =20 -static const struct drm_display_mode sw43408_mode =3D { +static const struct drm_display_mode lh546wf1_ed01_mode =3D { .clock =3D (1080 + 20 + 32 + 20) * (2160 + 20 + 4 + 20) * 60 / 1000, =20 .hdisplay =3D 1080, @@ -171,7 +171,7 @@ static const struct drm_display_mode sw43408_mode =3D { static int sw43408_get_modes(struct drm_panel *panel, struct drm_connector *connector) { - return drm_connector_helper_get_modes_fixed(connector, &sw43408_mode); + return drm_connector_helper_get_modes_fixed(connector, &lh546wf1_ed01_mod= e); } =20 static int sw43408_backlight_update_status(struct backlight_device *bl) @@ -214,7 +214,9 @@ static const struct drm_panel_funcs sw43408_funcs =3D { }; =20 static const struct of_device_id sw43408_of_match[] =3D { + /* legacy */ { .compatible =3D "lg,sw43408", }, + { .compatible =3D "lg,sw43408-lh546wf1-ed01", }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, sw43408_of_match); --=20 2.51.0 From nobody Tue Dec 2 02:43:37 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 529882F6592; Tue, 18 Nov 2025 11:30:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763465445; cv=none; b=pm61GWlPKQ+qzoOrifj1pSBSr68aXUQ5rPVox8C8ByuIebl7UuEyYjHyJyP4WpNDiAYBVWdbkVEXHUyF14GUc96Q05GRSRbQVt55x16AvVg5995X9dGuMOrwgUIEDFub/lUAHebp2+SfS4ChARf9eUEKA8f9wlIGi0MxP+1Hphk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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Tue, 18 Nov 2025 11:30:42 +0000 (UTC) From: David Heidelberg via B4 Relay Date: Tue, 18 Nov 2025 12:30:39 +0100 Subject: [PATCH v3 4/8] drm/panel: sw43408: Introduce disable/enable functions Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251118-pixel-3-v3-4-317a2b400d8a@ixit.cz> References: <20251118-pixel-3-v3-0-317a2b400d8a@ixit.cz> In-Reply-To: <20251118-pixel-3-v3-0-317a2b400d8a@ixit.cz> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sumit Semwal , Casey Connolly , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: phodina@protonmail.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org, dri-devel@lists.freedesktop.org, David Heidelberg X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; 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a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg Mostly cleanup, introduced disable, enable, and reset function, which takeover parts of prepare and unprepare suitable for splitting. Signed-off-by: David Heidelberg --- drivers/gpu/drm/panel/panel-lg-sw43408.c | 83 ++++++++++++++++++++--------= ---- 1 file changed, 53 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-lg-sw43408.c b/drivers/gpu/drm/pan= el/panel-lg-sw43408.c index bd55f6d8f2771..e5a8a9bb8d15c 100644 --- a/drivers/gpu/drm/panel/panel-lg-sw43408.c +++ b/drivers/gpu/drm/panel/panel-lg-sw43408.c @@ -38,11 +38,10 @@ static inline struct sw43408_panel *to_panel_info(struc= t drm_panel *panel) return container_of(panel, struct sw43408_panel, base); } =20 -static int sw43408_unprepare(struct drm_panel *panel) +static int sw43408_disable(struct drm_panel *panel) { struct sw43408_panel *sw43408 =3D to_panel_info(panel); struct mipi_dsi_multi_context ctx =3D { .dsi =3D sw43408->link }; - int ret; =20 mipi_dsi_dcs_set_display_off_multi(&ctx); =20 @@ -50,19 +49,55 @@ static int sw43408_unprepare(struct drm_panel *panel) =20 mipi_dsi_msleep(&ctx, 100); =20 + return ctx.accum_err; +} + +static int sw43408_unprepare(struct drm_panel *panel) +{ + struct sw43408_panel *sw43408 =3D to_panel_info(panel); + int ret; + gpiod_set_value(sw43408->reset_gpio, 1); =20 ret =3D regulator_bulk_disable(ARRAY_SIZE(sw43408->supplies), sw43408->su= pplies); =20 - return ret ? : ctx.accum_err; + return ret; } =20 -static int sw43408_program(struct drm_panel *panel) +static int sw43408_enable(struct drm_panel *panel) { struct sw43408_panel *sw43408 =3D to_panel_info(panel); struct mipi_dsi_multi_context ctx =3D { .dsi =3D sw43408->link }; struct drm_dsc_picture_parameter_set pps; =20 + mipi_dsi_dcs_set_display_on_multi(&ctx); + + mipi_dsi_msleep(&ctx, 50); + + sw43408->link->mode_flags &=3D ~MIPI_DSI_MODE_LPM; + + drm_dsc_pps_payload_pack(&pps, sw43408->link->dsc); + + mipi_dsi_picture_parameter_set_multi(&ctx, &pps); + + sw43408->link->mode_flags |=3D MIPI_DSI_MODE_LPM; + + /* + * This panel uses PPS selectors with offset: + * PPS 1 if pps_identifier is 0 + * PPS 2 if pps_identifier is 1 + */ + mipi_dsi_compression_mode_ext_multi(&ctx, true, + MIPI_DSI_COMPRESSION_DSC, 1); + + return ctx.accum_err; +} + +static int sw43408_program(struct drm_panel *panel) +{ + struct sw43408_panel *sw43408 =3D to_panel_info(panel); + struct mipi_dsi_multi_context ctx =3D { .dsi =3D sw43408->link }; + mipi_dsi_dcs_write_seq_multi(&ctx, MIPI_DCS_SET_GAMMA_CURVE, 0x02); =20 mipi_dsi_dcs_set_tear_on_multi(&ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK); @@ -97,26 +132,19 @@ static int sw43408_program(struct drm_panel *panel) mipi_dsi_dcs_write_seq_multi(&ctx, 0x55, 0x04, 0x61, 0xdb, 0x04, 0x70, 0x= db); mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0xca); =20 - mipi_dsi_dcs_set_display_on_multi(&ctx); - - mipi_dsi_msleep(&ctx, 50); - - sw43408->link->mode_flags &=3D ~MIPI_DSI_MODE_LPM; - - drm_dsc_pps_payload_pack(&pps, sw43408->link->dsc); - - mipi_dsi_picture_parameter_set_multi(&ctx, &pps); + return ctx.accum_err; +} =20 - sw43408->link->mode_flags |=3D MIPI_DSI_MODE_LPM; +static void sw43408_reset(struct sw43408_panel *ctx) +{ + usleep_range(5000, 6000); =20 - /* - * This panel uses PPS selectors with offset: - * PPS 1 if pps_identifier is 0 - * PPS 2 if pps_identifier is 1 - */ - mipi_dsi_compression_mode_ext_multi(&ctx, true, - MIPI_DSI_COMPRESSION_DSC, 1); - return ctx.accum_err; + gpiod_set_value(ctx->reset_gpio, 0); + usleep_range(9000, 10000); + gpiod_set_value(ctx->reset_gpio, 1); + usleep_range(1000, 2000); + gpiod_set_value(ctx->reset_gpio, 0); + usleep_range(9000, 10000); } =20 static int sw43408_prepare(struct drm_panel *panel) @@ -128,14 +156,7 @@ static int sw43408_prepare(struct drm_panel *panel) if (ret < 0) return ret; =20 - usleep_range(5000, 6000); - - gpiod_set_value(ctx->reset_gpio, 0); - usleep_range(9000, 10000); - gpiod_set_value(ctx->reset_gpio, 1); - usleep_range(1000, 2000); - gpiod_set_value(ctx->reset_gpio, 0); - usleep_range(9000, 10000); + sw43408_reset(ctx); =20 ret =3D sw43408_program(panel); if (ret) @@ -208,6 +229,8 @@ static int sw43408_backlight_init(struct sw43408_panel = *ctx) } =20 static const struct drm_panel_funcs sw43408_funcs =3D { + .disable =3D sw43408_disable, + .enable =3D sw43408_enable, .unprepare =3D sw43408_unprepare, .prepare =3D sw43408_prepare, .get_modes =3D sw43408_get_modes, --=20 2.51.0 From nobody Tue Dec 2 02:43:37 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 77C923570B8; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251118-pixel-3-v3-5-317a2b400d8a@ixit.cz> References: <20251118-pixel-3-v3-0-317a2b400d8a@ixit.cz> In-Reply-To: <20251118-pixel-3-v3-0-317a2b400d8a@ixit.cz> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sumit Semwal , Casey Connolly , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: phodina@protonmail.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org, dri-devel@lists.freedesktop.org, David Heidelberg X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=904; i=david@ixit.cz; h=from:subject:message-id; bh=InL4IEJK9SCfpvLnrH751SzB3QvgsZ1MDVnoJ5xWIq0=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBpHFjgYbn0WPWPCSGgCqAi80SoSxWT3vZwegAVa OXROI5fxDiJAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCaRxY4AAKCRBgAj/E00kg cs05D/4oJJX22556aW4MvjAKcBubbkD6X06QIGWjSeo5Nr9LdeIfakO56jEXd918axdJD/qg5kx cJKmfnmeQdFSSilK51YTcviXAjTmXHmYqn94jU42AuYGfhcPjA0PpND+n8dFa95n/++GUL4ufRD 4I/odGbC+cRw1p1YeIf7xCh0rS0O3ma8UdMWhqPX1Hd8BtEyN7ZzA/rE2GSgO+qD/30SNNOI/4p 9K9jerDo83mdhc9g+CzXqFgU5pTgY8Fe5afYbTB9pg3nCPwOetcytpHM7hX0bRJXQZctoj9oQ7z ZHAhEgrVVfIWn7Lj/Oexdb8sEN2unpSLrItDNFKvZzOd3T08F5AYRbNpfKeOY/k0I6XZz9O3KYh t0A1NBGFgn/Lfd1BCPqg908Z65RlqxhMYWV4HNgRRUtVhBtSqlOxu4RY2mVKGmjGA2evxdeEPxn fXCmIUxuHbux6TocNwEbJRMfnp64dNNgyyO2dr6ooIgsQRho3VvLS3ijKHeNrZJIv3gZV2KboV+ T1vj7y6oKDRvob8GqRX2/sOiw+tkR2s0nU4jDx+VICk4Jd5zN4tixNBi7vXj7yu5eXJQ7wmSWx9 uZBdeq5gNHOdW7bLFLAfyvEnIc2iPQusJ2e0NGfKyXySQ1dxj6oWeBiyWig3G1xwRaBW7LbD+Uc Hbj4I8BllB3gA6A== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg The drm_panel_remove should take care of disable/unprepare. Remove the manual call from the sw43408_remove function. Signed-off-by: David Heidelberg --- drivers/gpu/drm/panel/panel-lg-sw43408.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-lg-sw43408.c b/drivers/gpu/drm/pan= el/panel-lg-sw43408.c index e5a8a9bb8d15c..d8481bdafd6dd 100644 --- a/drivers/gpu/drm/panel/panel-lg-sw43408.c +++ b/drivers/gpu/drm/panel/panel-lg-sw43408.c @@ -319,10 +319,6 @@ static void sw43408_remove(struct mipi_dsi_device *dsi) struct sw43408_panel *ctx =3D mipi_dsi_get_drvdata(dsi); int ret; =20 - ret =3D sw43408_unprepare(&ctx->base); - if (ret < 0) - dev_err(&dsi->dev, "failed to unprepare panel: %d\n", ret); - ret =3D mipi_dsi_detach(dsi); if (ret < 0) dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", ret); --=20 2.51.0 From nobody Tue Dec 2 02:43:37 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BF436357A3B; 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a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg Switch to devm_regulator_bulk_get_const() to stop setting the supplies list in probe(), and move the regulator_bulk_data struct in static const. Signed-off-by: David Heidelberg Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/panel/panel-lg-sw43408.c | 26 ++++++++++++++------------ 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-lg-sw43408.c b/drivers/gpu/drm/pan= el/panel-lg-sw43408.c index d8481bdafd6dd..0a902470e03fa 100644 --- a/drivers/gpu/drm/panel/panel-lg-sw43408.c +++ b/drivers/gpu/drm/panel/panel-lg-sw43408.c @@ -20,13 +20,18 @@ #include #include =20 -#define NUM_SUPPLIES 2 +static const struct regulator_bulk_data sw43408_supplies[] =3D { + { .supply =3D "vddi", /* 1.88V */ + .init_load_uA =3D 62000 }, + { .supply =3D "vpnl", /* 3.0 V */ + .init_load_uA =3D 857000 }, +}; =20 struct sw43408_panel { struct drm_panel base; struct mipi_dsi_device *link; =20 - struct regulator_bulk_data supplies[NUM_SUPPLIES]; + struct regulator_bulk_data *supplies; =20 struct gpio_desc *reset_gpio; =20 @@ -59,7 +64,7 @@ static int sw43408_unprepare(struct drm_panel *panel) =20 gpiod_set_value(sw43408->reset_gpio, 1); =20 - ret =3D regulator_bulk_disable(ARRAY_SIZE(sw43408->supplies), sw43408->su= pplies); + ret =3D regulator_bulk_disable(ARRAY_SIZE(sw43408_supplies), sw43408->sup= plies); =20 return ret; } @@ -152,7 +157,7 @@ static int sw43408_prepare(struct drm_panel *panel) struct sw43408_panel *ctx =3D to_panel_info(panel); int ret; =20 - ret =3D regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies); + ret =3D regulator_bulk_enable(ARRAY_SIZE(sw43408_supplies), ctx->supplies= ); if (ret < 0) return ret; =20 @@ -166,7 +171,7 @@ static int sw43408_prepare(struct drm_panel *panel) =20 poweroff: gpiod_set_value(ctx->reset_gpio, 1); - regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies); + regulator_bulk_disable(ARRAY_SIZE(sw43408_supplies), ctx->supplies); return ret; } =20 @@ -249,13 +254,10 @@ static int sw43408_add(struct sw43408_panel *ctx) struct device *dev =3D &ctx->link->dev; int ret; =20 - ctx->supplies[0].supply =3D "vddi"; /* 1.88 V */ - ctx->supplies[0].init_load_uA =3D 62000; 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Cosmetic: also inline PTR_ERR. Signed-off-by: David Heidelberg Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/panel/panel-lg-sw43408.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-lg-sw43408.c b/drivers/gpu/drm/pan= el/panel-lg-sw43408.c index 0a902470e03fa..5f5f013a4da75 100644 --- a/drivers/gpu/drm/panel/panel-lg-sw43408.c +++ b/drivers/gpu/drm/panel/panel-lg-sw43408.c @@ -263,8 +263,8 @@ static int sw43408_add(struct sw43408_panel *ctx) =20 ctx->reset_gpio =3D devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); if (IS_ERR(ctx->reset_gpio)) { - ret =3D PTR_ERR(ctx->reset_gpio); - return dev_err_probe(dev, ret, "cannot get reset gpio\n"); + return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio), + "Failed to get reset-gpios\n"); } =20 ret =3D sw43408_backlight_init(ctx); --=20 2.51.0 From nobody Tue Dec 2 02:43:37 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 97A60357A33; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251118-pixel-3-v3-8-317a2b400d8a@ixit.cz> References: <20251118-pixel-3-v3-0-317a2b400d8a@ixit.cz> In-Reply-To: <20251118-pixel-3-v3-0-317a2b400d8a@ixit.cz> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sumit Semwal , Casey Connolly , Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: phodina@protonmail.com, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org, dri-devel@lists.freedesktop.org, David Heidelberg , Amit Pundir , Casey Connolly , Joel Selvaraj , Vinod Koul , Bjorn Andersson X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=17626; i=david@ixit.cz; h=from:subject:message-id; bh=PJwgO0R+F2VPL4Ce79oQK2wTtxonQ6t2w56PUigsvYo=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBpHFjgS58ZMjgNrv9dN/zFTCGjnjXdCmp+0Yl5g s9lw8wTWo2JAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCaRxY4AAKCRBgAj/E00kg cjJFD/9JnvRSLxyVQuc11BaDQAPrurYLAfh/y0gbEYJjOH7OVjVsurxgJS2yaez1kG2vKXI36Qm 0UQd6ye6yl1dD/1kZGVWpC7JnMqrandDWjC2yO2QvzeTQ/UuvvJP5nGNDzO1JlKI+dBBaDBgoG/ 6ZNrZqb0vY47uVvW1/F44g0iwpFsrSBcFxXgrvZogJy58ANcSn9UavnolR2Q86CDKHqmBVTxfKJ AoWPZTckSzBC5VjsVraAg9kPlpqWwPVzCh9E6t4UIi7lvv0TcObBbKPeX3YoELuGu+JZ8kwcCjb 0g/Sq5hGH7HFKQpMK8yVmNCrYo4EtpndipEMm9dkEblSgMiqYVpuMcVjZbOwhD6L8V6e0sEUD8M LTO1QIXOaEgyvDCGT9ZYudpAgxd8l3ncxOnsEd2dcvYgikgltiF1T2Aiv/rFUfrMz7zc2pdNC3v qScCTVjlBlWF8by+mThbR7Mlk8g6/+WKwao9kSfiIAxuOOJ8+3vEzW2lGm7fYQuMAigfma07VGS yHWQXrhVNaEn1OaYODINMnl+HXIp/F7apimspvyjuNEQoDvmJk+q4soq6XE36dKRndYiJNCFviM LTDx1sr3O8MrZ/P744b481jCCJ7rEzD0uXycnyyN2OoPx1bn9Bxe05lEHibu6ZkKjrNmtGNLZkB TyizWl62NdkaPSw== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg This adds initial device tree support for the following phones: - Google Pixel 3 (blueline) - Google Pixel 3 XL (crosshatch) Both phone boards use the same identifiers and differ only slightly in their connected peripherals. Supported functionality includes: - Debug UART - UFS - USB-C (peripheral mode) - Display (Pixel 3 only, and the driver needs improvements) - GPU - Bluetooth - Wi-Fi The rmtfs region is allocated using UIO, making it technically "dynamic." Its address and size can be read from sysfs: $ cat /sys/class/uio/uio0/name /sys/class/uio/uio0/maps/map0/addr 0x00000000f2701000 $ cat /sys/class/uio/uio0/maps/map0/size 0x0000000000200000 Like the OnePlus 6, the Pixel 3 requires 1 kB of reserved memory on either side of the rmtfs region to work around an XPU bug that would otherwise cause erroneous violations when accessing the rmtfs_mem region. Co-developed-by: Amit Pundir Signed-off-by: Amit Pundir Co-developed-by: Bjorn Andersson Signed-off-by: Bjorn Andersson Co-developed-by: Casey Connolly Signed-off-by: Casey Connolly Co-developed-by: Joel Selvaraj Signed-off-by: Joel Selvaraj Co-developed-by: Sumit Semwal Signed-off-by: Sumit Semwal Co-developed-by: Vinod Koul Signed-off-by: Vinod Koul Signed-off-by: David Heidelberg --- arch/arm64/boot/dts/qcom/Makefile | 2 + .../arm64/boot/dts/qcom/sdm845-google-blueline.dts | 88 ++++ arch/arm64/boot/dts/qcom/sdm845-google-common.dtsi | 515 +++++++++++++++++= ++++ .../boot/dts/qcom/sdm845-google-crosshatch.dts | 33 ++ 4 files changed, 638 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/M= akefile index 6f34d5ed331c4..c853b28b3b198 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -250,6 +250,8 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D sdm845-db845c.dtb sdm845-db845c-navigation-mezzanine-dtbs :=3D sdm845-db845c.dtb sdm845-db84= 5c-navigation-mezzanine.dtbo =20 dtb-$(CONFIG_ARCH_QCOM) +=3D sdm845-db845c-navigation-mezzanine.dtb +dtb-$(CONFIG_ARCH_QCOM) +=3D sdm845-google-crosshatch.dtb +dtb-$(CONFIG_ARCH_QCOM) +=3D sdm845-google-blueline.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sdm845-lg-judyln.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sdm845-lg-judyp.dtb dtb-$(CONFIG_ARCH_QCOM) +=3D sdm845-mtp.dtb diff --git a/arch/arm64/boot/dts/qcom/sdm845-google-blueline.dts b/arch/arm= 64/boot/dts/qcom/sdm845-google-blueline.dts new file mode 100644 index 0000000000000..cdaa0a76256ce --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm845-google-blueline.dts @@ -0,0 +1,88 @@ +// SPDX-License-Identifier: GPL-2.0-only + +/dts-v1/; + +#include "sdm845-google-common.dtsi" + +/ { + model =3D "Google Pixel 3"; + compatible =3D "google,blueline", "qcom,sdm845"; +}; + +&battery { + charge-full-design-microamp-hours =3D <2970000>; + voltage-min-design-microvolt =3D <3600000>; + voltage-max-design-microvolt =3D <4400000>; +}; + +&cont_splash_mem { + reg =3D <0 0x9d400000 0 0x02400000>; +}; + +&framebuffer0 { + width =3D <1080>; + height =3D <2160>; + stride =3D <(1080 * 4)>; + format =3D "a8r8g8b8"; +}; + +&mdss_dsi0 { + vdda-supply =3D <&vdda_mipi_dsi0_1p2>; + + status =3D "okay"; + + panel@0 { + compatible =3D "lg,sw43408-lh546wf1-ed01", "lg,sw43408"; + reg =3D <0>; + + vddi-supply =3D <&vreg_l14a_1p88>; + vpnl-supply =3D <&vreg_l28a_3p0>; + + reset-gpios =3D <&tlmm 6 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&panel_reset_pins &panel_te_pin>; + pinctrl-names =3D "default"; + + port { + panel_in: endpoint { + remote-endpoint =3D <&mdss_dsi0_out>; + }; + }; + }; +}; + +&mdss_dsi0_out { + data-lanes =3D <0 1 2 3>; + remote-endpoint =3D <&panel_in>; + qcom,te-source =3D "mdp_vsync_e"; +}; + +&mdss_dsi0_phy { + vdds-supply =3D <&vdda_mipi_dsi0_pll>; + + status =3D "okay"; +}; + +&tlmm { + panel_te_pin: panel-te-state { + pins =3D "gpio12"; + function =3D "mdp_vsync"; + drive-strength =3D <2>; + bias-pull-down; + }; + + panel_reset_pins: panel-active-state { + pins =3D "gpio6"; + function =3D "gpio"; + drive-strength =3D <8>; + bias-disable; + }; + + panel_suspend: panel-suspend-state { + pins =3D "gpio6"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-down; + }; + +}; diff --git a/arch/arm64/boot/dts/qcom/sdm845-google-common.dtsi b/arch/arm6= 4/boot/dts/qcom/sdm845-google-common.dtsi new file mode 100644 index 0000000000000..f8323b1ec861d --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm845-google-common.dtsi @@ -0,0 +1,515 @@ +// SPDX-License-Identifier: GPL-2.0-only + +/dts-v1/; + +#include +#include +#include +#include +#include + +#include "sdm845.dtsi" +#include "pm8998.dtsi" +#include "pmi8998.dtsi" + +/delete-node/ &mpss_region; +/delete-node/ &venus_mem; +/delete-node/ &cdsp_mem; +/delete-node/ &mba_region; +/delete-node/ &slpi_mem; +/delete-node/ &spss_mem; +/delete-node/ &rmtfs_mem; + +/ { + chassis-type =3D "handset"; + qcom,board-id =3D <0x00021505 0>; + qcom,msm-id =3D ; + + aliases { + serial0 =3D &uart9; + serial1 =3D &uart6; + }; + + battery: battery { + compatible =3D "simple-battery"; + }; + + chosen { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + stdout-path =3D "serial0:115200n8"; + + /* Use display framebuffer as setup by bootloader */ + framebuffer0: framebuffer-0 { + compatible =3D "simple-framebuffer"; + memory-region =3D <&cont_splash_mem>; + }; + }; + + reserved-memory { + cont_splash_mem: splash@9d400000 { + no-map; + }; + + mpss_region: memory@8e000000 { + reg =3D <0 0x8e000000 0 0x9800000>; + no-map; + }; + + venus_mem: venus@97800000 { + reg =3D <0 0x97800000 0 0x500000>; + no-map; + }; + + cdsp_mem: cdsp-mem@97D00000 { + reg =3D <0 0x97D00000 0 0x800000>; + no-map; + }; + + mba_region: mba@98500000 { + reg =3D <0 0x98500000 0 0x200000>; + no-map; + }; + + slpi_mem: slpi@98700000 { + reg =3D <0 0x98700000 0 0x1400000>; + no-map; + }; + + spss_mem: spss@99B00000 { + reg =3D <0 0x99B00000 0 0x100000>; + no-map; + }; + + rmtfs_mem: rmtfs-region@f2700000 { + compatible =3D "qcom,rmtfs-mem"; + reg =3D <0 0xf2700000 0 0x202000>; + qcom,use-guard-pages; + no-map; + + qcom,client-id =3D <1>; + qcom,vmid =3D ; + }; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + label =3D "Volume keys"; + autorepeat; + + pinctrl-0 =3D <&volume_up_gpio>; + pinctrl-names =3D "default"; + + key-vol-up { + label =3D "Volume Up"; + linux,code =3D ; + gpios =3D <&pm8998_gpios 6 GPIO_ACTIVE_LOW>; + debounce-interval =3D <15>; + }; + }; + + vph_pwr: regulator-vph-pwr { + compatible =3D "regulator-fixed"; + regulator-name =3D "vph_pwr"; + regulator-min-microvolt =3D <3700000>; + regulator-max-microvolt =3D <3700000>; + }; + + vreg_s4a_1p8: regulator-vreg-s4a-1p8 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vreg_s4a_1p8"; + + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-always-on; + regulator-boot-on; + + vin-supply =3D <&vph_pwr>; + }; +}; + +&adsp_pas { + firmware-name =3D "qcom/sdm845/Google/blueline/adsp.mbn"; + + status =3D "okay"; +}; + +&apps_rsc { + regulators-0 { + compatible =3D "qcom,pm8998-rpmh-regulators"; + qcom,pmic-id =3D "a"; + + vdd-s1-supply =3D <&vph_pwr>; + vdd-s2-supply =3D <&vph_pwr>; + vdd-s3-supply =3D <&vph_pwr>; + vdd-s4-supply =3D <&vph_pwr>; + vdd-s5-supply =3D <&vph_pwr>; + vdd-s6-supply =3D <&vph_pwr>; + vdd-s7-supply =3D <&vph_pwr>; + vdd-s8-supply =3D <&vph_pwr>; + vdd-s9-supply =3D <&vph_pwr>; + vdd-s10-supply =3D <&vph_pwr>; + vdd-s11-supply =3D <&vph_pwr>; + vdd-s12-supply =3D <&vph_pwr>; + vdd-s13-supply =3D <&vph_pwr>; + vdd-l1-l27-supply =3D <&vreg_s7a_1p025>; + vdd-l2-l8-l17-supply =3D <&vreg_s3a_1p35>; + vdd-l3-l11-supply =3D <&vreg_s7a_1p025>; + vdd-l4-l5-supply =3D <&vreg_s7a_1p025>; + vdd-l6-supply =3D <&vph_pwr>; + vdd-l7-l12-l14-l15-supply =3D <&vreg_s5a_2p04>; + vdd-l9-supply =3D <&vreg_bob>; + vdd-l10-l23-l25-supply =3D <&vreg_bob>; + vdd-l13-l19-l21-supply =3D <&vreg_bob>; + vdd-l16-l28-supply =3D <&vreg_bob>; + vdd-l18-l22-supply =3D <&vreg_bob>; + vdd-l20-l24-supply =3D <&vreg_bob>; + vdd-l26-supply =3D <&vreg_s3a_1p35>; + vin-lvs-1-2-supply =3D <&vreg_s4a_1p8>; + + vreg_s3a_1p35: smps3 { + regulator-min-microvolt =3D <1352000>; + regulator-max-microvolt =3D <1352000>; + }; + + vreg_s5a_2p04: smps5 { + regulator-min-microvolt =3D <1904000>; + regulator-max-microvolt =3D <2040000>; + }; + + vreg_s7a_1p025: smps7 { + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <1028000>; + }; + + vdda_mipi_dsi0_pll: + vreg_l1a_0p875: ldo1 { + regulator-min-microvolt =3D <880000>; + regulator-max-microvolt =3D <880000>; + regulator-initial-mode =3D ; + regulator-boot-on; + }; + + vreg_l5a_0p8: ldo5 { + regulator-min-microvolt =3D <800000>; + regulator-max-microvolt =3D <800000>; + regulator-initial-mode =3D ; + }; + + vreg_l12a_1p8: ldo12 { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l7a_1p8: ldo7 { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + }; + + vreg_l13a_2p95: ldo13 { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <2960000>; + regulator-initial-mode =3D ; + }; + + vreg_l14a_1p88: ldo14 { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-initial-mode =3D ; + regulator-boot-on; + /* + * We can't properly bring the panel back if it gets turned off + * so keep it's regulators always on for now. + */ + regulator-always-on; + }; + + vreg_l17a_1p3: ldo17 { + regulator-min-microvolt =3D <1304000>; + regulator-max-microvolt =3D <1304000>; + regulator-initial-mode =3D ; + }; + + vreg_l19a_3p3: ldo19 { + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3312000>; + regulator-initial-mode =3D ; + /* + * The touchscreen needs this to be 3.3v, which is apparently + * quite close to the hardware limit for this LDO (3.312v) + * It must be kept in high power mode to prevent TS brownouts + */ + regulator-allowed-modes =3D ; + }; + + vreg_l20a_2p95: ldo20 { + regulator-min-microvolt =3D <2960000>; + regulator-max-microvolt =3D <2968000>; + regulator-initial-mode =3D ; + }; + + vreg_l21a_2p95: ldo21 { + regulator-min-microvolt =3D <2960000>; + regulator-max-microvolt =3D <2968000>; + regulator-initial-mode =3D ; + }; + + vreg_l24a_3p075: ldo24 { + regulator-min-microvolt =3D <3088000>; + regulator-max-microvolt =3D <3088000>; + regulator-initial-mode =3D ; + }; + + vreg_l25a_3p3: ldo25 { + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3312000>; + regulator-initial-mode =3D ; + }; + + vdda_mipi_dsi0_1p2: + vreg_l26a_1p2: ldo26 { + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-initial-mode =3D ; + regulator-boot-on; + }; + + vreg_l28a_3p0: ldo28 { + regulator-min-microvolt =3D <2856000>; + regulator-max-microvolt =3D <3008000>; + regulator-initial-mode =3D ; + regulator-boot-on; + /* + * We can't properly bring the panel back if it gets turned off + * so keep it's regulators always on for now. + */ + regulator-always-on; + }; + }; + + regulators-1 { + compatible =3D "qcom,pmi8998-rpmh-regulators"; + qcom,pmic-id =3D "b"; + + vdd-bob-supply =3D <&vph_pwr>; + + vreg_bob: bob { + regulator-min-microvolt =3D <3312000>; + regulator-max-microvolt =3D <3600000>; + regulator-initial-mode =3D ; + regulator-allow-bypass; + }; + }; + + regulators-2 { + compatible =3D "qcom,pm8005-rpmh-regulators"; + qcom,pmic-id =3D "c"; + + vdd-s1-supply =3D <&vph_pwr>; + vdd-s2-supply =3D <&vph_pwr>; + vdd-s3-supply =3D <&vph_pwr>; + vdd-s4-supply =3D <&vph_pwr>; + + vreg_s3c_0p6: smps3 { + regulator-min-microvolt =3D <600000>; + regulator-max-microvolt =3D <600000>; + }; + }; +}; + +&cdsp_pas { + firmware-name =3D "qcom/sdm845/Google/blueline/cdsp.mbn"; + + status =3D "okay"; +}; + +&gcc { + protected-clocks =3D , + , + ; +}; + +&gpi_dma0 { + status =3D "okay"; +}; + +&gpi_dma1 { + status =3D "okay"; +}; + +&gpu { + status =3D "okay"; +}; + +&gpu_zap_shader { + firmware-name =3D "qcom/sdm845/Google/blueline/a630_zap.mbn"; +}; + +&ipa { + firmware-name =3D "qcom/sdm845/Google/blueline/ipa_fws.mbn"; + memory-region =3D <&ipa_fw_mem>; + + status =3D "okay"; +}; + +&mdss { + status =3D "okay"; +}; + +&mss_pil { + firmware-name =3D "qcom/sdm845/Google/blueline/mba.mbn", + "qcom/sdm845/Google/blueline/modem.mbn"; + + status =3D "okay"; +}; + +&pm8998_gpios { + volume_up_gpio: vol-up-active-state { + pins =3D "gpio6"; + function =3D "normal"; + input-enable; + bias-pull-up; + qcom,drive-strength =3D <0>; + }; +}; + +&pm8998_resin { + linux,code =3D ; + + status =3D "okay"; +}; + +&pmi8998_charger { + monitored-battery =3D <&battery>; + + status =3D "okay"; +}; + +&qupv3_id_0 { + status =3D "okay"; +}; + +&qupv3_id_1 { + status =3D "okay"; +}; + +&qup_uart9_rx { + drive-strength =3D <2>; + bias-pull-up; +}; + +&qup_uart9_tx { + drive-strength =3D <2>; + bias-disable; +}; + +&tlmm { + gpio-reserved-ranges =3D < 0 4>, /* SPI (Intel MNH Pixel Visual Core) */ + <81 4>; /* SPI (most likely Fingerprint Cards FPC1075) */ + + touchscreen_reset: ts-reset-state { + pins =3D "gpio99"; + function =3D "gpio"; + drive-strength =3D <8>; + bias-pull-up; + }; + + touchscreen_pins: ts-pins-gpio-state { + pins =3D "gpio125"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + touchscreen_i2c_pins: qup-i2c2-gpio-state { + pins =3D "gpio27", "gpio28"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; +}; + +&uart6 { + pinctrl-0 =3D <&qup_uart6_4pin>; + + status =3D "okay"; + + bluetooth { + compatible =3D "qcom,wcn3990-bt"; + + vddio-supply =3D <&vreg_s4a_1p8>; + vddxo-supply =3D <&vreg_l7a_1p8>; + vddrf-supply =3D <&vreg_l17a_1p3>; + vddch0-supply =3D <&vreg_l25a_3p3>; + max-speed =3D <3200000>; + }; +}; + +&uart9 { + status =3D "okay"; +}; + +&ufs_mem_hc { + reset-gpios =3D <&tlmm 150 GPIO_ACTIVE_LOW>; + + vcc-supply =3D <&vreg_l20a_2p95>; + vcc-max-microamp =3D <800000>; + + status =3D "okay"; +}; + +&ufs_mem_phy { + vdda-phy-supply =3D <&vreg_l1a_0p875>; + vdda-pll-supply =3D <&vreg_l26a_1p2>; + + status =3D "okay"; +}; + +&usb_1 { + status =3D "okay"; +}; + +&usb_1_dwc3 { + dr_mode =3D "peripheral"; +}; + +&usb_1_hsphy { + vdd-supply =3D <&vreg_l1a_0p875>; + vdda-pll-supply =3D <&vreg_l12a_1p8>; + vdda-phy-dpdm-supply =3D <&vreg_l24a_3p075>; + + qcom,imp-res-offset-value =3D <8>; + qcom,hstx-trim-value =3D ; + qcom,preemphasis-level =3D ; + qcom,preemphasis-width =3D ; + + status =3D "okay"; +}; + +&usb_1_qmpphy { + vdda-phy-supply =3D <&vreg_l26a_1p2>; + vdda-pll-supply =3D <&vreg_l1a_0p875>; + + status =3D "okay"; +}; + +&venus { + firmware-name =3D "qcom/sdm845/Google/blueline/venus.mbn"; + + status =3D "okay"; +}; + +&wifi { + vdd-0.8-cx-mx-supply =3D <&vreg_l5a_0p8>; + vdd-1.8-xo-supply =3D <&vreg_l7a_1p8>; + vdd-1.3-rfa-supply =3D <&vreg_l17a_1p3>; + vdd-3.3-ch0-supply =3D <&vreg_l25a_3p3>; + + qcom,snoc-host-cap-8bit-quirk; + + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm845-google-crosshatch.dts b/arch/a= rm64/boot/dts/qcom/sdm845-google-crosshatch.dts new file mode 100644 index 0000000000000..ca534f0950a19 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm845-google-crosshatch.dts @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0-only + +/dts-v1/; + +#include "sdm845-google-common.dtsi" + +/ { + model =3D "Google Pixel 3 XL"; + compatible =3D "google,crosshatch", "qcom,sdm845"; +}; + +&battery { + charge-full-design-microamp-hours =3D <3480000>; + voltage-min-design-microvolt =3D <3600000>; + voltage-max-design-microvolt =3D <4400000>; +}; + +&cont_splash_mem { + reg =3D <0 0x9d400000 0 0x02400000>; +}; + +&framebuffer0 { + width =3D <1440>; + height =3D <2960>; + stride =3D <(1440 * 4)>; + format =3D "a8r8g8b8"; +}; + +&mdss { + /* until the panel is prepared */ + status =3D "disabled"; +}; + --=20 2.51.0