From nobody Tue Dec 2 02:51:45 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 34B6E33342E; Mon, 17 Nov 2025 13:49:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763387365; cv=none; b=QHIoy9zSzTqv/dOLtVd8+ySnddRfE6xP0WVRT27+j7BuF9CzranPZUGFgRN2t9MyuICyizgQzjjrxB0n+zIPagprxDXgRIA3vC5yVlvKarcGJjzdm2AYoxkaTX8HMTgUZV2BbQllDdBwWw67Aykd6Yq24q6TeZsxXSnWBSkcwwg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763387365; c=relaxed/simple; bh=y0TMaiJnK5wBhVAW+VGJTW8TqcVe+C2/PZ9ZMt6KYwE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Od/+LNlBxcjq8506HuuLzSoWmD7srh3OQnuuQ11pCv4YDLJb8Ysf9MCm3HS5r7mnQED4lOvDfwJ9Mn+4VoBvrDJGKXs6jlBw1CqYWSPdwA+YUhONyIZzxtTnaL8fN3Y4kHk8fNcFZMqg0OXtQYvctGxGOmANmTJaYo2vgWHDRI8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=nZjPgybl; arc=none smtp.client-ip=198.175.65.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="nZjPgybl" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1763387364; x=1794923364; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=y0TMaiJnK5wBhVAW+VGJTW8TqcVe+C2/PZ9ZMt6KYwE=; b=nZjPgybloQe6meMDfggGmFESAsOf15UGZ1BV021h3Xzcg1hjNBY04VSP gSyeAnSqGYrNzWpsYv20/ppga+ocxfdSqe3I1n9WTZ5Iw5oqOPcvoI3PK TncIYci5q1qwqnEDXYrp8yeAKUdIgeUzzwa/Rgoaqr2U3gnCmqSP8E5Rz CPl8uV4i1/IGnFchnAQ7A/e3ioIfHpOI59fT7t27NazGCwwYQewwYc1DH +QEc+66HynGbYacXo8nPBh7AhMR0pOTzG9nKdPRZMzWbfVzxLOko2Dt/b hVexzzLxiFrxV63oRpLhnBM5/WZWKhhR+gjxZVE1M4ajhZvoFiYNes0qz Q==; X-CSE-ConnectionGUID: rw5UKf2/T26X81oCUrBwXQ== X-CSE-MsgGUID: ebx8g21ISPeHBEtP4vHp0Q== X-IronPort-AV: E=McAfee;i="6800,10657,11616"; a="65266933" X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="65266933" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Nov 2025 05:49:23 -0800 X-CSE-ConnectionGUID: t0jfD22RSoq/abG1USJ1UQ== X-CSE-MsgGUID: gQ5y6zFwRP6y4cPti2ymMQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="190684001" Received: from irvmail002.ir.intel.com ([10.43.11.120]) by fmviesa008.fm.intel.com with ESMTP; 17 Nov 2025 05:49:17 -0800 Received: from mglak.igk.intel.com (mglak.igk.intel.com [10.237.112.146]) by irvmail002.ir.intel.com (Postfix) with ESMTP id C213D37E36; Mon, 17 Nov 2025 13:49:14 +0000 (GMT) From: Larysa Zaremba To: intel-wired-lan@lists.osuosl.org, Tony Nguyen Cc: aleksander.lobakin@intel.com, sridhar.samudrala@intel.com, "Singhai, Anjali" , Michal Swiatkowski , Larysa Zaremba , "Fijalkowski, Maciej" , Emil Tantilov , Madhu Chittim , Josh Hay , "Keller, Jacob E" , jayaprakash.shanmugam@intel.com, natalia.wochtman@intel.com, Jiri Pirko , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Simon Horman , Jonathan Corbet , Richard Cochran , Przemek Kitszel , Andrew Lunn , netdev@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Czurylo Subject: [PATCH iwl-next v5 01/15] virtchnl: create 'include/linux/intel' and move necessary header files Date: Mon, 17 Nov 2025 14:48:41 +0100 Message-ID: <20251117134912.18566-2-larysa.zaremba@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20251117134912.18566-1-larysa.zaremba@intel.com> References: <20251117134912.18566-1-larysa.zaremba@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Victor Raj include/linux/net houses a single folder "intel", meanwhile include/linux/intel is vacant. On top of that, it would be useful to place all iavf headers together with other intel networking headers. Move abovementioned intel header files into new folder include/linux/intel. Also, assign new folder to both intel and general networking maintainers. Suggested-by: Alexander Lobakin Reviewed-by: Sridhar Samudrala Signed-off-by: Victor Raj Signed-off-by: Larysa Zaremba --- MAINTAINERS | 6 +++--- drivers/infiniband/hw/irdma/i40iw_if.c | 2 +- drivers/infiniband/hw/irdma/icrdma_if.c | 2 +- drivers/infiniband/hw/irdma/ig3rdma_if.c | 2 +- drivers/infiniband/hw/irdma/main.c | 2 +- drivers/infiniband/hw/irdma/main.h | 2 +- drivers/net/ethernet/intel/i40e/i40e.h | 4 ++-- drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h | 2 +- drivers/net/ethernet/intel/i40e/i40e_client.c | 2 +- drivers/net/ethernet/intel/i40e/i40e_common.c | 2 +- drivers/net/ethernet/intel/i40e/i40e_ethtool.c | 2 +- drivers/net/ethernet/intel/i40e/i40e_main.c | 2 +- drivers/net/ethernet/intel/i40e/i40e_prototype.h | 2 +- drivers/net/ethernet/intel/i40e/i40e_txrx.c | 4 ++-- drivers/net/ethernet/intel/i40e/i40e_txrx.h | 2 +- drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h | 2 +- drivers/net/ethernet/intel/iavf/iavf.h | 2 +- drivers/net/ethernet/intel/iavf/iavf_adminq_cmd.h | 2 +- drivers/net/ethernet/intel/iavf/iavf_common.c | 2 +- drivers/net/ethernet/intel/iavf/iavf_main.c | 2 +- drivers/net/ethernet/intel/iavf/iavf_prototype.h | 2 +- drivers/net/ethernet/intel/iavf/iavf_txrx.c | 2 +- drivers/net/ethernet/intel/iavf/iavf_txrx.h | 2 +- drivers/net/ethernet/intel/iavf/iavf_types.h | 4 +--- drivers/net/ethernet/intel/iavf/iavf_virtchnl.c | 2 +- drivers/net/ethernet/intel/ice/ice.h | 2 +- drivers/net/ethernet/intel/ice/ice_adminq_cmd.h | 2 +- drivers/net/ethernet/intel/ice/ice_base.c | 2 +- drivers/net/ethernet/intel/ice/ice_common.h | 2 +- drivers/net/ethernet/intel/ice/ice_flow.h | 2 +- drivers/net/ethernet/intel/ice/ice_idc_int.h | 4 ++-- drivers/net/ethernet/intel/ice/ice_txrx.c | 2 +- drivers/net/ethernet/intel/ice/ice_txrx_lib.c | 2 +- drivers/net/ethernet/intel/ice/ice_type.h | 2 +- drivers/net/ethernet/intel/ice/ice_vf_lib.h | 2 +- drivers/net/ethernet/intel/ice/virt/virtchnl.h | 2 +- drivers/net/ethernet/intel/idpf/idpf.h | 6 +++--- drivers/net/ethernet/intel/idpf/idpf_txrx.h | 2 +- drivers/net/ethernet/intel/idpf/idpf_virtchnl.h | 2 +- drivers/net/ethernet/intel/ixgbe/ixgbe_type.h | 2 +- drivers/net/ethernet/intel/ixgbe/ixgbe_type_e610.h | 2 +- drivers/net/ethernet/intel/libie/adminq.c | 2 +- drivers/net/ethernet/intel/libie/fwlog.c | 2 +- drivers/net/ethernet/intel/libie/rx.c | 2 +- include/linux/{net =3D> }/intel/i40e_client.h | 0 include/linux/{net =3D> }/intel/iidc_rdma.h | 0 include/linux/{net =3D> }/intel/iidc_rdma_ice.h | 0 include/linux/{net =3D> }/intel/iidc_rdma_idpf.h | 0 include/linux/{net =3D> }/intel/libie/adminq.h | 0 include/linux/{net =3D> }/intel/libie/fwlog.h | 2 +- include/linux/{net =3D> }/intel/libie/pctype.h | 0 include/linux/{net =3D> }/intel/libie/rx.h | 0 include/linux/{avf =3D> intel}/virtchnl.h | 0 .../ethernet/intel/idpf =3D> include/linux/intel}/virtchnl2.h | 0 .../intel/idpf =3D> include/linux/intel}/virtchnl2_lan_desc.h | 0 55 files changed, 52 insertions(+), 54 deletions(-) rename include/linux/{net =3D> }/intel/i40e_client.h (100%) rename include/linux/{net =3D> }/intel/iidc_rdma.h (100%) rename include/linux/{net =3D> }/intel/iidc_rdma_ice.h (100%) rename include/linux/{net =3D> }/intel/iidc_rdma_idpf.h (100%) rename include/linux/{net =3D> }/intel/libie/adminq.h (100%) rename include/linux/{net =3D> }/intel/libie/fwlog.h (98%) rename include/linux/{net =3D> }/intel/libie/pctype.h (100%) rename include/linux/{net =3D> }/intel/libie/rx.h (100%) rename include/linux/{avf =3D> intel}/virtchnl.h (100%) rename {drivers/net/ethernet/intel/idpf =3D> include/linux/intel}/virtchnl= 2.h (100%) rename {drivers/net/ethernet/intel/idpf =3D> include/linux/intel}/virtchnl= 2_lan_desc.h (100%) diff --git a/MAINTAINERS b/MAINTAINERS index 37f4278db851..ad4d53135981 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12520,8 +12520,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/gi= t/tnguy/next-queue.git F: Documentation/networking/device_drivers/ethernet/intel/ F: drivers/net/ethernet/intel/ F: drivers/net/ethernet/intel/*/ -F: include/linux/avf/virtchnl.h -F: include/linux/net/intel/*/ +F: include/linux/intel/ =20 INTEL ETHERNET PROTOCOL DRIVER FOR RDMA M: Krzysztof Czurylo @@ -14229,7 +14228,7 @@ L: netdev@vger.kernel.org S: Maintained T: git https://github.com/alobakin/linux.git F: drivers/net/ethernet/intel/libie/ -F: include/linux/net/intel/libie/ +F: include/linux/intel/libie/ K: libie =20 LIBNVDIMM BTT: BLOCK TRANSLATION TABLE @@ -17892,6 +17891,7 @@ F: include/linux/fddidevice.h F: include/linux/hippidevice.h F: include/linux/if_* F: include/linux/inetdevice.h +F: include/linux/intel/ F: include/linux/netdev* F: include/linux/platform_data/wiznet.h F: include/uapi/linux/cn_proc.h diff --git a/drivers/infiniband/hw/irdma/i40iw_if.c b/drivers/infiniband/hw= /irdma/i40iw_if.c index 15e036ddaffb..7c019f9e386f 100644 --- a/drivers/infiniband/hw/irdma/i40iw_if.c +++ b/drivers/infiniband/hw/irdma/i40iw_if.c @@ -2,7 +2,7 @@ /* Copyright (c) 2015 - 2021 Intel Corporation */ #include "main.h" #include "i40iw_hw.h" -#include +#include =20 static struct i40e_client i40iw_client; =20 diff --git a/drivers/infiniband/hw/irdma/icrdma_if.c b/drivers/infiniband/h= w/irdma/icrdma_if.c index 27b191f61caf..b2e016c1c6ac 100644 --- a/drivers/infiniband/hw/irdma/icrdma_if.c +++ b/drivers/infiniband/hw/irdma/icrdma_if.c @@ -2,7 +2,7 @@ /* Copyright (c) 2015 - 2024 Intel Corporation */ =20 #include "main.h" -#include +#include =20 static void icrdma_prep_tc_change(struct irdma_device *iwdev) { diff --git a/drivers/infiniband/hw/irdma/ig3rdma_if.c b/drivers/infiniband/= hw/irdma/ig3rdma_if.c index 1bb42eb298ba..a0304b2e6cb8 100644 --- a/drivers/infiniband/hw/irdma/ig3rdma_if.c +++ b/drivers/infiniband/hw/irdma/ig3rdma_if.c @@ -2,7 +2,7 @@ /* Copyright (c) 2023 - 2024 Intel Corporation */ =20 #include "main.h" -#include +#include #include "ig3rdma_hw.h" =20 static void ig3rdma_idc_core_event_handler(struct iidc_rdma_core_dev_info = *cdev_info, diff --git a/drivers/infiniband/hw/irdma/main.c b/drivers/infiniband/hw/ird= ma/main.c index 95957d52883d..9781699ad57c 100644 --- a/drivers/infiniband/hw/irdma/main.c +++ b/drivers/infiniband/hw/irdma/main.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB /* Copyright (c) 2015 - 2021 Intel Corporation */ #include "main.h" -#include +#include =20 MODULE_ALIAS("i40iw"); MODULE_DESCRIPTION("Intel(R) Ethernet Protocol Driver for RDMA"); diff --git a/drivers/infiniband/hw/irdma/main.h b/drivers/infiniband/hw/ird= ma/main.h index 886b30da188a..bcbff04c6fe5 100644 --- a/drivers/infiniband/hw/irdma/main.h +++ b/drivers/infiniband/hw/irdma/main.h @@ -29,7 +29,7 @@ #include #endif #include -#include +#include #include #include #include diff --git a/drivers/net/ethernet/intel/i40e/i40e.h b/drivers/net/ethernet/= intel/i40e/i40e.h index d2d03db2acec..2a9ec1bff8d5 100644 --- a/drivers/net/ethernet/intel/i40e/i40e.h +++ b/drivers/net/ethernet/intel/i40e/i40e.h @@ -8,8 +8,8 @@ #include #include #include -#include -#include +#include +#include #include #include #include diff --git a/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h b/drivers/ne= t/ethernet/intel/i40e/i40e_adminq_cmd.h index cc02a85ad42b..e70f0aa728b1 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h +++ b/drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h @@ -4,7 +4,7 @@ #ifndef _I40E_ADMINQ_CMD_H_ #define _I40E_ADMINQ_CMD_H_ =20 -#include +#include =20 #include #include diff --git a/drivers/net/ethernet/intel/i40e/i40e_client.c b/drivers/net/et= hernet/intel/i40e/i40e_client.c index 518bc738ea3b..4dce3c6b2850 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_client.c +++ b/drivers/net/ethernet/intel/i40e/i40e_client.c @@ -3,7 +3,7 @@ =20 #include #include -#include +#include =20 #include "i40e.h" =20 diff --git a/drivers/net/ethernet/intel/i40e/i40e_common.c b/drivers/net/et= hernet/intel/i40e/i40e_common.c index 59f5c1e810eb..dab9dfcf7bda 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_common.c +++ b/drivers/net/ethernet/intel/i40e/i40e_common.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright(c) 2013 - 2021 Intel Corporation. */ =20 -#include +#include #include #include #include diff --git a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c b/drivers/net/e= thernet/intel/i40e/i40e_ethtool.c index 86c72596617a..34224a56b110 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_ethtool.c +++ b/drivers/net/ethernet/intel/i40e/i40e_ethtool.c @@ -3,7 +3,7 @@ =20 /* ethtool support for i40e */ =20 -#include +#include #include "i40e_devids.h" #include "i40e_diag.h" #include "i40e_txrx_common.h" diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethe= rnet/intel/i40e/i40e_main.c index f3b1b70d824f..f6dc9764da86 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_main.c +++ b/drivers/net/ethernet/intel/i40e/i40e_main.c @@ -3,7 +3,7 @@ =20 #include #include -#include +#include #include #include #include diff --git a/drivers/net/ethernet/intel/i40e/i40e_prototype.h b/drivers/net= /ethernet/intel/i40e/i40e_prototype.h index 26bb7bffe361..9d0cd6aabdcb 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_prototype.h +++ b/drivers/net/ethernet/intel/i40e/i40e_prototype.h @@ -5,7 +5,7 @@ #define _I40E_PROTOTYPE_H_ =20 #include -#include +#include #include "i40e_debug.h" #include "i40e_type.h" =20 diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.c b/drivers/net/ethe= rnet/intel/i40e/i40e_txrx.c index cc0b9efc2637..ee8c8c1ac3aa 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_txrx.c +++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.c @@ -2,8 +2,8 @@ /* Copyright(c) 2013 - 2018 Intel Corporation. */ =20 #include -#include -#include +#include +#include #include #include #include diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.h b/drivers/net/ethe= rnet/intel/i40e/i40e_txrx.h index 1e5fd63d47f4..e630493e9139 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_txrx.h +++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.h @@ -4,7 +4,7 @@ #ifndef _I40E_TXRX_H_ #define _I40E_TXRX_H_ =20 -#include +#include #include #include "i40e_type.h" =20 diff --git a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h b/drivers/n= et/ethernet/intel/i40e/i40e_virtchnl_pf.h index f558b45725c8..a03ecddfb956 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h +++ b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h @@ -4,7 +4,7 @@ #ifndef _I40E_VIRTCHNL_PF_H_ #define _I40E_VIRTCHNL_PF_H_ =20 -#include +#include #include #include "i40e_type.h" =20 diff --git a/drivers/net/ethernet/intel/iavf/iavf.h b/drivers/net/ethernet/= intel/iavf/iavf.h index a87e0c6d4017..80b9a70ee3e1 100644 --- a/drivers/net/ethernet/intel/iavf/iavf.h +++ b/drivers/net/ethernet/intel/iavf/iavf.h @@ -37,7 +37,7 @@ #include =20 #include "iavf_type.h" -#include +#include #include "iavf_txrx.h" #include "iavf_fdir.h" #include "iavf_adv_rss.h" diff --git a/drivers/net/ethernet/intel/iavf/iavf_adminq_cmd.h b/drivers/ne= t/ethernet/intel/iavf/iavf_adminq_cmd.h index 0482c9ce9b9c..12e84e1e971b 100644 --- a/drivers/net/ethernet/intel/iavf/iavf_adminq_cmd.h +++ b/drivers/net/ethernet/intel/iavf/iavf_adminq_cmd.h @@ -4,7 +4,7 @@ #ifndef _IAVF_ADMINQ_CMD_H_ #define _IAVF_ADMINQ_CMD_H_ =20 -#include +#include =20 /* This header file defines the iavf Admin Queue commands and is shared be= tween * iavf Firmware and Software. diff --git a/drivers/net/ethernet/intel/iavf/iavf_common.c b/drivers/net/et= hernet/intel/iavf/iavf_common.c index 614a886bca99..9bc8bdc339c7 100644 --- a/drivers/net/ethernet/intel/iavf/iavf_common.c +++ b/drivers/net/ethernet/intel/iavf/iavf_common.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright(c) 2013 - 2018 Intel Corporation. */ =20 -#include +#include #include #include "iavf_type.h" #include "iavf_adminq.h" diff --git a/drivers/net/ethernet/intel/iavf/iavf_main.c b/drivers/net/ethe= rnet/intel/iavf/iavf_main.c index 4b0fc8f354bc..d7b577b8c965 100644 --- a/drivers/net/ethernet/intel/iavf/iavf_main.c +++ b/drivers/net/ethernet/intel/iavf/iavf_main.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright(c) 2013 - 2018 Intel Corporation. */ =20 -#include +#include #include =20 #include "iavf.h" diff --git a/drivers/net/ethernet/intel/iavf/iavf_prototype.h b/drivers/net= /ethernet/intel/iavf/iavf_prototype.h index 7f9f9dbf959a..a3348b063723 100644 --- a/drivers/net/ethernet/intel/iavf/iavf_prototype.h +++ b/drivers/net/ethernet/intel/iavf/iavf_prototype.h @@ -6,7 +6,7 @@ =20 #include "iavf_type.h" #include "iavf_alloc.h" -#include +#include =20 /* Prototypes for shared code functions that are not in * the standard function pointer structures. These are diff --git a/drivers/net/ethernet/intel/iavf/iavf_txrx.c b/drivers/net/ethe= rnet/intel/iavf/iavf_txrx.c index 363c42bf3dcf..275b11dd0c60 100644 --- a/drivers/net/ethernet/intel/iavf/iavf_txrx.c +++ b/drivers/net/ethernet/intel/iavf/iavf_txrx.c @@ -2,7 +2,7 @@ /* Copyright(c) 2013 - 2018 Intel Corporation. */ =20 #include -#include +#include #include =20 #include "iavf.h" diff --git a/drivers/net/ethernet/intel/iavf/iavf_txrx.h b/drivers/net/ethe= rnet/intel/iavf/iavf_txrx.h index df49b0b1d54a..bc8a6068461d 100644 --- a/drivers/net/ethernet/intel/iavf/iavf_txrx.h +++ b/drivers/net/ethernet/intel/iavf/iavf_txrx.h @@ -4,7 +4,7 @@ #ifndef _IAVF_TXRX_H_ #define _IAVF_TXRX_H_ =20 -#include +#include =20 /* Interrupt Throttling and Rate Limiting Goodies */ #define IAVF_DEFAULT_IRQ_WORK 256 diff --git a/drivers/net/ethernet/intel/iavf/iavf_types.h b/drivers/net/eth= ernet/intel/iavf/iavf_types.h index a095855122bf..270bc35f933d 100644 --- a/drivers/net/ethernet/intel/iavf/iavf_types.h +++ b/drivers/net/ethernet/intel/iavf/iavf_types.h @@ -4,9 +4,7 @@ #ifndef _IAVF_TYPES_H_ #define _IAVF_TYPES_H_ =20 -#include "iavf_types.h" - -#include +#include #include =20 /* structure used to queue PTP commands for processing */ diff --git a/drivers/net/ethernet/intel/iavf/iavf_virtchnl.c b/drivers/net/= ethernet/intel/iavf/iavf_virtchnl.c index 88156082a41d..d74512205203 100644 --- a/drivers/net/ethernet/intel/iavf/iavf_virtchnl.c +++ b/drivers/net/ethernet/intel/iavf/iavf_virtchnl.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright(c) 2013 - 2018 Intel Corporation. */ =20 -#include +#include =20 #include "iavf.h" #include "iavf_ptp.h" diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/in= tel/ice/ice.h index 147aaee192a7..623659b565bd 100644 --- a/drivers/net/ethernet/intel/ice/ice.h +++ b/drivers/net/ethernet/intel/ice/ice.h @@ -36,7 +36,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h b/drivers/net/= ethernet/intel/ice/ice_adminq_cmd.h index 859e9c66f3e7..b2685ebd37d6 100644 --- a/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h +++ b/drivers/net/ethernet/intel/ice/ice_adminq_cmd.h @@ -4,7 +4,7 @@ #ifndef _ICE_ADMINQ_CMD_H_ #define _ICE_ADMINQ_CMD_H_ =20 -#include +#include =20 /* This header file defines the Admin Queue commands, error codes and * descriptor format. It is shared between Firmware and Software. diff --git a/drivers/net/ethernet/intel/ice/ice_base.c b/drivers/net/ethern= et/intel/ice/ice_base.c index eadb1e3d12b3..01e4dd3b20f2 100644 --- a/drivers/net/ethernet/intel/ice/ice_base.c +++ b/drivers/net/ethernet/intel/ice/ice_base.c @@ -2,7 +2,7 @@ /* Copyright (c) 2019, Intel Corporation. */ =20 #include -#include +#include #include "ice_base.h" #include "ice_lib.h" #include "ice_dcb_lib.h" diff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethe= rnet/intel/ice/ice_common.h index e700ac0dc347..ff6393e9be0c 100644 --- a/drivers/net/ethernet/intel/ice/ice_common.h +++ b/drivers/net/ethernet/intel/ice/ice_common.h @@ -11,7 +11,7 @@ #include "ice_nvm.h" #include "ice_flex_pipe.h" #include "ice_parser.h" -#include +#include #include "ice_switch.h" #include "ice_fdir.h" =20 diff --git a/drivers/net/ethernet/intel/ice/ice_flow.h b/drivers/net/ethern= et/intel/ice/ice_flow.h index 6c6cdc8addb1..7323e26afc0b 100644 --- a/drivers/net/ethernet/intel/ice/ice_flow.h +++ b/drivers/net/ethernet/intel/ice/ice_flow.h @@ -4,7 +4,7 @@ #ifndef _ICE_FLOW_H_ #define _ICE_FLOW_H_ =20 -#include +#include =20 #include "ice_flex_type.h" #include "ice_parser.h" diff --git a/drivers/net/ethernet/intel/ice/ice_idc_int.h b/drivers/net/eth= ernet/intel/ice/ice_idc_int.h index 17dbfcfb6a2a..abe91f313441 100644 --- a/drivers/net/ethernet/intel/ice/ice_idc_int.h +++ b/drivers/net/ethernet/intel/ice/ice_idc_int.h @@ -4,8 +4,8 @@ #ifndef _ICE_IDC_INT_H_ #define _ICE_IDC_INT_H_ =20 -#include -#include +#include +#include =20 struct ice_pf; =20 diff --git a/drivers/net/ethernet/intel/ice/ice_txrx.c b/drivers/net/ethern= et/intel/ice/ice_txrx.c index ad76768a4232..1994a26be3af 100644 --- a/drivers/net/ethernet/intel/ice/ice_txrx.c +++ b/drivers/net/ethernet/intel/ice/ice_txrx.c @@ -7,7 +7,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/net/ethernet/intel/ice/ice_txrx_lib.c b/drivers/net/et= hernet/intel/ice/ice_txrx_lib.c index 956da38d63b0..25c00c894f8f 100644 --- a/drivers/net/ethernet/intel/ice/ice_txrx_lib.c +++ b/drivers/net/ethernet/intel/ice/ice_txrx_lib.c @@ -2,7 +2,7 @@ /* Copyright (c) 2019, Intel Corporation. */ =20 #include -#include +#include #include =20 #include "ice_txrx_lib.h" diff --git a/drivers/net/ethernet/intel/ice/ice_type.h b/drivers/net/ethern= et/intel/ice/ice_type.h index 6a2ec8389a8f..b3dc978e0845 100644 --- a/drivers/net/ethernet/intel/ice/ice_type.h +++ b/drivers/net/ethernet/intel/ice/ice_type.h @@ -17,7 +17,7 @@ #include "ice_protocol_type.h" #include "ice_sbq_cmd.h" #include "ice_vlan_mode.h" -#include +#include #include #include =20 diff --git a/drivers/net/ethernet/intel/ice/ice_vf_lib.h b/drivers/net/ethe= rnet/intel/ice/ice_vf_lib.h index 7a9c75d1d07c..c520e22e3d0a 100644 --- a/drivers/net/ethernet/intel/ice/ice_vf_lib.h +++ b/drivers/net/ethernet/intel/ice/ice_vf_lib.h @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include "ice_type.h" #include "ice_flow.h" #include "virt/fdir.h" diff --git a/drivers/net/ethernet/intel/ice/virt/virtchnl.h b/drivers/net/e= thernet/intel/ice/virt/virtchnl.h index 71bb456e2d71..f7f909424098 100644 --- a/drivers/net/ethernet/intel/ice/virt/virtchnl.h +++ b/drivers/net/ethernet/intel/ice/virt/virtchnl.h @@ -7,7 +7,7 @@ #include #include #include -#include +#include #include "ice_vf_lib.h" =20 /* Restrict number of MAC Addr and VLAN that non-trusted VF can programmed= */ diff --git a/drivers/net/ethernet/intel/idpf/idpf.h b/drivers/net/ethernet/= intel/idpf/idpf.h index dd2718bbd8bd..78e55baf4600 100644 --- a/drivers/net/ethernet/intel/idpf/idpf.h +++ b/drivers/net/ethernet/intel/idpf/idpf.h @@ -21,10 +21,10 @@ struct idpf_rss_data; #include #include =20 -#include -#include +#include +#include +#include =20 -#include "virtchnl2.h" #include "idpf_txrx.h" #include "idpf_controlq.h" =20 diff --git a/drivers/net/ethernet/intel/idpf/idpf_txrx.h b/drivers/net/ethe= rnet/intel/idpf/idpf_txrx.h index 5dcb14008e31..e8ca0186ac01 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_txrx.h +++ b/drivers/net/ethernet/intel/idpf/idpf_txrx.h @@ -13,7 +13,7 @@ #include =20 #include "idpf_lan_txrx.h" -#include "virtchnl2_lan_desc.h" +#include =20 #define IDPF_LARGE_MAX_Q 256 #define IDPF_MAX_Q 16 diff --git a/drivers/net/ethernet/intel/idpf/idpf_virtchnl.h b/drivers/net/= ethernet/intel/idpf/idpf_virtchnl.h index fe065911ad5a..762b477e019c 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_virtchnl.h +++ b/drivers/net/ethernet/intel/idpf/idpf_virtchnl.h @@ -4,7 +4,7 @@ #ifndef _IDPF_VIRTCHNL_H_ #define _IDPF_VIRTCHNL_H_ =20 -#include "virtchnl2.h" +#include =20 #define IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC (60 * 1000) #define IDPF_VC_XN_IDX_M GENMASK(7, 0) diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h b/drivers/net/et= hernet/intel/ixgbe/ixgbe_type.h index 61f2ef67defd..94e00ab96692 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h @@ -7,7 +7,7 @@ #include #include #include -#include +#include #include "ixgbe_type_e610.h" =20 /* Device IDs */ diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type_e610.h b/drivers/n= et/ethernet/intel/ixgbe/ixgbe_type_e610.h index ff8d640a50b1..4bcdebc37eb1 100644 --- a/drivers/net/ethernet/intel/ixgbe/ixgbe_type_e610.h +++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_type_e610.h @@ -4,7 +4,7 @@ #ifndef _IXGBE_TYPE_E610_H_ #define _IXGBE_TYPE_E610_H_ =20 -#include +#include =20 #define BYTES_PER_DWORD 4 =20 diff --git a/drivers/net/ethernet/intel/libie/adminq.c b/drivers/net/ethern= et/intel/libie/adminq.c index 7b4ff479e7e5..5a3ea8eb45c2 100644 --- a/drivers/net/ethernet/intel/libie/adminq.c +++ b/drivers/net/ethernet/intel/libie/adminq.c @@ -2,7 +2,7 @@ /* Copyright (C) 2025 Intel Corporation */ =20 #include -#include +#include =20 static const char * const libie_aq_str_arr[] =3D { #define LIBIE_AQ_STR(x) \ diff --git a/drivers/net/ethernet/intel/libie/fwlog.c b/drivers/net/etherne= t/intel/libie/fwlog.c index f39cc11cb7c5..01ff0eaa357b 100644 --- a/drivers/net/ethernet/intel/libie/fwlog.c +++ b/drivers/net/ethernet/intel/libie/fwlog.c @@ -4,7 +4,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/net/ethernet/intel/libie/rx.c b/drivers/net/ethernet/i= ntel/libie/rx.c index 6fda656afa9c..e163b8a66aea 100644 --- a/drivers/net/ethernet/intel/libie/rx.c +++ b/drivers/net/ethernet/intel/libie/rx.c @@ -4,7 +4,7 @@ #define DEFAULT_SYMBOL_NAMESPACE "LIBIE" =20 #include -#include +#include =20 /* O(1) converting i40e/ice/iavf's 8/10-bit hardware packet type to a pars= ed * bitfield struct. diff --git a/include/linux/net/intel/i40e_client.h b/include/linux/intel/i4= 0e_client.h similarity index 100% rename from include/linux/net/intel/i40e_client.h rename to include/linux/intel/i40e_client.h diff --git a/include/linux/net/intel/iidc_rdma.h b/include/linux/intel/iidc= _rdma.h similarity index 100% rename from include/linux/net/intel/iidc_rdma.h rename to include/linux/intel/iidc_rdma.h diff --git a/include/linux/net/intel/iidc_rdma_ice.h b/include/linux/intel/= iidc_rdma_ice.h similarity index 100% rename from include/linux/net/intel/iidc_rdma_ice.h rename to include/linux/intel/iidc_rdma_ice.h diff --git a/include/linux/net/intel/iidc_rdma_idpf.h b/include/linux/intel= /iidc_rdma_idpf.h similarity index 100% rename from include/linux/net/intel/iidc_rdma_idpf.h rename to include/linux/intel/iidc_rdma_idpf.h diff --git a/include/linux/net/intel/libie/adminq.h b/include/linux/intel/l= ibie/adminq.h similarity index 100% rename from include/linux/net/intel/libie/adminq.h rename to include/linux/intel/libie/adminq.h diff --git a/include/linux/net/intel/libie/fwlog.h b/include/linux/intel/li= bie/fwlog.h similarity index 98% rename from include/linux/net/intel/libie/fwlog.h rename to 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E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="65266944" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Nov 2025 05:49:23 -0800 X-CSE-ConnectionGUID: LmoNDX2zTaSSQKGAstbfIw== X-CSE-MsgGUID: p7XhSVCGSCaWlHmq9U20fQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="190684003" Received: from irvmail002.ir.intel.com ([10.43.11.120]) by fmviesa008.fm.intel.com with ESMTP; 17 Nov 2025 05:49:18 -0800 Received: from mglak.igk.intel.com (mglak.igk.intel.com [10.237.112.146]) by irvmail002.ir.intel.com (Postfix) with ESMTP id A893537E39; Mon, 17 Nov 2025 13:49:16 +0000 (GMT) From: Larysa Zaremba To: intel-wired-lan@lists.osuosl.org, Tony Nguyen Cc: aleksander.lobakin@intel.com, sridhar.samudrala@intel.com, "Singhai, Anjali" , Michal Swiatkowski , Larysa Zaremba , "Fijalkowski, Maciej" , Emil Tantilov , Madhu Chittim , Josh Hay , "Keller, Jacob E" , jayaprakash.shanmugam@intel.com, natalia.wochtman@intel.com, Jiri Pirko , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Simon Horman , Jonathan Corbet , Richard Cochran , Przemek Kitszel , Andrew Lunn , netdev@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH iwl-next v5 02/15] virtchnl: introduce control plane version fields Date: Mon, 17 Nov 2025 14:48:42 +0100 Message-ID: <20251117134912.18566-3-larysa.zaremba@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20251117134912.18566-1-larysa.zaremba@intel.com> References: <20251117134912.18566-1-larysa.zaremba@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Victor Raj In the virtchnl header file, add the Control Plane software version fields. Signed-off-by: Victor Raj Reviewed-by: Sridhar Samudrala Signed-off-by: Larysa Zaremba --- include/linux/intel/virtchnl2.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/include/linux/intel/virtchnl2.h b/include/linux/intel/virtchnl= 2.h index 02ae447cc24a..7b0821732ff3 100644 --- a/include/linux/intel/virtchnl2.h +++ b/include/linux/intel/virtchnl2.h @@ -505,7 +505,8 @@ VIRTCHNL2_CHECK_STRUCT_LEN(8, virtchnl2_version_info); * sent per transmit packet without needing to be * linearized. * @pad: Padding. - * @reserved: Reserved. + * @cp_ver_major: Control Plane major version number. + * @cp_ver_minor: Control Plane minor version number. * @device_type: See enum virtchl2_device_type. * @min_sso_packet_len: Min packet length supported by device for single * segment offload. @@ -556,7 +557,8 @@ struct virtchnl2_get_capabilities { __le16 max_tx_hdr_size; u8 max_sg_bufs_per_tx_pkt; u8 pad[3]; - u8 reserved[4]; + __le16 cp_ver_major; + __le16 cp_ver_minor; __le32 device_type; u8 min_sso_packet_len; u8 max_hdr_buf_per_lso; --=20 2.47.0 From nobody Tue Dec 2 02:51:45 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 674093346AA; Mon, 17 Nov 2025 13:49:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763387368; cv=none; b=YninR+VENHeFSevS7UEn57QIbRapkFITBDwECzEeqGfmhX09I0GytQ9qhNpi/w0v/31Dv1AvQ/qjOlXvRmMY8XbbYRS0EnAkj5ecNxIiGej/XIWQZKF0+FOkH1f1Icg0FHBeA9d+gJR/hkR+KhYkdZOpZSMuxgDdeo0/Lcbc0xc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763387368; c=relaxed/simple; bh=b2oHtswzOIbKJMZuKbKUfiuFrIl0WBhel79tguh0j1o=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=fNa26RQ47aP++VMNp2l05Stcm2TybOuDcRVmWTNlQRxjzmvuBuEAaBQVpejZkrKCCG0YKLpHanLaTJwq8Gx7KURa9GWdrjapO5zkWSbnxxj0k0isRIwU+tjSAXSZ08YZwq/EuUNTzFA096I0ax8c+Jz9EgrSlMSJFdL+igcax7g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Jx25tXO2; arc=none smtp.client-ip=198.175.65.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Jx25tXO2" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1763387367; x=1794923367; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=b2oHtswzOIbKJMZuKbKUfiuFrIl0WBhel79tguh0j1o=; b=Jx25tXO25tWevc67hKGJpPHLSc0DUjf23NDiZWRxPuKX01PYrRcqy+9C rzC1M5Wy4wS606eVkMvAjaUn/OpcLfzRz1ThUiSQWZpqLU6Gt8EhIAs6E 965w1g22RDPiOv6UwMkLZ+IIYeLcK3aGAr4P1PPt8nsC3HIZhX9VPXOZi gA1xpVchaO1DFt8eY7sFb4wJ1uTwoXV76luecuTztqJ2UxlHnYw0FlUh7 AxxoCKGZj++S8v6IoUvCO3zII6xBZJh9EWSjvWGFtNRv03NnwzpAN+5tP ug17emBQtPGEf5Unb0Mnedg2JZsaDOPg8lMtFnI9TP53qTkqmVELAwBkv A==; X-CSE-ConnectionGUID: UNLb1qawTfyUrfZKV31KIw== X-CSE-MsgGUID: dPDOeJTFR06z/zd5Bn5xuA== X-IronPort-AV: E=McAfee;i="6800,10657,11616"; a="65266959" X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="65266959" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Nov 2025 05:49:26 -0800 X-CSE-ConnectionGUID: u2oNzo1hS12ze9JABI5ThA== X-CSE-MsgGUID: ZDvWQzTIT+i0qFXTPUoCPQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="190684006" Received: from irvmail002.ir.intel.com ([10.43.11.120]) by fmviesa008.fm.intel.com with ESMTP; 17 Nov 2025 05:49:20 -0800 Received: from mglak.igk.intel.com (mglak.igk.intel.com [10.237.112.146]) by irvmail002.ir.intel.com (Postfix) with ESMTP id 520AD37E3A; Mon, 17 Nov 2025 13:49:18 +0000 (GMT) From: Larysa Zaremba To: intel-wired-lan@lists.osuosl.org, Tony Nguyen Cc: aleksander.lobakin@intel.com, sridhar.samudrala@intel.com, "Singhai, Anjali" , Michal Swiatkowski , Larysa Zaremba , "Fijalkowski, Maciej" , Emil Tantilov , Madhu Chittim , Josh Hay , "Keller, Jacob E" , jayaprakash.shanmugam@intel.com, natalia.wochtman@intel.com, Jiri Pirko , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Simon Horman , Jonathan Corbet , Richard Cochran , Przemek Kitszel , Andrew Lunn , netdev@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Phani R Burra Subject: [PATCH iwl-next v5 03/15] libie: add PCI device initialization helpers to libie Date: Mon, 17 Nov 2025 14:48:43 +0100 Message-ID: <20251117134912.18566-4-larysa.zaremba@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20251117134912.18566-1-larysa.zaremba@intel.com> References: <20251117134912.18566-1-larysa.zaremba@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Phani R Burra Add memory related support functions for drivers to access MMIO space and allocate/free dma buffers. Reviewed-by: Maciej Fijalkowski Signed-off-by: Phani R Burra Co-developed-by: Victor Raj Signed-off-by: Victor Raj Co-developed-by: Sridhar Samudrala Signed-off-by: Sridhar Samudrala Co-developed-by: Pavan Kumar Linga Signed-off-by: Pavan Kumar Linga Co-developed-by: Larysa Zaremba Signed-off-by: Larysa Zaremba --- drivers/net/ethernet/intel/libie/Kconfig | 6 + drivers/net/ethernet/intel/libie/Makefile | 4 + drivers/net/ethernet/intel/libie/pci.c | 187 ++++++++++++++++++++++ include/linux/intel/libie/pci.h | 56 +++++++ 4 files changed, 253 insertions(+) create mode 100644 drivers/net/ethernet/intel/libie/pci.c create mode 100644 include/linux/intel/libie/pci.h diff --git a/drivers/net/ethernet/intel/libie/Kconfig b/drivers/net/etherne= t/intel/libie/Kconfig index 70831c7e336e..500a95c944a8 100644 --- a/drivers/net/ethernet/intel/libie/Kconfig +++ b/drivers/net/ethernet/intel/libie/Kconfig @@ -23,3 +23,9 @@ config LIBIE_FWLOG for it. Firmware logging is using admin queue interface to communicate with the device. Debugfs is a user interface used to config logging and dump all collected logs. + +config LIBIE_PCI + tristate + help + Helper functions for management of PCI resources belonging + to networking devices. diff --git a/drivers/net/ethernet/intel/libie/Makefile b/drivers/net/ethern= et/intel/libie/Makefile index db57fc6780ea..a28509cb9086 100644 --- a/drivers/net/ethernet/intel/libie/Makefile +++ b/drivers/net/ethernet/intel/libie/Makefile @@ -12,3 +12,7 @@ libie_adminq-y :=3D adminq.o obj-$(CONFIG_LIBIE_FWLOG) +=3D libie_fwlog.o =20 libie_fwlog-y :=3D fwlog.o + +obj-$(CONFIG_LIBIE_PCI) +=3D libie_pci.o + +libie_pci-y :=3D pci.o diff --git a/drivers/net/ethernet/intel/libie/pci.c b/drivers/net/ethernet/= intel/libie/pci.c new file mode 100644 index 000000000000..50d8d296476d --- /dev/null +++ b/drivers/net/ethernet/intel/libie/pci.c @@ -0,0 +1,187 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (C) 2025 Intel Corporation */ + +#include + +/** + * libie_find_mmio_region - find if MMIO region is present in the list + * @mmio_list: list that contains MMIO region info + * @offset: MMIO region start offset + * @bar_idx: BAR index where the offset to search + * + * Return: MMIO region pointer or NULL if the region info is not present. + */ +static struct libie_pci_mmio_region * +libie_find_mmio_region(const struct list_head *mmio_list, + resource_size_t offset, int bar_idx) +{ + struct libie_pci_mmio_region *mr; + + list_for_each_entry(mr, mmio_list, list) + if (mr->bar_idx =3D=3D bar_idx && mr->offset =3D=3D offset) + return mr; + + return NULL; +} + +/** + * __libie_pci_get_mmio_addr - get the MMIO virtual address + * @mmio_info: contains list of MMIO regions + * @offset: register offset of find + * @num_args: number of additional arguments present + * + * This function finds the virtual address of a register offset by iterati= ng + * through the non-linear MMIO regions that are mapped by the driver. + * + * Return: valid MMIO virtual address or NULL. + */ +void __iomem *__libie_pci_get_mmio_addr(struct libie_mmio_info *mmio_info, + resource_size_t offset, + int num_args, ...) +{ + struct libie_pci_mmio_region *mr; + int bar_idx =3D 0; + va_list args; + + if (num_args) { + va_start(args, num_args); + bar_idx =3D va_arg(args, int); + va_end(args); + } + + list_for_each_entry(mr, &mmio_info->mmio_list, list) + if (bar_idx =3D=3D mr->bar_idx && offset >=3D mr->offset && + offset < mr->offset + mr->size) { + offset -=3D mr->offset; + + return mr->addr + offset; + } + + return NULL; +} +EXPORT_SYMBOL_NS_GPL(__libie_pci_get_mmio_addr, "LIBIE_PCI"); + +/** + * __libie_pci_map_mmio_region - map PCI device MMIO region + * @mmio_info: struct to store the mapped MMIO region + * @offset: MMIO region start offset + * @size: MMIO region size + * @num_args: number of additional arguments present + * + * Return: true on success, false on memory map failure. + */ +bool __libie_pci_map_mmio_region(struct libie_mmio_info *mmio_info, + resource_size_t offset, + resource_size_t size, int num_args, ...) +{ + struct pci_dev *pdev =3D mmio_info->pdev; + struct libie_pci_mmio_region *mr; + resource_size_t pa; + void __iomem *va; + int bar_idx =3D 0; + va_list args; + + if (num_args) { + va_start(args, num_args); + bar_idx =3D va_arg(args, int); + va_end(args); + } + + mr =3D libie_find_mmio_region(&mmio_info->mmio_list, offset, bar_idx); + if (mr) { + pci_warn(pdev, "Mapping of BAR%u with offset %llu already exists\n", + bar_idx, (unsigned long long)offset); + return true; + } + + pa =3D pci_resource_start(pdev, bar_idx) + offset; + va =3D ioremap(pa, size); + if (!va) { + pci_err(pdev, "Failed to map BAR%u region\n", bar_idx); + return false; + } + + mr =3D kvzalloc(sizeof(*mr), GFP_KERNEL); + if (!mr) { + iounmap(va); + return false; + } + + mr->addr =3D va; + mr->offset =3D offset; + mr->size =3D size; + mr->bar_idx =3D bar_idx; + + list_add_tail(&mr->list, &mmio_info->mmio_list); + + return true; +} +EXPORT_SYMBOL_NS_GPL(__libie_pci_map_mmio_region, "LIBIE_PCI"); + +/** + * libie_pci_unmap_fltr_regs - unmap selected PCI device MMIO regions + * @mmio_info: contains list of MMIO regions to unmap + * @fltr: returns true, if region is to be unmapped + */ +void libie_pci_unmap_fltr_regs(struct libie_mmio_info *mmio_info, + bool (*fltr)(struct libie_mmio_info *mmio_info, + struct libie_pci_mmio_region *reg)) +{ + struct libie_pci_mmio_region *mr, *tmp; + + list_for_each_entry_safe(mr, tmp, &mmio_info->mmio_list, list) { + if (!fltr(mmio_info, mr)) + continue; + iounmap(mr->addr); + list_del(&mr->list); + kfree(mr); + } +} +EXPORT_SYMBOL_NS_GPL(libie_pci_unmap_fltr_regs, "LIBIE_PCI"); + +/** + * libie_pci_unmap_all_mmio_regions - unmap all PCI device MMIO regions + * @mmio_info: contains list of MMIO regions to unmap + */ +void libie_pci_unmap_all_mmio_regions(struct libie_mmio_info *mmio_info) +{ + struct libie_pci_mmio_region *mr, *tmp; + + list_for_each_entry_safe(mr, tmp, &mmio_info->mmio_list, list) { + iounmap(mr->addr); + list_del(&mr->list); + kfree(mr); + } +} +EXPORT_SYMBOL_NS_GPL(libie_pci_unmap_all_mmio_regions, "LIBIE_PCI"); + +/** + * libie_pci_init_dev - enable and reserve PCI regions of the device + * @pdev: PCI device information + * + * Return: %0 on success, -%errno on failure. + */ +int libie_pci_init_dev(struct pci_dev *pdev) +{ + int err; + + err =3D pcim_enable_device(pdev); + if (err) + return err; + + for (int bar =3D 0; bar < PCI_STD_NUM_BARS; bar++) + if (pci_resource_flags(pdev, bar) & IORESOURCE_MEM) + pcim_request_region(pdev, bar, pci_name(pdev)); + + err =3D dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); + if (err) + return err; + + pci_set_master(pdev); + + return 0; +} +EXPORT_SYMBOL_NS_GPL(libie_pci_init_dev, "LIBIE_PCI"); + +MODULE_DESCRIPTION("Common Ethernet PCI library"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/intel/libie/pci.h b/include/linux/intel/libie/pc= i.h new file mode 100644 index 000000000000..d3129f1023b7 --- /dev/null +++ b/include/linux/intel/libie/pci.h @@ -0,0 +1,56 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2025 Intel Corporation */ + +#ifndef __LIBIE_PCI_H +#define __LIBIE_PCI_H + +#include + +/** + * struct libie_pci_mmio_region - structure for MMIO region info + * @list: used to add a MMIO region to the list of MMIO regions in + * libie_mmio_info + * @addr: virtual address of MMIO region start + * @offset: start offset of the MMIO region + * @size: size of the MMIO region + * @bar_idx: BAR index to which the MMIO region belongs to + */ +struct libie_pci_mmio_region { + struct list_head list; + void __iomem *addr; + resource_size_t offset; + resource_size_t size; + u16 bar_idx; +}; + +/** + * struct libie_mmio_info - contains list of MMIO regions + * @pdev: PCI device pointer + * @mmio_list: list of MMIO regions + */ +struct libie_mmio_info { + struct pci_dev *pdev; + struct list_head mmio_list; +}; + +#define libie_pci_map_mmio_region(mmio_info, offset, size, ...) \ + __libie_pci_map_mmio_region(mmio_info, offset, size, \ + COUNT_ARGS(__VA_ARGS__), ##__VA_ARGS__) + +#define libie_pci_get_mmio_addr(mmio_info, offset, ...) \ + __libie_pci_get_mmio_addr(mmio_info, offset, \ + COUNT_ARGS(__VA_ARGS__), ##__VA_ARGS__) + +bool __libie_pci_map_mmio_region(struct libie_mmio_info *mmio_info, + resource_size_t offset, resource_size_t size, + int num_args, ...); +void __iomem *__libie_pci_get_mmio_addr(struct libie_mmio_info *mmio_info, + resource_size_t region_offset, + int num_args, ...); +void libie_pci_unmap_all_mmio_regions(struct libie_mmio_info *mmio_info); +void libie_pci_unmap_fltr_regs(struct libie_mmio_info *mmio_info, + bool (*fltr)(struct libie_mmio_info *mmio_info, + struct libie_pci_mmio_region *reg)); +int libie_pci_init_dev(struct pci_dev *pdev); + +#endif /* __LIBIE_PCI_H */ --=20 2.47.0 From nobody Tue Dec 2 02:51:45 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 80128334C2A; Mon, 17 Nov 2025 13:49:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763387369; cv=none; b=ZQBQhMql2muoYiWVxcBXCEy1wrMvrfXE0QgNcSZ81hTwPwKRHGVXchcbY7DEhNRoI0MVizFm3leHR0aj01Jsl6WvM5Cl7QApPcfjXWt7eO45LdJr5+Ii2/Yx3eCo2HnsWKIn3iLpyqzdo2L8FF17qGfLHAMuUspiOKEG/Q2T2yw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763387369; c=relaxed/simple; bh=sr3X5V/RLfy4H2zf8sVFkC7I1lqZf8rvvoj7P55ePT4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=vEm/+GPK8JZgpzVtqKakDg1Osnv++qv0DjsbjgR4usNz8QcEyesHFfVcvXfPVWhZBOfadWzXBh7l9Yl6Gs3A7HXQtd+FPX/8bG2rlCOPUpYt50+DwCafdW7CnJqEJ70N9PhMZvaDi/yiTCm/FcWujpIyANFPbsItKlV58mXI+ig= ARC-Authentication-Results: i=1; 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X-CSE-ConnectionGUID: N0lUgD7tQAqTmV29M0xvUg== X-CSE-MsgGUID: DTXpqn2QQtCNv5zx4jkhPw== X-IronPort-AV: E=McAfee;i="6800,10657,11616"; a="65266970" X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="65266970" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Nov 2025 05:49:27 -0800 X-CSE-ConnectionGUID: k3T+6rpiS32o8mwvJ3TIRA== X-CSE-MsgGUID: /mnZXlZxQXCMdorhtXUA6g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="190684008" Received: from irvmail002.ir.intel.com ([10.43.11.120]) by fmviesa008.fm.intel.com with ESMTP; 17 Nov 2025 05:49:22 -0800 Received: from mglak.igk.intel.com (mglak.igk.intel.com [10.237.112.146]) by irvmail002.ir.intel.com (Postfix) with ESMTP id 13B4E37E3C; Mon, 17 Nov 2025 13:49:20 +0000 (GMT) From: Larysa Zaremba To: intel-wired-lan@lists.osuosl.org, Tony Nguyen Cc: aleksander.lobakin@intel.com, sridhar.samudrala@intel.com, "Singhai, Anjali" , Michal Swiatkowski , Larysa Zaremba , "Fijalkowski, Maciej" , Emil Tantilov , Madhu Chittim , Josh Hay , "Keller, Jacob E" , jayaprakash.shanmugam@intel.com, natalia.wochtman@intel.com, Jiri Pirko , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Simon Horman , Jonathan Corbet , Richard Cochran , Przemek Kitszel , Andrew Lunn , netdev@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH iwl-next v5 04/15] libeth: allow to create fill queues without NAPI Date: Mon, 17 Nov 2025 14:48:44 +0100 Message-ID: <20251117134912.18566-5-larysa.zaremba@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20251117134912.18566-1-larysa.zaremba@intel.com> References: <20251117134912.18566-1-larysa.zaremba@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Pavan Kumar Linga Control queues can utilize libeth_rx fill queues, despite working outside of NAPI context. The only problem is standard fill queues requiring NAPI that provides them with the device pointer. Introduce a way to provide the device directly without using NAPI. Suggested-by: Alexander Lobakin Reviewed-by: Maciej Fijalkowski Signed-off-by: Pavan Kumar Linga Signed-off-by: Larysa Zaremba --- drivers/net/ethernet/intel/libeth/rx.c | 9 +++++---- include/net/libeth/rx.h | 4 +++- 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/intel/libeth/rx.c b/drivers/net/ethernet/= intel/libeth/rx.c index 62521a1f4ec9..1d8248a31037 100644 --- a/drivers/net/ethernet/intel/libeth/rx.c +++ b/drivers/net/ethernet/intel/libeth/rx.c @@ -145,19 +145,20 @@ static bool libeth_rx_page_pool_params_zc(struct libe= th_fq *fq, /** * libeth_rx_fq_create - create a PP with the default libeth settings * @fq: buffer queue struct to fill - * @napi: &napi_struct covering this PP (no usage outside its poll loops) + * @napi_dev: &napi_struct for NAPI (data) queues, &device for others * * Return: %0 on success, -%errno on failure. */ -int libeth_rx_fq_create(struct libeth_fq *fq, struct napi_struct *napi) +int libeth_rx_fq_create(struct libeth_fq *fq, void *napi_dev) { + struct napi_struct *napi =3D fq->no_napi ? NULL : napi_dev; struct page_pool_params pp =3D { .flags =3D PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV, .order =3D LIBETH_RX_PAGE_ORDER, .pool_size =3D fq->count, .nid =3D fq->nid, - .dev =3D napi->dev->dev.parent, - .netdev =3D napi->dev, + .dev =3D napi ? napi->dev->dev.parent : napi_dev, + .netdev =3D napi ? napi->dev : NULL, .napi =3D napi, }; struct libeth_fqe *fqes; diff --git a/include/net/libeth/rx.h b/include/net/libeth/rx.h index 5d991404845e..0e736846c5e8 100644 --- a/include/net/libeth/rx.h +++ b/include/net/libeth/rx.h @@ -69,6 +69,7 @@ enum libeth_fqe_type { * @type: type of the buffers this queue has * @hsplit: flag whether header split is enabled * @xdp: flag indicating whether XDP is enabled + * @no_napi: the queue is not a data queue and does not have NAPI * @buf_len: HW-writeable length per each buffer * @nid: ID of the closest NUMA node with memory */ @@ -85,12 +86,13 @@ struct libeth_fq { enum libeth_fqe_type type:2; bool hsplit:1; bool xdp:1; + bool no_napi:1; =20 u32 buf_len; int nid; }; =20 -int libeth_rx_fq_create(struct libeth_fq *fq, struct napi_struct *napi); +int libeth_rx_fq_create(struct libeth_fq *fq, void *napi_dev); void libeth_rx_fq_destroy(struct libeth_fq *fq); =20 /** --=20 2.47.0 From nobody Tue Dec 2 02:51:45 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C6238333436; Mon, 17 Nov 2025 13:49:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763387373; cv=none; b=uDn3+AOFCajUX9oji0ewS/mnSXUNNZhtf2lUF2PPKwD+BVYA2/UxQkO1rYP8jo2AFsFxSUSBlRpk3x3QE6SxwNR2gpecm3OFynO5qH2eOS3oxZy0/oAGLwNr4VnVktBNO7maLppeCym6L8qMtZK+4jgUfYDRj1G88ILCfa9wJe8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763387373; c=relaxed/simple; bh=rARkSauCbX7Bg6h+t/v2Z6tk0sBP5nE+2SO88Aw5ftg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=WEDwXB4cqXNOUGrmO9wLQgtfX+3p3FlYdo0w0TspikyUNPHVvQ6D54OA8aMmvfcXb1OV0+hgrdnHRhPUhZDucyHMysuyxw52hBHXc8cdSFl2hbcGXLYne7ZzxSyp1gAZFncSWJf9KWLuR7qHQRWJnuOV8megvGOIjgRHY9hUZgo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=FK68WPD5; arc=none smtp.client-ip=198.175.65.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="FK68WPD5" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1763387371; x=1794923371; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rARkSauCbX7Bg6h+t/v2Z6tk0sBP5nE+2SO88Aw5ftg=; b=FK68WPD5Mg7VUJF0OtG9nkOUKl1uZGR5TFXTKkHhAmvWoz+rOrHDf+8a tE+YTen/7bh8nqKC1KNSsgHbyAwBd0MRDUbILPl6NkaDq4HJ9E7Sw0EWm nfPp2UjK22+O1U0vdTiVPfA54L3aJb9SDVsJwvlYOZHrRA8bPDpECRUsI ZH/54KJHa9vO1ff/a9PDElSDscQjc1UMgmtjXsB1eEWg6Nh5rFXJxPmbF 5RvJIMufIqI6Ajs5XTehIWq+VAaHrEQ95famOFpxc74UmLyrxOQKWH2ik yEvM6OWcA/i3XvEo5QfKzkeJRIhSMWEokMw7uQ7HuIYO1kZTONjetg4ur A==; X-CSE-ConnectionGUID: rUuoTKUySxSh4gvhGTeMxA== X-CSE-MsgGUID: fAzMW3NpRXqkkMlqXHFQcw== X-IronPort-AV: E=McAfee;i="6800,10657,11616"; a="76846089" X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="76846089" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Nov 2025 05:49:30 -0800 X-CSE-ConnectionGUID: wrgJ59puSCm/gsDGSpuo4g== X-CSE-MsgGUID: zu278t4WQ66B0AE9/dT7oQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="190115713" Received: from irvmail002.ir.intel.com ([10.43.11.120]) by fmviesa007.fm.intel.com with ESMTP; 17 Nov 2025 05:49:24 -0800 Received: from mglak.igk.intel.com (mglak.igk.intel.com [10.237.112.146]) by irvmail002.ir.intel.com (Postfix) with ESMTP id B1CAB37E27; Mon, 17 Nov 2025 13:49:21 +0000 (GMT) From: Larysa Zaremba To: intel-wired-lan@lists.osuosl.org, Tony Nguyen Cc: aleksander.lobakin@intel.com, sridhar.samudrala@intel.com, "Singhai, Anjali" , Michal Swiatkowski , Larysa Zaremba , "Fijalkowski, Maciej" , Emil Tantilov , Madhu Chittim , Josh Hay , "Keller, Jacob E" , jayaprakash.shanmugam@intel.com, natalia.wochtman@intel.com, Jiri Pirko , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Simon Horman , Jonathan Corbet , Richard Cochran , Przemek Kitszel , Andrew Lunn , netdev@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Phani R Burra Subject: [PATCH iwl-next v5 05/15] libie: add control queue support Date: Mon, 17 Nov 2025 14:48:45 +0100 Message-ID: <20251117134912.18566-6-larysa.zaremba@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20251117134912.18566-1-larysa.zaremba@intel.com> References: <20251117134912.18566-1-larysa.zaremba@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Phani R Burra Libie will now support control queue setup and configuration APIs. These are mainly used for mailbox communication between drivers and control plane. Make use of the libeth_rx page pool support for managing controlq buffers. Reviewed-by: Maciej Fijalkowski Signed-off-by: Phani R Burra Co-developed-by: Victor Raj Signed-off-by: Victor Raj Co-developed-by: Sridhar Samudrala Signed-off-by: Sridhar Samudrala Co-developed-by: Pavan Kumar Linga Signed-off-by: Pavan Kumar Linga Co-developed-by: Larysa Zaremba Signed-off-by: Larysa Zaremba --- drivers/net/ethernet/intel/libie/Kconfig | 8 + drivers/net/ethernet/intel/libie/Makefile | 4 + drivers/net/ethernet/intel/libie/controlq.c | 607 ++++++++++++++++++++ include/linux/intel/libie/controlq.h | 249 ++++++++ 4 files changed, 868 insertions(+) create mode 100644 drivers/net/ethernet/intel/libie/controlq.c create mode 100644 include/linux/intel/libie/controlq.h diff --git a/drivers/net/ethernet/intel/libie/Kconfig b/drivers/net/etherne= t/intel/libie/Kconfig index 500a95c944a8..9c5fdebb6766 100644 --- a/drivers/net/ethernet/intel/libie/Kconfig +++ b/drivers/net/ethernet/intel/libie/Kconfig @@ -15,6 +15,14 @@ config LIBIE_ADMINQ Helper functions used by Intel Ethernet drivers for administration queue command interface (aka adminq). =20 +config LIBIE_CP + tristate + select LIBETH + select LIBIE_PCI + help + Common helper routines to communicate with the device Control Plane + using virtchnl2 or related mailbox protocols. + config LIBIE_FWLOG tristate select LIBIE_ADMINQ diff --git a/drivers/net/ethernet/intel/libie/Makefile b/drivers/net/ethern= et/intel/libie/Makefile index a28509cb9086..3065aa057798 100644 --- a/drivers/net/ethernet/intel/libie/Makefile +++ b/drivers/net/ethernet/intel/libie/Makefile @@ -9,6 +9,10 @@ obj-$(CONFIG_LIBIE_ADMINQ) +=3D libie_adminq.o =20 libie_adminq-y :=3D adminq.o =20 +obj-$(CONFIG_LIBIE_CP) +=3D libie_cp.o + +libie_cp-y :=3D controlq.o + obj-$(CONFIG_LIBIE_FWLOG) +=3D libie_fwlog.o =20 libie_fwlog-y :=3D fwlog.o diff --git a/drivers/net/ethernet/intel/libie/controlq.c b/drivers/net/ethe= rnet/intel/libie/controlq.c new file mode 100644 index 000000000000..80b0f1c2cc0a --- /dev/null +++ b/drivers/net/ethernet/intel/libie/controlq.c @@ -0,0 +1,607 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (C) 2025 Intel Corporation */ + +#include +#include + +#include + +#define LIBIE_CTLQ_DESC_QWORD0(sz) \ + (LIBIE_CTLQ_DESC_FLAG_BUF | \ + LIBIE_CTLQ_DESC_FLAG_RD | \ + FIELD_PREP(LIBIE_CTLQ_DESC_DATA_LEN, sz)) + +/** + * libie_ctlq_free_fq - free fill queue resources, including buffers + * @ctlq: Rx control queue whose resources need to be freed + */ +static void libie_ctlq_free_fq(struct libie_ctlq_info *ctlq) +{ + struct libeth_fq fq =3D { + .fqes =3D ctlq->rx_fqes, + .pp =3D ctlq->pp, + }; + + for (u32 ntc =3D ctlq->next_to_clean; ntc !=3D ctlq->next_to_post; ) { + page_pool_put_full_netmem(fq.pp, fq.fqes[ntc].netmem, false); + + if (++ntc >=3D ctlq->ring_len) + ntc =3D 0; + } + + libeth_rx_fq_destroy(&fq); +} + +/** + * libie_ctlq_init_fq - initialize fill queue for an Rx controlq + * @ctlq: control queue that needs a Rx buffer allocation + * + * Return: %0 on success, -%errno on failure + */ +static int libie_ctlq_init_fq(struct libie_ctlq_info *ctlq) +{ + struct libeth_fq fq =3D { + .count =3D ctlq->ring_len, + .truesize =3D LIBIE_CTLQ_MAX_BUF_LEN, + .nid =3D NUMA_NO_NODE, + .type =3D LIBETH_FQE_SHORT, + .hsplit =3D true, + .no_napi =3D true, + }; + int err; + + err =3D libeth_rx_fq_create(&fq, ctlq->dev); + if (err) + return err; + + ctlq->pp =3D fq.pp; + ctlq->rx_fqes =3D fq.fqes; + ctlq->truesize =3D fq.truesize; + + return 0; +} + +/** + * libie_ctlq_reset_rx_desc - reset the descriptor with a new address + * @desc: descriptor to (re)initialize + * @addr: physical address to put into descriptor + * @mem_truesize: size of the accessible memory + */ +static void libie_ctlq_reset_rx_desc(struct libie_ctlq_desc *desc, + dma_addr_t addr, u32 mem_truesize) +{ + u64 qword; + + *desc =3D (struct libie_ctlq_desc) {}; + qword =3D LIBIE_CTLQ_DESC_QWORD0(mem_truesize); + desc->qword0 =3D cpu_to_le64(qword); + + qword =3D FIELD_PREP(LIBIE_CTLQ_DESC_DATA_ADDR_HIGH, + upper_32_bits(addr)) | + FIELD_PREP(LIBIE_CTLQ_DESC_DATA_ADDR_LOW, + lower_32_bits(addr)); + desc->qword3 =3D cpu_to_le64(qword); +} + +/** + * libie_ctlq_post_rx_buffs - post buffers to descriptor ring + * @ctlq: control queue that requires Rx descriptor ring to be initialized= with + * new Rx buffers + * + * The caller must make sure that calls to libie_ctlq_post_rx_buffs() + * and libie_ctlq_recv() for separate queues are either serialized + * or used under ctlq->lock. + * + * Return: %0 on success, -%ENOMEM if any buffer could not be allocated + */ +int libie_ctlq_post_rx_buffs(struct libie_ctlq_info *ctlq) +{ + u32 ntp =3D ctlq->next_to_post, ntc =3D ctlq->next_to_clean, num_to_post; + const struct libeth_fq_fp fq =3D { + .pp =3D ctlq->pp, + .fqes =3D ctlq->rx_fqes, + .truesize =3D ctlq->truesize, + .count =3D ctlq->ring_len, + }; + int ret =3D 0; + + num_to_post =3D (ntc > ntp ? 0 : ctlq->ring_len) + ntc - ntp - 1; + + while (num_to_post--) { + dma_addr_t addr; + + addr =3D libeth_rx_alloc(&fq, ntp); + if (unlikely(addr =3D=3D DMA_MAPPING_ERROR)) { + ret =3D -ENOMEM; + goto post_bufs; + } + + libie_ctlq_reset_rx_desc(&ctlq->descs[ntp], addr, fq.truesize); + + if (unlikely(++ntp =3D=3D ctlq->ring_len)) + ntp =3D 0; + } + +post_bufs: + if (likely(ctlq->next_to_post !=3D ntp)) { + ctlq->next_to_post =3D ntp; + + writel(ntp, ctlq->reg.tail); + } + + return ret; +} +EXPORT_SYMBOL_NS_GPL(libie_ctlq_post_rx_buffs, "LIBIE_CP"); + +/** + * libie_ctlq_free_tx_msgs - Free Tx control queue messages + * @ctlq: Tx control queue being destroyed + * @num_msgs: number of messages allocated so far + */ +static void libie_ctlq_free_tx_msgs(struct libie_ctlq_info *ctlq, + u32 num_msgs) +{ + for (u32 i =3D 0; i < num_msgs; i++) + kfree(ctlq->tx_msg[i]); + + kvfree(ctlq->tx_msg); +} + +/** + * libie_ctlq_alloc_tx_msgs - Allocate Tx control queue messages + * @ctlq: Tx control queue being created + * + * Return: %0 on success, -%ENOMEM on allocation error + */ +static int libie_ctlq_alloc_tx_msgs(struct libie_ctlq_info *ctlq) +{ + ctlq->tx_msg =3D kvcalloc(ctlq->ring_len, + sizeof(*ctlq->tx_msg), GFP_KERNEL); + if (!ctlq->tx_msg) + return -ENOMEM; + + for (u32 i =3D 0; i < ctlq->ring_len; i++) { + ctlq->tx_msg[i] =3D kzalloc(sizeof(*ctlq->tx_msg[i]), GFP_KERNEL); + + if (!ctlq->tx_msg[i]) { + libie_ctlq_free_tx_msgs(ctlq, i); + return -ENOMEM; + } + } + + return 0; +} + +/** + * libie_cp_free_dma_mem - Free the previously allocated DMA memory + * @dev: device information + * @mem: DMA memory information + */ +static void libie_cp_free_dma_mem(struct device *dev, + struct libie_cp_dma_mem *mem) +{ + dma_free_coherent(dev, mem->size, mem->va, mem->pa); + mem->va =3D NULL; +} + +/** + * libie_ctlq_dealloc_ring_res - Free memory allocated for control queue + * @ctlq: control queue that requires its ring memory to be freed + * + * Free the memory used by the ring, buffers and other related structures. + */ +static void libie_ctlq_dealloc_ring_res(struct libie_ctlq_info *ctlq) +{ + struct libie_cp_dma_mem *dma =3D &ctlq->ring_mem; + + if (ctlq->type =3D=3D LIBIE_CTLQ_TYPE_TX) + libie_ctlq_free_tx_msgs(ctlq, ctlq->ring_len); + else + libie_ctlq_free_fq(ctlq); + + libie_cp_free_dma_mem(ctlq->dev, dma); +} + +/** + * libie_cp_alloc_dma_mem - Allocate a DMA memory + * @dev: device information + * @mem: memory for DMA information to be stored + * @size: size of the memory to allocate + * + * Return: virtual address of DMA memory or NULL. + */ +static void *libie_cp_alloc_dma_mem(struct device *dev, + struct libie_cp_dma_mem *mem, u32 size) +{ + size =3D ALIGN(size, SZ_4K); + + mem->va =3D dma_alloc_coherent(dev, size, &mem->pa, GFP_KERNEL); + mem->size =3D size; + + return mem->va; +} + +/** + * libie_ctlq_alloc_queue_res - allocate memory for descriptor ring and bu= fs + * @ctlq: control queue that requires its ring resources to be allocated + * + * Return: %0 on success, -%errno on failure + */ +static int libie_ctlq_alloc_queue_res(struct libie_ctlq_info *ctlq) +{ + size_t size =3D array_size(ctlq->ring_len, sizeof(*ctlq->descs)); + struct libie_cp_dma_mem *dma =3D &ctlq->ring_mem; + int err =3D -ENOMEM; + + if (!libie_cp_alloc_dma_mem(ctlq->dev, dma, size)) + return -ENOMEM; + + ctlq->descs =3D dma->va; + + if (ctlq->type =3D=3D LIBIE_CTLQ_TYPE_TX) { + if (libie_ctlq_alloc_tx_msgs(ctlq)) + goto free_dma_mem; + } else { + err =3D libie_ctlq_init_fq(ctlq); + if (err) + goto free_dma_mem; + + err =3D libie_ctlq_post_rx_buffs(ctlq); + if (err) { + libie_ctlq_free_fq(ctlq); + goto free_dma_mem; + } + } + + return 0; + +free_dma_mem: + libie_cp_free_dma_mem(ctlq->dev, dma); + + return err; +} + +/** + * libie_ctlq_init_regs - Initialize control queue registers + * @ctlq: control queue that needs to be initialized + * + * Initialize registers. The caller is expected to have already initialize= d the + * descriptor ring memory and buffer memory. + */ +static void libie_ctlq_init_regs(struct libie_ctlq_info *ctlq) +{ + u32 dword; + + if (ctlq->type =3D=3D VIRTCHNL2_QUEUE_TYPE_RX) + writel(ctlq->ring_len - 1, ctlq->reg.tail); + + writel(0, ctlq->reg.head); + writel(lower_32_bits(ctlq->ring_mem.pa), ctlq->reg.addr_low); + writel(upper_32_bits(ctlq->ring_mem.pa), ctlq->reg.addr_high); + + dword =3D FIELD_PREP(LIBIE_CTLQ_MBX_ATQ_LEN, ctlq->ring_len) | + ctlq->reg.len_ena_mask; + writel(dword, ctlq->reg.len); +} + +/** + * libie_find_ctlq - find the controlq for the given id and type + * @ctx: controlq context structure + * @type: type of controlq to find + * @id: controlq id to find + * + * Return: control queue info pointer on success, NULL on failure + */ +struct libie_ctlq_info *libie_find_ctlq(struct libie_ctlq_ctx *ctx, + enum virtchnl2_queue_type type, + int id) +{ + struct libie_ctlq_info *cq; + + guard(spinlock)(&ctx->ctlqs_lock); + + list_for_each_entry(cq, &ctx->ctlqs, list) + if (cq->qid =3D=3D id && cq->type =3D=3D type) + return cq; + + return NULL; +} +EXPORT_SYMBOL_NS_GPL(libie_find_ctlq, "LIBIE_CP"); + +/** + * libie_ctlq_add - add one control queue + * @ctx: controlq context information + * @qinfo: information that requires for queue creation + * + * Allocate and initialize a control queue and add it to the control queue= list. + * The ctlq parameter will be allocated/initialized and passed back to the + * caller if no errors occur. + * + * Note: libie_ctlq_init must be called prior to any calls to libie_ctlq_a= dd. + * + * Return: added control queue info pointer on success, error pointer on f= ailure + */ +static struct libie_ctlq_info * +libie_ctlq_add(struct libie_ctlq_ctx *ctx, + const struct libie_ctlq_create_info *qinfo) +{ + struct libie_ctlq_info *ctlq; + + if (qinfo->id !=3D LIBIE_CTLQ_MBX_ID) + return ERR_PTR(-EOPNOTSUPP); + + /* libie_ctlq_init was not called */ + scoped_guard(spinlock, &ctx->ctlqs_lock) + if (!ctx->ctlqs.next) + return ERR_PTR(-EINVAL); + + ctlq =3D kvzalloc(sizeof(*ctlq), GFP_KERNEL); + if (!ctlq) + return ERR_PTR(-ENOMEM); + + ctlq->type =3D qinfo->type; + ctlq->qid =3D qinfo->id; + ctlq->ring_len =3D qinfo->len; + ctlq->dev =3D &ctx->mmio_info.pdev->dev; + ctlq->reg =3D qinfo->reg; + + if (libie_ctlq_alloc_queue_res(ctlq)) { + kvfree(ctlq); + return ERR_PTR(-ENOMEM); + } + + libie_ctlq_init_regs(ctlq); + + spin_lock_init(&ctlq->lock); + + scoped_guard(spinlock, &ctx->ctlqs_lock) + list_add(&ctlq->list, &ctx->ctlqs); + + return ctlq; +} + +/** + * libie_ctlq_remove - deallocate and remove specified control queue + * @ctx: libie context information + * @ctlq: specific control queue that needs to be removed + */ +static void libie_ctlq_remove(struct libie_ctlq_ctx *ctx, + struct libie_ctlq_info *ctlq) +{ + scoped_guard(spinlock, &ctx->ctlqs_lock) + list_del(&ctlq->list); + + libie_ctlq_dealloc_ring_res(ctlq); + kvfree(ctlq); +} + +/** + * libie_ctlq_init - main initialization routine for all control queues + * @ctx: libie context information + * @qinfo: array of structs containing info for each queue to be initializ= ed + * @numq: number of queues to initialize + * + * This initializes queue list and adds any number and any type of control + * queues. This is an all or nothing routine; if one fails, all previously + * allocated queues will be destroyed. This must be called prior to using + * the individual add/remove APIs. + * + * Return: %0 on success, -%errno on failure + */ +int libie_ctlq_init(struct libie_ctlq_ctx *ctx, + const struct libie_ctlq_create_info *qinfo, + u32 numq) +{ + INIT_LIST_HEAD(&ctx->ctlqs); + spin_lock_init(&ctx->ctlqs_lock); + + for (u32 i =3D 0; i < numq; i++) { + struct libie_ctlq_info *ctlq; + + ctlq =3D libie_ctlq_add(ctx, &qinfo[i]); + if (IS_ERR(ctlq)) { + libie_ctlq_deinit(ctx); + return PTR_ERR(ctlq); + } + } + + return 0; +} +EXPORT_SYMBOL_NS_GPL(libie_ctlq_init, "LIBIE_CP"); + +/** + * libie_ctlq_deinit - destroy all control queues + * @ctx: libie CP context information + */ +void libie_ctlq_deinit(struct libie_ctlq_ctx *ctx) +{ + struct libie_ctlq_info *ctlq, *tmp; + + list_for_each_entry_safe(ctlq, tmp, &ctx->ctlqs, list) + libie_ctlq_remove(ctx, ctlq); +} +EXPORT_SYMBOL_NS_GPL(libie_ctlq_deinit, "LIBIE_CP"); + +/** + * libie_ctlq_tx_desc_from_msg - initialize a Tx descriptor from a message + * @desc: descriptor to be initialized + * @msg: filled control queue message + */ +static void libie_ctlq_tx_desc_from_msg(struct libie_ctlq_desc *desc, + const struct libie_ctlq_msg *msg) +{ + const struct libie_cp_dma_mem *dma =3D &msg->send_mem; + u64 qword; + + qword =3D FIELD_PREP(LIBIE_CTLQ_DESC_FLAGS, msg->flags) | + FIELD_PREP(LIBIE_CTLQ_DESC_INFRA_OPCODE, msg->opcode) | + FIELD_PREP(LIBIE_CTLQ_DESC_PFID_VFID, msg->func_id); + desc->qword0 =3D cpu_to_le64(qword); + + qword =3D FIELD_PREP(LIBIE_CTLQ_DESC_VIRTCHNL_OPCODE, + msg->chnl_opcode) | + FIELD_PREP(LIBIE_CTLQ_DESC_VIRTCHNL_MSG_RET_VAL, + msg->chnl_retval); + desc->qword1 =3D cpu_to_le64(qword); + + qword =3D FIELD_PREP(LIBIE_CTLQ_DESC_MSG_PARAM0, msg->param0) | + FIELD_PREP(LIBIE_CTLQ_DESC_SW_COOKIE, + msg->sw_cookie) | + FIELD_PREP(LIBIE_CTLQ_DESC_VIRTCHNL_FLAGS, + msg->virt_flags); + desc->qword2 =3D cpu_to_le64(qword); + + if (likely(msg->data_len)) { + desc->qword0 |=3D + cpu_to_le64(LIBIE_CTLQ_DESC_QWORD0(msg->data_len)); + qword =3D FIELD_PREP(LIBIE_CTLQ_DESC_DATA_ADDR_HIGH, + upper_32_bits(dma->pa)) | + FIELD_PREP(LIBIE_CTLQ_DESC_DATA_ADDR_LOW, + lower_32_bits(dma->pa)); + } else { + qword =3D msg->addr_param; + } + + desc->qword3 =3D cpu_to_le64(qword); +} + +/** + * libie_ctlq_send - send a message to Control Plane or Peer + * @ctlq: specific control queue which is used for sending a message + * @q_msg: array of queue messages to be sent + * @num_q_msg: number of messages to send on control queue + * + * The control queue will hold a reference to each send message until + * the completion for that message has been cleaned. + * + * The caller must hold ctlq->lock. + * + * Return: %0 on success, -%errno on failure. + */ +int libie_ctlq_send(struct libie_ctlq_info *ctlq, + struct libie_ctlq_msg *q_msg, u32 num_q_msg) +{ + u32 num_desc_avail, ntu; + + ntu =3D ctlq->next_to_use; + + num_desc_avail =3D (ctlq->next_to_clean > ntu ? 0 : ctlq->ring_len) + + ctlq->next_to_clean - ntu - 1; + + if (num_desc_avail < num_q_msg) + return -EBUSY; + + for (int i =3D 0; i < num_q_msg; i++) { + struct libie_ctlq_msg *msg =3D &q_msg[i]; + struct libie_ctlq_desc *desc; + + desc =3D &ctlq->descs[ntu]; + libie_ctlq_tx_desc_from_msg(desc, msg); + + if (unlikely(++ntu =3D=3D ctlq->ring_len)) + ntu =3D 0; + } + writel(ntu, ctlq->reg.tail); + ctlq->next_to_use =3D ntu; + + return 0; +} +EXPORT_SYMBOL_NS_GPL(libie_ctlq_send, "LIBIE_CP"); + +/** + * libie_ctlq_fill_rx_msg - fill in a message from Rx descriptor and buffer + * @msg: message to be filled in + * @desc: received descriptor + * @rx_buf: fill queue buffer associated with the descriptor + */ +static void libie_ctlq_fill_rx_msg(struct libie_ctlq_msg *msg, + const struct libie_ctlq_desc *desc, + struct libeth_fqe *rx_buf) +{ + u64 qword =3D le64_to_cpu(desc->qword0); + + msg->flags =3D FIELD_GET(LIBIE_CTLQ_DESC_FLAGS, qword); + msg->opcode =3D FIELD_GET(LIBIE_CTLQ_DESC_INFRA_OPCODE, qword); + msg->data_len =3D FIELD_GET(LIBIE_CTLQ_DESC_DATA_LEN, qword); + msg->hw_retval =3D FIELD_GET(LIBIE_CTLQ_DESC_HW_RETVAL, qword); + + qword =3D le64_to_cpu(desc->qword1); + msg->chnl_opcode =3D + FIELD_GET(LIBIE_CTLQ_DESC_VIRTCHNL_OPCODE, qword); + msg->chnl_retval =3D + FIELD_GET(LIBIE_CTLQ_DESC_VIRTCHNL_MSG_RET_VAL, qword); + + qword =3D le64_to_cpu(desc->qword2); + msg->param0 =3D + FIELD_GET(LIBIE_CTLQ_DESC_MSG_PARAM0, qword); + msg->sw_cookie =3D + FIELD_GET(LIBIE_CTLQ_DESC_SW_COOKIE, qword); + msg->virt_flags =3D + FIELD_GET(LIBIE_CTLQ_DESC_VIRTCHNL_FLAGS, qword); + + if (likely(msg->data_len)) { + msg->recv_mem =3D (struct kvec) { + .iov_base =3D netmem_address(rx_buf->netmem), + .iov_len =3D msg->data_len, + }; + libeth_rx_sync_for_cpu(rx_buf, msg->data_len); + } else { + msg->recv_mem =3D (struct kvec) {}; + msg->addr_param =3D le64_to_cpu(desc->qword3); + page_pool_put_full_netmem(netmem_get_pp(rx_buf->netmem), + rx_buf->netmem, false); + } +} + +/** + * libie_ctlq_recv - receive control queue message call back + * @ctlq: control queue that needs to processed for receive + * @msg: array of received control queue messages on this q; + * needs to be pre-allocated by caller for as many messages as requested + * @num_q_msg: number of messages that can be stored in msg buffer + * + * Called by interrupt handler or polling mechanism. Caller is expected + * to free buffers. + * + * The caller must make sure that calls to libie_ctlq_post_rx_buffs() + * and libie_ctlq_recv() for separate queues are either serialized + * or used under ctlq->lock. + * + * Return: number of messages received + */ +u32 libie_ctlq_recv(struct libie_ctlq_info *ctlq, struct libie_ctlq_msg *m= sg, + u32 num_q_msg) +{ + u32 ntc, i; + + ntc =3D ctlq->next_to_clean; + + for (i =3D 0; i < num_q_msg; i++) { + const struct libie_ctlq_desc *desc =3D &ctlq->descs[ntc]; + struct libeth_fqe *rx_buf =3D &ctlq->rx_fqes[ntc]; + u64 qword; + + qword =3D le64_to_cpu(desc->qword0); + if (!FIELD_GET(LIBIE_CTLQ_DESC_FLAG_DD, qword)) + break; + + dma_rmb(); + + if (unlikely(FIELD_GET(LIBIE_CTLQ_DESC_FLAG_ERR, qword))) + break; + + libie_ctlq_fill_rx_msg(&msg[i], desc, rx_buf); + + if (unlikely(++ntc =3D=3D ctlq->ring_len)) + ntc =3D 0; + } + + ctlq->next_to_clean =3D ntc; + + return i; +} +EXPORT_SYMBOL_NS_GPL(libie_ctlq_recv, "LIBIE_CP"); + +MODULE_DESCRIPTION("Control Plane communication API"); +MODULE_IMPORT_NS("LIBETH"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/intel/libie/controlq.h b/include/linux/intel/lib= ie/controlq.h new file mode 100644 index 000000000000..534508fbb405 --- /dev/null +++ b/include/linux/intel/libie/controlq.h @@ -0,0 +1,249 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2025 Intel Corporation */ + +#ifndef __LIBIE_CONTROLQ_H +#define __LIBIE_CONTROLQ_H + +#include + +#include +#include + +/* Default mailbox control queue */ +#define LIBIE_CTLQ_MBX_ID -1 +#define LIBIE_CTLQ_MAX_BUF_LEN SZ_4K + +#define LIBIE_CTLQ_TYPE_TX 0 +#define LIBIE_CTLQ_TYPE_RX 1 + +/* Opcode used to send controlq message to the control plane */ +#define LIBIE_CTLQ_SEND_MSG_TO_CP 0x801 +#define LIBIE_CTLQ_SEND_MSG_TO_PEER 0x804 + +/** + * struct libie_ctlq_ctx - contains controlq info and MMIO region info + * @mmio_info: MMIO region info structure + * @ctlqs: list that stores all the control queues + * @ctlqs_lock: lock for control queue list + */ +struct libie_ctlq_ctx { + struct libie_mmio_info mmio_info; + struct list_head ctlqs; + spinlock_t ctlqs_lock; /* protects the ctlqs list */ +}; + +/** + * struct libie_ctlq_reg - structure representing virtual addresses of the + * controlq registers and masks + * @head: controlq head register address + * @tail: controlq tail register address + * @len: register address to write controlq length and enable bit + * @addr_high: register address to write the upper 32b of ring physical ad= dress + * @addr_low: register address to write the lower 32b of ring physical add= ress + * @len_mask: mask to read the controlq length + * @len_ena_mask: mask to write the controlq enable bit + * @head_mask: mask to read the head value + */ +struct libie_ctlq_reg { + void __iomem *head; + void __iomem *tail; + void __iomem *len; + void __iomem *addr_high; + void __iomem *addr_low; + u32 len_mask; + u32 len_ena_mask; + u32 head_mask; +}; + +/** + * struct libie_cp_dma_mem - structure for DMA memory + * @va: virtual address + * @pa: physical address + * @size: memory size + */ +struct libie_cp_dma_mem { + void *va; + dma_addr_t pa; + size_t size; +}; + +/** + * struct libie_ctlq_msg - control queue message data + * @flags: refer to 'Flags sub-structure' definitions + * @opcode: infrastructure message opcode + * @data_len: size of the payload + * @func_id: queue id for the secondary mailbox queue, 0 for default mailb= ox + * @hw_retval: execution status from the HW + * @chnl_opcode: virtchnl message opcode + * @chnl_retval: virtchnl return value + * @param0: indirect message raw parameter0 + * @sw_cookie: used to verify the response of the sent virtchnl message + * @virt_flags: virtchnl capability flags + * @addr_param: additional parameters in place of the address, given no bu= ffer + * @recv_mem: virtual address and size of the buffer that contains + * the indirect response + * @send_mem: physical and virtual address of the DMA buffer, + * used for sending + */ +struct libie_ctlq_msg { + u16 flags; + u16 opcode; + u16 data_len; + union { + u16 func_id; + u16 hw_retval; + }; + u32 chnl_opcode; + u32 chnl_retval; + u32 param0; + u16 sw_cookie; + u16 virt_flags; + u64 addr_param; + union { + struct kvec recv_mem; + struct libie_cp_dma_mem send_mem; + }; +}; + +/** + * struct libie_ctlq_create_info - control queue create information + * @type: control queue type (Rx or Tx) + * @id: queue offset passed as input, -1 for default mailbox + * @reg: registers accessed by control queue + * @len: controlq length + */ +struct libie_ctlq_create_info { + enum virtchnl2_queue_type type; + int id; + struct libie_ctlq_reg reg; + u16 len; +}; + +/** + * struct libie_ctlq_info - control queue information + * @list: used to add a controlq to the list of queues in libie_ctlq_ctx + * @type: control queue type + * @qid: queue identifier + * @lock: control queue lock + * @ring_mem: descrtiptor ring DMA memory + * @descs: array of descrtiptors + * @rx_fqes: array of controlq Rx buffers + * @tx_msg: Tx messages sent to hardware + * @reg: registers used by control queue + * @dev: device that owns this control queue + * @pp: page pool for controlq Rx buffers + * @truesize: size to allocate per buffer + * @next_to_use: next available slot to send buffer + * @next_to_clean: next descrtiptor to be cleaned + * @next_to_post: next available slot to post buffers to after receive + * @ring_len: length of the descriptor ring + */ +struct libie_ctlq_info { + struct list_head list; + enum virtchnl2_queue_type type; + int qid; + spinlock_t lock; /* for concurrent processing */ + struct libie_cp_dma_mem ring_mem; + struct libie_ctlq_desc *descs; + union { + struct libeth_fqe *rx_fqes; + struct libie_ctlq_msg **tx_msg; + }; + struct libie_ctlq_reg reg; + struct device *dev; + struct page_pool *pp; + u32 truesize; + u32 next_to_clean; + union { + u32 next_to_use; + u32 next_to_post; + }; + u32 ring_len; +}; + +#define LIBIE_CTLQ_MBX_ATQ_LEN GENMASK(9, 0) + +/* Flags sub-structure + * |0 |1 |2 |3 |4 |5 |6 |7 |8 |9 |10 |11 |12 |13 |14 |15 | + * |DD |CMP|ERR| * RSV * |FTYPE | *RSV* |RD |VFC|BUF| HOST_ID | + */ + /* libie controlq descriptor qword0 details */ +#define LIBIE_CTLQ_DESC_FLAG_DD BIT(0) +#define LIBIE_CTLQ_DESC_FLAG_CMP BIT(1) +#define LIBIE_CTLQ_DESC_FLAG_ERR BIT(2) +#define LIBIE_CTLQ_DESC_FLAG_FTYPE_VM BIT(6) +#define LIBIE_CTLQ_DESC_FLAG_FTYPE_PF BIT(7) +#define LIBIE_CTLQ_DESC_FLAG_FTYPE GENMASK(7, 6) +#define LIBIE_CTLQ_DESC_FLAG_RD BIT(10) +#define LIBIE_CTLQ_DESC_FLAG_VFC BIT(11) +#define LIBIE_CTLQ_DESC_FLAG_BUF BIT(12) +#define LIBIE_CTLQ_DESC_FLAG_HOST_ID GENMASK(15, 13) + +#define LIBIE_CTLQ_DESC_FLAGS GENMASK(15, 0) +#define LIBIE_CTLQ_DESC_INFRA_OPCODE GENMASK_ULL(31, 16) +#define LIBIE_CTLQ_DESC_DATA_LEN GENMASK_ULL(47, 32) +#define LIBIE_CTLQ_DESC_HW_RETVAL GENMASK_ULL(63, 48) + +#define LIBIE_CTLQ_DESC_PFID_VFID GENMASK_ULL(63, 48) + +/* libie controlq descriptor qword1 details */ +#define LIBIE_CTLQ_DESC_VIRTCHNL_OPCODE GENMASK(27, 0) +#define LIBIE_CTLQ_DESC_VIRTCHNL_DESC_TYPE GENMASK_ULL(31, 28) +#define LIBIE_CTLQ_DESC_VIRTCHNL_MSG_RET_VAL GENMASK_ULL(63, 32) + +/* libie controlq descriptor qword2 details */ +#define LIBIE_CTLQ_DESC_MSG_PARAM0 GENMASK_ULL(31, 0) +#define LIBIE_CTLQ_DESC_SW_COOKIE GENMASK_ULL(47, 32) +#define LIBIE_CTLQ_DESC_VIRTCHNL_FLAGS GENMASK_ULL(63, 48) + +/* libie controlq descriptor qword3 details */ +#define LIBIE_CTLQ_DESC_DATA_ADDR_HIGH GENMASK_ULL(31, 0) +#define LIBIE_CTLQ_DESC_DATA_ADDR_LOW GENMASK_ULL(63, 32) + +/** + * struct libie_ctlq_desc - control queue descriptor format + * @qword0: flags, message opcode, data length etc + * @qword1: virtchnl opcode, descriptor type and return value + * @qword2: indirect message parameters + * @qword3: indirect message buffer address + */ +struct libie_ctlq_desc { + __le64 qword0; + __le64 qword1; + __le64 qword2; + __le64 qword3; +}; + +/** + * libie_ctlq_release_rx_buf - Release Rx buffer for a specific control qu= eue + * @rx_buf: Rx buffer to be freed + * + * Driver uses this function to post back the Rx buffer after the usage. + */ +static inline void libie_ctlq_release_rx_buf(struct kvec *rx_buf) +{ + netmem_ref netmem; + + if (!rx_buf->iov_base) + return; + + netmem =3D virt_to_netmem(rx_buf->iov_base); + page_pool_put_full_netmem(netmem_get_pp(netmem), netmem, false); +} + +int libie_ctlq_init(struct libie_ctlq_ctx *ctx, + const struct libie_ctlq_create_info *qinfo, u32 numq); +void libie_ctlq_deinit(struct libie_ctlq_ctx *ctx); + +struct libie_ctlq_info *libie_find_ctlq(struct libie_ctlq_ctx *ctx, + enum virtchnl2_queue_type type, + int id); + +int libie_ctlq_send(struct libie_ctlq_info *ctlq, + struct libie_ctlq_msg *q_msg, u32 num_q_msg); +u32 libie_ctlq_recv(struct libie_ctlq_info *ctlq, struct libie_ctlq_msg *m= sg, + u32 num_q_msg); + +int libie_ctlq_post_rx_buffs(struct libie_ctlq_info *ctlq); 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X-CSE-ConnectionGUID: yZaGD6dHTZqUP025lSFYYw== X-CSE-MsgGUID: 43N9Jt4qTiGEkf2NIUTXlQ== X-IronPort-AV: E=McAfee;i="6800,10657,11616"; a="76846099" X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="76846099" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Nov 2025 05:49:32 -0800 X-CSE-ConnectionGUID: gy64cb9qR+OyidWqFYZA7g== X-CSE-MsgGUID: WmiiTToYTEKKLgU3qDhD5Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="190115716" Received: from irvmail002.ir.intel.com ([10.43.11.120]) by fmviesa007.fm.intel.com with ESMTP; 17 Nov 2025 05:49:25 -0800 Received: from mglak.igk.intel.com (mglak.igk.intel.com [10.237.112.146]) by irvmail002.ir.intel.com (Postfix) with ESMTP id 8D4F737E36; Mon, 17 Nov 2025 13:49:23 +0000 (GMT) From: Larysa Zaremba To: intel-wired-lan@lists.osuosl.org, Tony Nguyen Cc: aleksander.lobakin@intel.com, sridhar.samudrala@intel.com, "Singhai, Anjali" , Michal Swiatkowski , Larysa Zaremba , "Fijalkowski, Maciej" , Emil Tantilov , Madhu Chittim , Josh Hay , "Keller, Jacob E" , jayaprakash.shanmugam@intel.com, natalia.wochtman@intel.com, Jiri Pirko , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Simon Horman , Jonathan Corbet , Richard Cochran , Przemek Kitszel , Andrew Lunn , netdev@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Phani R Burra Subject: [PATCH iwl-next v5 06/15] libie: add bookkeeping support for control queue messages Date: Mon, 17 Nov 2025 14:48:46 +0100 Message-ID: <20251117134912.18566-7-larysa.zaremba@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20251117134912.18566-1-larysa.zaremba@intel.com> References: <20251117134912.18566-1-larysa.zaremba@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Phani R Burra All send control queue messages are allocated/freed in libie itself and tracked with the unique transaction (Xn) ids until they receive response or time out. Responses can be received out of order, therefore transactions are stored in an array and tracked though a bitmap. Pre-allocated DMA memory is used where possible. It reduces the driver overhead in handling memory allocation/free and message timeouts. Reviewed-by: Maciej Fijalkowski Signed-off-by: Phani R Burra Co-developed-by: Victor Raj Signed-off-by: Victor Raj Co-developed-by: Pavan Kumar Linga Signed-off-by: Pavan Kumar Linga Co-developed-by: Larysa Zaremba Signed-off-by: Larysa Zaremba --- drivers/net/ethernet/intel/libie/controlq.c | 579 ++++++++++++++++++++ include/linux/intel/libie/controlq.h | 172 ++++++ 2 files changed, 751 insertions(+) diff --git a/drivers/net/ethernet/intel/libie/controlq.c b/drivers/net/ethe= rnet/intel/libie/controlq.c index 80b0f1c2cc0a..f7097477d007 100644 --- a/drivers/net/ethernet/intel/libie/controlq.c +++ b/drivers/net/ethernet/intel/libie/controlq.c @@ -602,6 +602,585 @@ u32 libie_ctlq_recv(struct libie_ctlq_info *ctlq, str= uct libie_ctlq_msg *msg, } EXPORT_SYMBOL_NS_GPL(libie_ctlq_recv, "LIBIE_CP"); =20 +/** + * libie_ctlq_xn_pop_free - get a free Xn entry from the free list + * @xnm: Xn transaction manager + * + * Retrieve a free Xn entry from the free list. + * + * Return: valid Xn entry pointer or NULL if there are no free Xn entries. + */ +static struct libie_ctlq_xn * +libie_ctlq_xn_pop_free(struct libie_ctlq_xn_manager *xnm) +{ + struct libie_ctlq_xn *xn; + u32 free_idx; + + guard(spinlock)(&xnm->free_xns_bm_lock); + + if (unlikely(xnm->shutdown)) + return NULL; + + free_idx =3D find_next_bit(xnm->free_xns_bm, LIBIE_CTLQ_MAX_XN_ENTRIES, + 0); + if (free_idx =3D=3D LIBIE_CTLQ_MAX_XN_ENTRIES) + return NULL; + + __clear_bit(free_idx, xnm->free_xns_bm); + xn =3D &xnm->ring[free_idx]; + xn->cookie =3D xnm->cookie++; + + return xn; +} + +/** + * __libie_ctlq_xn_push_free - unsafely push a Xn entry into the free list + * @xnm: Xn transaction manager + * @xn: xn entry to be added into the free list + */ +static void __libie_ctlq_xn_push_free(struct libie_ctlq_xn_manager *xnm, + struct libie_ctlq_xn *xn) +{ + __set_bit(xn->index, xnm->free_xns_bm); + + if (likely(!xnm->shutdown)) + return; + + if (bitmap_full(xnm->free_xns_bm, LIBIE_CTLQ_MAX_XN_ENTRIES)) + complete(&xnm->can_destroy); +} + +/** + * libie_ctlq_xn_push_free - push a Xn entry into the free list + * @xnm: Xn transaction manager + * @xn: xn entry to be added into the free list, not locked + * + * Safely add a used Xn entry back to the free list. + */ +static void libie_ctlq_xn_push_free(struct libie_ctlq_xn_manager *xnm, + struct libie_ctlq_xn *xn) +{ + guard(spinlock)(&xnm->free_xns_bm_lock); + + __libie_ctlq_xn_push_free(xnm, xn); +} + +/** + * libie_ctlq_xn_put - put an Xn that will not be used in the current thre= ad + * @xnm: Xn transaction manager + * @xn: async xn entry to be put for now, not locked + * + * If the Xn manager is being shutdown, nothing will handle the related + * async request. + */ +static void libie_ctlq_xn_put(struct libie_ctlq_xn_manager *xnm, + struct libie_ctlq_xn *xn) +{ + guard(spinlock)(&xnm->free_xns_bm_lock); + + if (unlikely(xnm->shutdown)) + __libie_ctlq_xn_push_free(xnm, xn); +} + +/** + * libie_ctlq_xn_deinit_dma - free the DMA memory allocated for send messa= ges + * @dev: device pointer + * @xnm: pointer to the transaction manager + * @num_entries: number of Xn entries to free the DMA for + */ +static void libie_ctlq_xn_deinit_dma(struct device *dev, + struct libie_ctlq_xn_manager *xnm, + u32 num_entries) +{ + for (u32 i =3D 0; i < num_entries; i++) { + struct libie_ctlq_xn *xn =3D &xnm->ring[i]; + + libie_cp_free_dma_mem(dev, xn->dma_mem); + kfree(xn->dma_mem); + } +} + +/** + * libie_ctlq_xn_init_dma - pre-allocate DMA memory for send messages that= use + * stack variables + * @dev: device pointer + * @xnm: pointer to transaction manager + * + * Return: %0 on success or error if memory allocation fails + */ +static int libie_ctlq_xn_init_dma(struct device *dev, + struct libie_ctlq_xn_manager *xnm) +{ + u32 i; + + for (i =3D 0; i < LIBIE_CTLQ_MAX_XN_ENTRIES; i++) { + struct libie_ctlq_xn *xn =3D &xnm->ring[i]; + struct libie_cp_dma_mem *dma_mem; + + dma_mem =3D kzalloc(sizeof(*dma_mem), GFP_KERNEL); + if (!dma_mem) + goto dealloc_dma; + + dma_mem->va =3D libie_cp_alloc_dma_mem(dev, dma_mem, + LIBIE_CTLQ_MAX_BUF_LEN); + if (!dma_mem->va) { + kfree(dma_mem); + goto dealloc_dma; + } + + xn->dma_mem =3D dma_mem; + } + + return 0; + +dealloc_dma: + libie_ctlq_xn_deinit_dma(dev, xnm, i); + + return -ENOMEM; +} + +/** + * libie_ctlq_xn_process_recv - process Xn data in receive message + * @params: Xn receive param information to handle a receive message + * @ctlq_msg: received control queue message + * + * Process a control queue receive message and send a complete event + * notification. + * + * Return: true if a message has been processed, false otherwise. + */ +static bool +libie_ctlq_xn_process_recv(struct libie_ctlq_xn_recv_params *params, + struct libie_ctlq_msg *ctlq_msg) +{ + struct libie_ctlq_xn_manager *xnm =3D params->xnm; + struct libie_ctlq_xn *xn; + u16 msg_cookie, xn_index; + struct kvec *response; + int status; + u16 data; + + data =3D ctlq_msg->sw_cookie; + xn_index =3D FIELD_GET(LIBIE_CTLQ_XN_INDEX_M, data); + msg_cookie =3D FIELD_GET(LIBIE_CTLQ_XN_COOKIE_M, data); + status =3D ctlq_msg->chnl_retval ? -EFAULT : 0; + + xn =3D &xnm->ring[xn_index]; + if (ctlq_msg->chnl_opcode !=3D xn->virtchnl_opcode || + msg_cookie !=3D xn->cookie) + return false; + + spin_lock(&xn->xn_lock); + if (xn->state !=3D LIBIE_CTLQ_XN_ASYNC && + xn->state !=3D LIBIE_CTLQ_XN_WAITING) { + spin_unlock(&xn->xn_lock); + return false; + } + + response =3D &ctlq_msg->recv_mem; + if (xn->state =3D=3D LIBIE_CTLQ_XN_ASYNC) { + xn->resp_cb(xn->send_ctx, response, status); + xn->state =3D LIBIE_CTLQ_XN_IDLE; + spin_unlock(&xn->xn_lock); + libie_ctlq_xn_push_free(xnm, xn); + + return true; + } + + xn->recv_mem =3D *response; + xn->state =3D status ? LIBIE_CTLQ_XN_COMPLETED_FAILED : + LIBIE_CTLQ_XN_COMPLETED_SUCCESS; + + complete(&xn->cmd_completion_event); + spin_unlock(&xn->xn_lock); + + return true; +} + +/** + * libie_xn_check_async_timeout - Check for asynchronous message timeouts + * @xnm: Xn transaction manager + * + * Call the corresponding callback to notify the caller about the timeout. + */ +static void libie_xn_check_async_timeout(struct libie_ctlq_xn_manager *xnm) +{ + u32 idx; + + for_each_clear_bit(idx, xnm->free_xns_bm, LIBIE_CTLQ_MAX_XN_ENTRIES) { + struct libie_ctlq_xn *xn =3D &xnm->ring[idx]; + u64 timeout_ms; + + spin_lock(&xn->xn_lock); + + timeout_ms =3D ktime_ms_delta(ktime_get(), xn->timestamp); + if (xn->state !=3D LIBIE_CTLQ_XN_ASYNC || + timeout_ms < xn->timeout_ms) { + spin_unlock(&xn->xn_lock); + continue; + } + + xn->resp_cb(xn->send_ctx, NULL, -ETIMEDOUT); + xn->state =3D LIBIE_CTLQ_XN_IDLE; + spin_unlock(&xn->xn_lock); + libie_ctlq_xn_push_free(xnm, xn); + } +} + +/** + * libie_ctlq_xn_recv - process control queue receive message + * @params: Xn receive param information to handle a receive message + * + * Process a receive message and update the receive queue buffer. + * + * Return: remaining budget. + */ +u32 libie_ctlq_xn_recv(struct libie_ctlq_xn_recv_params *params) +{ + struct libie_ctlq_msg ctlq_msg; + u32 budget =3D params->budget; + + while (budget && libie_ctlq_recv(params->ctlq, &ctlq_msg, 1)) { + budget--; + if (!libie_ctlq_xn_process_recv(params, &ctlq_msg)) + params->ctlq_msg_handler(params->xnm->ctx, &ctlq_msg); + } + + libie_ctlq_post_rx_buffs(params->ctlq); + libie_xn_check_async_timeout(params->xnm); + + return budget; +} +EXPORT_SYMBOL_NS_GPL(libie_ctlq_xn_recv, "LIBIE_CP"); + +/** + * libie_cp_map_dma_mem - map a given virtual address for DMA + * @dev: device information + * @va: virtual address to be mapped + * @size: size of the memory + * @direction: DMA direction either from/to device + * @dma_mem: memory for DMA information to be stored + * + * Return: true on success, false on DMA map failure. + */ +static bool libie_cp_map_dma_mem(struct device *dev, void *va, size_t size, + int direction, + struct libie_cp_dma_mem *dma_mem) +{ + dma_mem->pa =3D dma_map_single(dev, va, size, direction); + + return dma_mapping_error(dev, dma_mem->pa) ? false : true; +} + +/** + * libie_cp_unmap_dma_mem - unmap previously mapped DMA address + * @dev: device information + * @dma_mem: DMA memory information + */ +static void libie_cp_unmap_dma_mem(struct device *dev, + const struct libie_cp_dma_mem *dma_mem) +{ + dma_unmap_single(dev, dma_mem->pa, dma_mem->size, + dma_mem->direction); +} + +/** + * libie_ctlq_xn_process_send - process and send a control queue message + * @params: Xn send param information for sending a control queue message + * @xn: Assigned Xn entry for tracking the control queue message + * + * Return: %0 on success, -%errno on failure. + */ +static +int libie_ctlq_xn_process_send(struct libie_ctlq_xn_send_params *params, + struct libie_ctlq_xn *xn) +{ + size_t buf_len =3D params->send_buf.iov_len; + struct device *dev =3D params->ctlq->dev; + void *buf =3D params->send_buf.iov_base; + struct libie_cp_dma_mem *dma_mem; + u16 cookie; + int ret; + + if (!buf || !buf_len) + return -EOPNOTSUPP; + + if (libie_cp_can_send_onstack(buf_len)) { + dma_mem =3D xn->dma_mem; + memcpy(dma_mem->va, buf, buf_len); + } else { + dma_mem =3D &xn->send_dma_mem; + dma_mem->va =3D buf; + dma_mem->size =3D buf_len; + dma_mem->direction =3D DMA_TO_DEVICE; + + if (!libie_cp_map_dma_mem(dev, buf, buf_len, DMA_TO_DEVICE, + dma_mem)) + return -ENOMEM; + } + + cookie =3D FIELD_PREP(LIBIE_CTLQ_XN_COOKIE_M, xn->cookie) | + FIELD_PREP(LIBIE_CTLQ_XN_INDEX_M, xn->index); + + scoped_guard(spinlock, ¶ms->ctlq->lock) { + if (!params->ctlq_msg || params->resp_cb) { + struct libie_ctlq_info *ctlq =3D params->ctlq; + + *ctlq->tx_msg[ctlq->next_to_use] =3D + params->ctlq_msg ? *params->ctlq_msg : + (struct libie_ctlq_msg) { + .opcode =3D LIBIE_CTLQ_SEND_MSG_TO_CP + }; + params->ctlq_msg =3D ctlq->tx_msg[ctlq->next_to_use]; + } + + params->ctlq_msg->sw_cookie =3D cookie; + params->ctlq_msg->send_mem =3D *dma_mem; + params->ctlq_msg->data_len =3D buf_len; + params->ctlq_msg->chnl_opcode =3D params->chnl_opcode; + ret =3D libie_ctlq_send(params->ctlq, params->ctlq_msg, 1); + } + + if (ret && !libie_cp_can_send_onstack(buf_len)) + libie_cp_unmap_dma_mem(dev, dma_mem); + + return ret; +} + +/** + * libie_ctlq_xn_send - Function to send a control queue message + * @params: Xn send param information for sending a control queue message + * + * Send a control queue (mailbox or config) message. + * Based on the params value, the call can be completed synchronously or + * asynchronously. + * + * Return: %0 on success, -%errno on failure. + */ +int libie_ctlq_xn_send(struct libie_ctlq_xn_send_params *params) +{ + bool free_send =3D !libie_cp_can_send_onstack(params->send_buf.iov_len); + struct libie_ctlq_xn *xn; + int ret; + + if (params->send_buf.iov_len > LIBIE_CTLQ_MAX_BUF_LEN) { + ret =3D -EINVAL; + goto free_buf; + } + + xn =3D libie_ctlq_xn_pop_free(params->xnm); + /* no free transactions available */ + if (unlikely(!xn)) { + ret =3D -EAGAIN; + goto free_buf; + } + + spin_lock(&xn->xn_lock); + + xn->state =3D params->resp_cb ? LIBIE_CTLQ_XN_ASYNC : + LIBIE_CTLQ_XN_WAITING; + xn->ctlq =3D params->ctlq; + xn->virtchnl_opcode =3D params->chnl_opcode; + + if (params->resp_cb) { + xn->send_ctx =3D params->send_ctx; + xn->resp_cb =3D params->resp_cb; + xn->timeout_ms =3D params->timeout_ms; + xn->timestamp =3D ktime_get(); + } + + ret =3D libie_ctlq_xn_process_send(params, xn); + if (ret) + goto release_xn; + else + free_send =3D false; + + spin_unlock(&xn->xn_lock); + + if (params->resp_cb) { + libie_ctlq_xn_put(params->xnm, xn); + return 0; + } + + wait_for_completion_timeout(&xn->cmd_completion_event, + msecs_to_jiffies(params->timeout_ms)); + + spin_lock(&xn->xn_lock); + switch (xn->state) { + case LIBIE_CTLQ_XN_WAITING: + ret =3D -ETIMEDOUT; + break; + case LIBIE_CTLQ_XN_COMPLETED_SUCCESS: + params->recv_mem =3D xn->recv_mem; + break; + default: + ret =3D -EBADMSG; + break; + } + + /* Free the receive buffer in case of failure. On timeout, receive + * buffer is not allocated. + */ + if (ret && ret !=3D -ETIMEDOUT) + libie_ctlq_release_rx_buf(&xn->recv_mem); + +release_xn: + xn->state =3D LIBIE_CTLQ_XN_IDLE; + reinit_completion(&xn->cmd_completion_event); + spin_unlock(&xn->xn_lock); + libie_ctlq_xn_push_free(params->xnm, xn); +free_buf: + if (free_send) + params->rel_tx_buf(params->send_buf.iov_base); + + return ret; +} +EXPORT_SYMBOL_NS_GPL(libie_ctlq_xn_send, "LIBIE_CP"); + +/** + * libie_ctlq_xn_send_clean - cleanup the send control queue message buffe= rs + * @params: Xn clean param information for send complete handling + * + * Cleanup the send buffers for the given control queue, if force is set, = then + * clear all the outstanding send messages irrrespective their send status. + * Force should be used during deinit or reset. + * + * Return: number of send buffers cleaned. + */ +u32 libie_ctlq_xn_send_clean(const struct libie_ctlq_xn_clean_params *para= ms) +{ + struct libie_ctlq_info *ctlq =3D params->ctlq; + struct device *dev =3D ctlq->dev; + u32 ntc, i; + + spin_lock(&ctlq->lock); + ntc =3D ctlq->next_to_clean; + + for (i =3D 0; i < params->num_msgs; i++) { + struct libie_ctlq_msg *msg =3D ctlq->tx_msg[ntc]; + struct libie_ctlq_desc *desc; + u64 qword; + + desc =3D &ctlq->descs[ntc]; + qword =3D le64_to_cpu(desc->qword0); + + if (!FIELD_GET(LIBIE_CTLQ_DESC_FLAG_DD, qword)) + break; + + dma_rmb(); + + if (!libie_cp_can_send_onstack(msg->data_len)) { + libie_cp_unmap_dma_mem(dev, &msg->send_mem); + params->rel_tx_buf(msg->send_mem.va); + } + + memset(msg, 0, sizeof(*msg)); + desc->qword0 =3D 0; + + if (unlikely(++ntc =3D=3D ctlq->ring_len)) + ntc =3D 0; + } + + ctlq->next_to_clean =3D ntc; + spin_unlock(&ctlq->lock); + + return i; +} +EXPORT_SYMBOL_NS_GPL(libie_ctlq_xn_send_clean, "LIBIE_CP"); + +/** + * libie_ctlq_xn_deinit - deallocate and free the transaction manager reso= urces + * @xnm: pointer to the transaction manager + * @ctx: controlq context structure + * + * All Rx processing must be stopped beforehand. + */ +void libie_ctlq_xn_deinit(struct libie_ctlq_xn_manager *xnm, + struct libie_ctlq_ctx *ctx) +{ + bool must_wait =3D false; + u32 i; + + /* Should be no new clear bits after this */ + spin_lock(&xnm->free_xns_bm_lock); + xnm->shutdown =3D true; + + for_each_clear_bit(i, xnm->free_xns_bm, LIBIE_CTLQ_MAX_XN_ENTRIES) { + struct libie_ctlq_xn *xn =3D &xnm->ring[i]; + + spin_lock(&xn->xn_lock); + + if (xn->state =3D=3D LIBIE_CTLQ_XN_WAITING || + xn->state =3D=3D LIBIE_CTLQ_XN_IDLE) { + complete(&xn->cmd_completion_event); + must_wait =3D true; + } else if (xn->state =3D=3D LIBIE_CTLQ_XN_ASYNC) { + __libie_ctlq_xn_push_free(xnm, xn); + } + + spin_unlock(&xn->xn_lock); + } + + spin_unlock(&xnm->free_xns_bm_lock); + + if (must_wait) + wait_for_completion(&xnm->can_destroy); + + libie_ctlq_xn_deinit_dma(&ctx->mmio_info.pdev->dev, xnm, + LIBIE_CTLQ_MAX_XN_ENTRIES); + kfree(xnm); + libie_ctlq_deinit(ctx); +} +EXPORT_SYMBOL_NS_GPL(libie_ctlq_xn_deinit, "LIBIE_CP"); + +/** + * libie_ctlq_xn_init - initialize the Xn transaction manager + * @params: Xn init param information for allocating Xn manager resources + * + * Return: %0 on success, -%errno on failure. + */ +int libie_ctlq_xn_init(struct libie_ctlq_xn_init_params *params) +{ + struct libie_ctlq_xn_manager *xnm; + int ret; + + ret =3D libie_ctlq_init(params->ctx, params->cctlq_info, params->num_qs); + if (ret) + return ret; + + xnm =3D kzalloc(sizeof(*xnm), GFP_KERNEL); + if (!xnm) + goto ctlq_deinit; + + ret =3D libie_ctlq_xn_init_dma(¶ms->ctx->mmio_info.pdev->dev, xnm); + if (ret) + goto free_xnm; + + spin_lock_init(&xnm->free_xns_bm_lock); + init_completion(&xnm->can_destroy); + bitmap_fill(xnm->free_xns_bm, LIBIE_CTLQ_MAX_XN_ENTRIES); + + for (u32 i =3D 0; i < LIBIE_CTLQ_MAX_XN_ENTRIES; i++) { + struct libie_ctlq_xn *xn =3D &xnm->ring[i]; + + xn->index =3D i; + init_completion(&xn->cmd_completion_event); + spin_lock_init(&xn->xn_lock); + } + xnm->ctx =3D params->ctx; + params->xnm =3D xnm; + + return 0; + +free_xnm: + kfree(xnm); +ctlq_deinit: + libie_ctlq_deinit(params->ctx); + + return -ENOMEM; +} +EXPORT_SYMBOL_NS_GPL(libie_ctlq_xn_init, "LIBIE_CP"); + MODULE_DESCRIPTION("Control Plane communication API"); MODULE_IMPORT_NS("LIBETH"); MODULE_LICENSE("GPL"); diff --git a/include/linux/intel/libie/controlq.h b/include/linux/intel/lib= ie/controlq.h index 534508fbb405..4a627670814e 100644 --- a/include/linux/intel/libie/controlq.h +++ b/include/linux/intel/libie/controlq.h @@ -20,6 +20,8 @@ #define LIBIE_CTLQ_SEND_MSG_TO_CP 0x801 #define LIBIE_CTLQ_SEND_MSG_TO_PEER 0x804 =20 +#define LIBIE_CP_TX_COPYBREAK 128 + /** * struct libie_ctlq_ctx - contains controlq info and MMIO region info * @mmio_info: MMIO region info structure @@ -60,11 +62,13 @@ struct libie_ctlq_reg { * @va: virtual address * @pa: physical address * @size: memory size + * @direction: memory to device or device to memory */ struct libie_cp_dma_mem { void *va; dma_addr_t pa; size_t size; + int direction; }; =20 /** @@ -246,4 +250,172 @@ u32 libie_ctlq_recv(struct libie_ctlq_info *ctlq, str= uct libie_ctlq_msg *msg, =20 int libie_ctlq_post_rx_buffs(struct libie_ctlq_info *ctlq); =20 +/* Only 8 bits are available in descriptor for Xn index */ +#define LIBIE_CTLQ_MAX_XN_ENTRIES 256 +#define LIBIE_CTLQ_XN_COOKIE_M GENMASK(15, 8) +#define LIBIE_CTLQ_XN_INDEX_M GENMASK(7, 0) + +/** + * enum libie_ctlq_xn_state - Transaction state of a virtchnl message + * @LIBIE_CTLQ_XN_IDLE: transaction is available to use + * @LIBIE_CTLQ_XN_WAITING: waiting for transaction to complete + * @LIBIE_CTLQ_XN_COMPLETED_SUCCESS: transaction completed with success + * @LIBIE_CTLQ_XN_COMPLETED_FAILED: transaction completed with failure + * @LIBIE_CTLQ_XN_ASYNC: asynchronous virtchnl message transaction type + */ +enum libie_ctlq_xn_state { + LIBIE_CTLQ_XN_IDLE =3D 0, + LIBIE_CTLQ_XN_WAITING, + LIBIE_CTLQ_XN_COMPLETED_SUCCESS, + LIBIE_CTLQ_XN_COMPLETED_FAILED, + LIBIE_CTLQ_XN_ASYNC, +}; + +/** + * struct libie_ctlq_xn - structure representing a virtchnl transaction en= try + * @resp_cb: callback to handle the response of an asynchronous virtchnl m= essage + * @xn_lock: lock to protect the transaction entry state + * @ctlq: send control queue information + * @cmd_completion_event: signal when a reply is available + * @dma_mem: DMA memory of send buffer that use stack variable + * @send_dma_mem: DMA memory of send buffer + * @recv_mem: receive buffer + * @send_ctx: context for callback function + * @timeout_ms: Xn transaction timeout in msecs + * @timestamp: timestamp to record the Xn send + * @virtchnl_opcode: virtchnl command opcode used for Xn transaction + * @state: transaction state of a virtchnl message + * @cookie: unique message identifier + * @index: index of the transaction entry + */ +struct libie_ctlq_xn { + void (*resp_cb)(void *ctx, struct kvec *mem, int status); + spinlock_t xn_lock; /* protects state */ + struct libie_ctlq_info *ctlq; + struct completion cmd_completion_event; + struct libie_cp_dma_mem *dma_mem; + struct libie_cp_dma_mem send_dma_mem; + struct kvec recv_mem; + void *send_ctx; + u64 timeout_ms; + ktime_t timestamp; + u32 virtchnl_opcode; + enum libie_ctlq_xn_state state; + u8 cookie; + u8 index; +}; + +/** + * struct libie_ctlq_xn_manager - structure representing the array of virt= chnl + * transaction entries + * @ctx: pointer to controlq context structure + * @free_xns_bm_lock: lock to protect the free Xn entries bit map + * @free_xns_bm: bitmap that represents the free Xn entries + * @ring: array of Xn entries + * @can_destroy: completion triggered by the last returned transaction + * @shutdown: shows the transactions the xnm shutdown is waiting for them + * @cookie: unique message identifier + */ +struct libie_ctlq_xn_manager { + struct libie_ctlq_ctx *ctx; + spinlock_t free_xns_bm_lock; /* get/check entries */ + DECLARE_BITMAP(free_xns_bm, LIBIE_CTLQ_MAX_XN_ENTRIES); + struct libie_ctlq_xn ring[LIBIE_CTLQ_MAX_XN_ENTRIES]; + struct completion can_destroy; + bool shutdown; + u8 cookie; +}; + +/** + * struct libie_ctlq_xn_send_params - structure representing send Xn entry + * @resp_cb: callback to handle the response of an asynchronous virtchnl m= essage + * @rel_tx_buf: driver entry point for freeing the send buffer after send + * @xnm: Xn manager to process Xn entries + * @ctlq: send control queue information + * @ctlq_msg: control queue message information + * @send_buf: represents the buffer that carries outgoing information + * @recv_mem: receive buffer + * @send_ctx: context for call back function + * @timeout_ms: virtchnl transaction timeout in msecs + * @chnl_opcode: virtchnl message opcode + */ +struct libie_ctlq_xn_send_params { + void (*resp_cb)(void *ctx, struct kvec *mem, int status); + void (*rel_tx_buf)(const void *buf_va); + struct libie_ctlq_xn_manager *xnm; + struct libie_ctlq_info *ctlq; + struct libie_ctlq_msg *ctlq_msg; + struct kvec send_buf; + struct kvec recv_mem; + void *send_ctx; + u64 timeout_ms; + u32 chnl_opcode; +}; + +/** + * libie_cp_can_send_onstack - can a message be sent using a stack variable + * @size: ctlq data buffer size + * + * Return: %true if the message size is small enough for caller to pass + * an on-stack buffer, %false if kmalloc is needed + */ +static inline bool libie_cp_can_send_onstack(u32 size) +{ + return size <=3D LIBIE_CP_TX_COPYBREAK; +} + +/** + * struct libie_ctlq_xn_recv_params - structure representing receive Xn en= try + * @ctlq_msg_handler: callback to handle a message originated from the peer + * @xnm: Xn manager to process Xn entries + * @ctlq: control queue information + * @budget: maximum number of messages to process + */ +struct libie_ctlq_xn_recv_params { + void (*ctlq_msg_handler)(struct libie_ctlq_ctx *ctx, + struct libie_ctlq_msg *msg); + struct libie_ctlq_xn_manager *xnm; + struct libie_ctlq_info *ctlq; + u32 budget; +}; + +/** + * struct libie_ctlq_xn_clean_params - Data structure used for cleaning the + * control queue messages + * @rel_tx_buf: driver entry point for freeing the send buffer after send + * @ctx: pointer to context structure + * @ctlq: control queue information + * @send_ctx: context for call back function + * @num_msgs: number of messages to be cleaned + */ +struct libie_ctlq_xn_clean_params { + void (*rel_tx_buf)(const void *buf_va); + struct libie_ctlq_ctx *ctx; + struct libie_ctlq_info *ctlq; + void *send_ctx; + u16 num_msgs; +}; + +/** + * struct libie_ctlq_xn_init_params - Data structure used for initializing= the + * Xn transaction manager + * @cctlq_info: control queue information + * @ctx: pointer to controlq context structure + * @xnm: Xn manager to process Xn entries + * @num_qs: number of control queues needs to initialized + */ +struct libie_ctlq_xn_init_params { + struct libie_ctlq_create_info *cctlq_info; + struct libie_ctlq_ctx *ctx; + struct libie_ctlq_xn_manager *xnm; + u32 num_qs; +}; + +int libie_ctlq_xn_init(struct libie_ctlq_xn_init_params *params); +void libie_ctlq_xn_deinit(struct libie_ctlq_xn_manager *xnm, + struct libie_ctlq_ctx *ctx); +int libie_ctlq_xn_send(struct libie_ctlq_xn_send_params *params); +u32 libie_ctlq_xn_recv(struct libie_ctlq_xn_recv_params *params); +u32 libie_ctlq_xn_send_clean(const struct libie_ctlq_xn_clean_params *para= ms); + #endif /* __LIBIE_CONTROLQ_H */ --=20 2.47.0 From nobody Tue Dec 2 02:51:45 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 56B9F335BC6; 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a="76846114" X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="76846114" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Nov 2025 05:49:32 -0800 X-CSE-ConnectionGUID: Goufk0rKSwGVslBcXLfDtA== X-CSE-MsgGUID: WnZwOg0/SvK4pn8ETbY8gA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="190115719" Received: from irvmail002.ir.intel.com ([10.43.11.120]) by fmviesa007.fm.intel.com with ESMTP; 17 Nov 2025 05:49:27 -0800 Received: from mglak.igk.intel.com (mglak.igk.intel.com [10.237.112.146]) by irvmail002.ir.intel.com (Postfix) with ESMTP id 6703737E39; Mon, 17 Nov 2025 13:49:25 +0000 (GMT) From: Larysa Zaremba To: intel-wired-lan@lists.osuosl.org, Tony Nguyen Cc: aleksander.lobakin@intel.com, sridhar.samudrala@intel.com, "Singhai, Anjali" , Michal Swiatkowski , Larysa Zaremba , "Fijalkowski, Maciej" , Emil Tantilov , Madhu Chittim , Josh Hay , "Keller, Jacob E" , jayaprakash.shanmugam@intel.com, natalia.wochtman@intel.com, Jiri Pirko , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Simon Horman , Jonathan Corbet , Richard Cochran , Przemek Kitszel , Andrew Lunn , netdev@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH iwl-next v5 07/15] idpf: remove 'vport_params_reqd' field Date: Mon, 17 Nov 2025 14:48:47 +0100 Message-ID: <20251117134912.18566-8-larysa.zaremba@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20251117134912.18566-1-larysa.zaremba@intel.com> References: <20251117134912.18566-1-larysa.zaremba@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Pavan Kumar Linga While sending a create vport message to the device control plane, a create vport virtchnl message is prepared with all the required info to initialize the vport. This info is stored in the adapter struct but never used thereafter. So, remove the said field. Signed-off-by: Pavan Kumar Linga Reviewed-by: Maciej Fijalkowski Reviewed-by: Madhu Chittim Signed-off-by: Larysa Zaremba --- drivers/net/ethernet/intel/idpf/idpf.h | 2 -- drivers/net/ethernet/intel/idpf/idpf_lib.c | 2 -- .../net/ethernet/intel/idpf/idpf_virtchnl.c | 31 ++++++------------- 3 files changed, 10 insertions(+), 25 deletions(-) diff --git a/drivers/net/ethernet/intel/idpf/idpf.h b/drivers/net/ethernet/= intel/idpf/idpf.h index 78e55baf4600..1a1ea3fef092 100644 --- a/drivers/net/ethernet/intel/idpf/idpf.h +++ b/drivers/net/ethernet/intel/idpf/idpf.h @@ -638,7 +638,6 @@ struct idpf_vc_xn_manager; * @avail_queues: Device given queue limits * @vports: Array to store vports created by the driver * @netdevs: Associated Vport netdevs - * @vport_params_reqd: Vport params requested * @vport_params_recvd: Vport params received * @vport_ids: Array of device given vport identifiers * @singleq_pt_lkup: Lookup table for singleq RX ptypes @@ -697,7 +696,6 @@ struct idpf_adapter { struct idpf_avail_queue_info avail_queues; struct idpf_vport **vports; struct net_device **netdevs; - struct virtchnl2_create_vport **vport_params_reqd; struct virtchnl2_create_vport **vport_params_recvd; u32 *vport_ids; =20 diff --git a/drivers/net/ethernet/intel/idpf/idpf_lib.c b/drivers/net/ether= net/intel/idpf/idpf_lib.c index 36a53c9e08c2..dca7861a0a2a 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_lib.c +++ b/drivers/net/ethernet/intel/idpf/idpf_lib.c @@ -1111,8 +1111,6 @@ static void idpf_vport_rel(struct idpf_vport *vport) =20 kfree(adapter->vport_params_recvd[idx]); adapter->vport_params_recvd[idx] =3D NULL; - kfree(adapter->vport_params_reqd[idx]); - adapter->vport_params_reqd[idx] =3D NULL; =20 kfree(vport); adapter->num_alloc_vports--; diff --git a/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c b/drivers/net/= ethernet/intel/idpf/idpf_virtchnl.c index a53689885c8c..eb834f29ff77 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c +++ b/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c @@ -1548,14 +1548,10 @@ int idpf_send_create_vport_msg(struct idpf_adapter = *adapter, ssize_t reply_sz; =20 buf_size =3D sizeof(struct virtchnl2_create_vport); - if (!adapter->vport_params_reqd[idx]) { - adapter->vport_params_reqd[idx] =3D kzalloc(buf_size, - GFP_KERNEL); - if (!adapter->vport_params_reqd[idx]) - return -ENOMEM; - } + vport_msg =3D kzalloc(buf_size, GFP_KERNEL); + if (!vport_msg) + return -ENOMEM; =20 - vport_msg =3D adapter->vport_params_reqd[idx]; vport_msg->vport_type =3D cpu_to_le16(VIRTCHNL2_VPORT_TYPE_DEFAULT); vport_msg->vport_index =3D cpu_to_le16(idx); =20 @@ -1572,8 +1568,7 @@ int idpf_send_create_vport_msg(struct idpf_adapter *a= dapter, err =3D idpf_vport_calc_total_qs(adapter, idx, vport_msg, max_q); if (err) { dev_err(&adapter->pdev->dev, "Enough queues are not available"); - - return err; + goto rel_buf; } =20 if (!adapter->vport_params_recvd[idx]) { @@ -1581,7 +1576,7 @@ int idpf_send_create_vport_msg(struct idpf_adapter *a= dapter, GFP_KERNEL); if (!adapter->vport_params_recvd[idx]) { err =3D -ENOMEM; - goto free_vport_params; + goto rel_buf; } } =20 @@ -1597,13 +1592,15 @@ int idpf_send_create_vport_msg(struct idpf_adapter = *adapter, goto free_vport_params; } =20 + kfree(vport_msg); + return 0; =20 free_vport_params: kfree(adapter->vport_params_recvd[idx]); adapter->vport_params_recvd[idx] =3D NULL; - kfree(adapter->vport_params_reqd[idx]); - adapter->vport_params_reqd[idx] =3D NULL; +rel_buf: + kfree(vport_msg); =20 return err; } @@ -3401,8 +3398,6 @@ static void idpf_vport_params_buf_rel(struct idpf_ada= pter *adapter) { kfree(adapter->vport_params_recvd); adapter->vport_params_recvd =3D NULL; - kfree(adapter->vport_params_reqd); - adapter->vport_params_reqd =3D NULL; kfree(adapter->vport_ids); adapter->vport_ids =3D NULL; } @@ -3417,17 +3412,11 @@ static int idpf_vport_params_buf_alloc(struct idpf_= adapter *adapter) { u16 num_max_vports =3D idpf_get_max_vports(adapter); =20 - adapter->vport_params_reqd =3D kcalloc(num_max_vports, - sizeof(*adapter->vport_params_reqd), - GFP_KERNEL); - if (!adapter->vport_params_reqd) - return -ENOMEM; - adapter->vport_params_recvd =3D kcalloc(num_max_vports, sizeof(*adapter->vport_params_recvd), GFP_KERNEL); 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17 Nov 2025 05:49:29 -0800 Received: from mglak.igk.intel.com (mglak.igk.intel.com [10.237.112.146]) by irvmail002.ir.intel.com (Postfix) with ESMTP id 10FD137E3A; Mon, 17 Nov 2025 13:49:27 +0000 (GMT) From: Larysa Zaremba To: intel-wired-lan@lists.osuosl.org, Tony Nguyen Cc: aleksander.lobakin@intel.com, sridhar.samudrala@intel.com, "Singhai, Anjali" , Michal Swiatkowski , Larysa Zaremba , "Fijalkowski, Maciej" , Emil Tantilov , Madhu Chittim , Josh Hay , "Keller, Jacob E" , jayaprakash.shanmugam@intel.com, natalia.wochtman@intel.com, Jiri Pirko , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Simon Horman , Jonathan Corbet , Richard Cochran , Przemek Kitszel , Andrew Lunn , netdev@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH iwl-next v5 08/15] idpf: refactor idpf to use libie_pci APIs Date: Mon, 17 Nov 2025 14:48:48 +0100 Message-ID: <20251117134912.18566-9-larysa.zaremba@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20251117134912.18566-1-larysa.zaremba@intel.com> References: <20251117134912.18566-1-larysa.zaremba@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Pavan Kumar Linga Use libie_pci init and MMIO APIs where possible, struct idpf_hw cannot be deleted for now as it also houses control queues that will be refactored later. Use libie_cp header for libie_ctlq_ctx that contains mmio info from the start in order to not increase the diff later. Reviewed-by: Madhu Chittim Reviewed-by: Sridhar Samudrala Signed-off-by: Pavan Kumar Linga Co-developed-by: Larysa Zaremba Signed-off-by: Larysa Zaremba --- drivers/net/ethernet/intel/idpf/Kconfig | 1 + drivers/net/ethernet/intel/idpf/idpf.h | 70 +------- .../net/ethernet/intel/idpf/idpf_controlq.c | 26 ++- .../net/ethernet/intel/idpf/idpf_controlq.h | 2 - drivers/net/ethernet/intel/idpf/idpf_dev.c | 61 +++---- drivers/net/ethernet/intel/idpf/idpf_idc.c | 38 +++-- drivers/net/ethernet/intel/idpf/idpf_lib.c | 7 +- drivers/net/ethernet/intel/idpf/idpf_main.c | 111 ++++++------ drivers/net/ethernet/intel/idpf/idpf_vf_dev.c | 32 ++-- .../net/ethernet/intel/idpf/idpf_virtchnl.c | 158 ++++++++---------- .../ethernet/intel/idpf/idpf_virtchnl_ptp.c | 58 ++++--- 11 files changed, 264 insertions(+), 300 deletions(-) diff --git a/drivers/net/ethernet/intel/idpf/Kconfig b/drivers/net/ethernet= /intel/idpf/Kconfig index adab2154125b..586df3a4afe9 100644 --- a/drivers/net/ethernet/intel/idpf/Kconfig +++ b/drivers/net/ethernet/intel/idpf/Kconfig @@ -6,6 +6,7 @@ config IDPF depends on PCI_MSI depends on PTP_1588_CLOCK_OPTIONAL select DIMLIB + select LIBIE_CP select LIBETH_XDP help This driver supports Intel(R) Infrastructure Data Path Function diff --git a/drivers/net/ethernet/intel/idpf/idpf.h b/drivers/net/ethernet/= intel/idpf/idpf.h index 1a1ea3fef092..dfa7618ed261 100644 --- a/drivers/net/ethernet/intel/idpf/idpf.h +++ b/drivers/net/ethernet/intel/idpf/idpf.h @@ -23,6 +23,7 @@ struct idpf_rss_data; =20 #include #include +#include #include =20 #include "idpf_txrx.h" @@ -625,6 +626,7 @@ struct idpf_vc_xn_manager; * @flags: See enum idpf_flags * @reset_reg: See struct idpf_reset_reg * @hw: Device access data + * @ctlq_ctx: controlq context * @num_avail_msix: Available number of MSIX vectors * @num_msix_entries: Number of entries in MSIX table * @msix_entries: MSIX table @@ -682,6 +684,7 @@ struct idpf_adapter { DECLARE_BITMAP(flags, IDPF_FLAGS_NBITS); struct idpf_reset_reg reset_reg; struct idpf_hw hw; + struct libie_ctlq_ctx ctlq_ctx; u16 num_avail_msix; u16 num_msix_entries; struct msix_entry *msix_entries; @@ -870,70 +873,6 @@ static inline u8 idpf_get_min_tx_pkt_len(struct idpf_a= dapter *adapter) return pkt_len ? pkt_len : IDPF_TX_MIN_PKT_LEN; } =20 -/** - * idpf_get_mbx_reg_addr - Get BAR0 mailbox register address - * @adapter: private data struct - * @reg_offset: register offset value - * - * Return: BAR0 mailbox register address based on register offset. - */ -static inline void __iomem *idpf_get_mbx_reg_addr(struct idpf_adapter *ada= pter, - resource_size_t reg_offset) -{ - return adapter->hw.mbx.vaddr + reg_offset; -} - -/** - * idpf_get_rstat_reg_addr - Get BAR0 rstat register address - * @adapter: private data struct - * @reg_offset: register offset value - * - * Return: BAR0 rstat register address based on register offset. - */ -static inline void __iomem *idpf_get_rstat_reg_addr(struct idpf_adapter *a= dapter, - resource_size_t reg_offset) -{ - reg_offset -=3D adapter->dev_ops.static_reg_info[1].start; - - return adapter->hw.rstat.vaddr + reg_offset; -} - -/** - * idpf_get_reg_addr - Get BAR0 register address - * @adapter: private data struct - * @reg_offset: register offset value - * - * Based on the register offset, return the actual BAR0 register address - */ -static inline void __iomem *idpf_get_reg_addr(struct idpf_adapter *adapter, - resource_size_t reg_offset) -{ - struct idpf_hw *hw =3D &adapter->hw; - - for (int i =3D 0; i < hw->num_lan_regs; i++) { - struct idpf_mmio_reg *region =3D &hw->lan_regs[i]; - - if (reg_offset >=3D region->addr_start && - reg_offset < (region->addr_start + region->addr_len)) { - /* Convert the offset so that it is relative to the - * start of the region. Then add the base address of - * the region to get the final address. - */ - reg_offset -=3D region->addr_start; - - return region->vaddr + reg_offset; - } - } - - /* It's impossible to hit this case with offsets from the CP. But if we - * do for any other reason, the kernel will panic on that register - * access. Might as well do it here to make it clear what's happening. - */ - BUG(); - - return NULL; -} - /** * idpf_is_reset_detected - check if we were reset at some point * @adapter: driver specific private structure @@ -945,7 +884,8 @@ static inline bool idpf_is_reset_detected(struct idpf_a= dapter *adapter) if (!adapter->hw.arq) return true; =20 - return !(readl(idpf_get_mbx_reg_addr(adapter, adapter->hw.arq->reg.len)) & + return !(readl(libie_pci_get_mmio_addr(&adapter->ctlq_ctx.mmio_info, + adapter->hw.arq->reg.len)) & adapter->hw.arq->reg.len_mask); } =20 diff --git a/drivers/net/ethernet/intel/idpf/idpf_controlq.c b/drivers/net/= ethernet/intel/idpf/idpf_controlq.c index 67894eda2d29..89f6b39934d8 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_controlq.c +++ b/drivers/net/ethernet/intel/idpf/idpf_controlq.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only /* Copyright (C) 2023 Intel Corporation */ =20 -#include "idpf_controlq.h" +#include "idpf.h" =20 /** * idpf_ctlq_setup_regs - initialize control queue registers @@ -34,21 +34,27 @@ static void idpf_ctlq_setup_regs(struct idpf_ctlq_info = *cq, static void idpf_ctlq_init_regs(struct idpf_hw *hw, struct idpf_ctlq_info = *cq, bool is_rxq) { + struct libie_mmio_info *mmio =3D &hw->back->ctlq_ctx.mmio_info; + /* Update tail to post pre-allocated buffers for rx queues */ if (is_rxq) - idpf_mbx_wr32(hw, cq->reg.tail, (u32)(cq->ring_size - 1)); + writel((u32)(cq->ring_size - 1), + libie_pci_get_mmio_addr(mmio, cq->reg.tail)); =20 /* For non-Mailbox control queues only TAIL need to be set */ if (cq->q_id !=3D -1) return; =20 /* Clear Head for both send or receive */ - idpf_mbx_wr32(hw, cq->reg.head, 0); + writel(0, libie_pci_get_mmio_addr(mmio, cq->reg.head)); =20 /* set starting point */ - idpf_mbx_wr32(hw, cq->reg.bal, lower_32_bits(cq->desc_ring.pa)); - idpf_mbx_wr32(hw, cq->reg.bah, upper_32_bits(cq->desc_ring.pa)); - idpf_mbx_wr32(hw, cq->reg.len, (cq->ring_size | cq->reg.len_ena_mask)); + writel(lower_32_bits(cq->desc_ring.pa), + libie_pci_get_mmio_addr(mmio, cq->reg.bal)); + writel(upper_32_bits(cq->desc_ring.pa), + libie_pci_get_mmio_addr(mmio, cq->reg.bah)); + writel((cq->ring_size | cq->reg.len_ena_mask), + libie_pci_get_mmio_addr(mmio, cq->reg.len)); } =20 /** @@ -328,7 +334,9 @@ int idpf_ctlq_send(struct idpf_hw *hw, struct idpf_ctlq= _info *cq, */ dma_wmb(); =20 - idpf_mbx_wr32(hw, cq->reg.tail, cq->next_to_use); + writel(cq->next_to_use, + libie_pci_get_mmio_addr(&hw->back->ctlq_ctx.mmio_info, + cq->reg.tail)); =20 err_unlock: spin_unlock(&cq->cq_lock); @@ -520,7 +528,9 @@ int idpf_ctlq_post_rx_buffs(struct idpf_hw *hw, struct = idpf_ctlq_info *cq, =20 dma_wmb(); =20 - idpf_mbx_wr32(hw, cq->reg.tail, cq->next_to_post); + writel(cq->next_to_post, + libie_pci_get_mmio_addr(&hw->back->ctlq_ctx.mmio_info, + cq->reg.tail)); } =20 spin_unlock(&cq->cq_lock); diff --git a/drivers/net/ethernet/intel/idpf/idpf_controlq.h b/drivers/net/= ethernet/intel/idpf/idpf_controlq.h index de4ece40c2ff..acf595e9265f 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_controlq.h +++ b/drivers/net/ethernet/intel/idpf/idpf_controlq.h @@ -109,8 +109,6 @@ struct idpf_mmio_reg { * Align to ctlq_hw_info */ struct idpf_hw { - struct idpf_mmio_reg mbx; - struct idpf_mmio_reg rstat; /* Array of remaining LAN BAR regions */ int num_lan_regs; struct idpf_mmio_reg *lan_regs; diff --git a/drivers/net/ethernet/intel/idpf/idpf_dev.c b/drivers/net/ether= net/intel/idpf/idpf_dev.c index a4625638cf3f..3a9355d40c90 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_dev.c +++ b/drivers/net/ethernet/intel/idpf/idpf_dev.c @@ -16,7 +16,6 @@ static void idpf_ctlq_reg_init(struct idpf_adapter *adapter, struct idpf_ctlq_create_info *cq) { - resource_size_t mbx_start =3D adapter->dev_ops.static_reg_info[0].start; int i; =20 for (i =3D 0; i < IDPF_NUM_DFLT_MBX_Q; i++) { @@ -25,22 +24,22 @@ static void idpf_ctlq_reg_init(struct idpf_adapter *ada= pter, switch (ccq->type) { case IDPF_CTLQ_TYPE_MAILBOX_TX: /* set head and tail registers in our local struct */ - ccq->reg.head =3D PF_FW_ATQH - mbx_start; - ccq->reg.tail =3D PF_FW_ATQT - mbx_start; - ccq->reg.len =3D PF_FW_ATQLEN - mbx_start; - ccq->reg.bah =3D PF_FW_ATQBAH - mbx_start; - ccq->reg.bal =3D PF_FW_ATQBAL - mbx_start; + ccq->reg.head =3D PF_FW_ATQH; + ccq->reg.tail =3D PF_FW_ATQT; + ccq->reg.len =3D PF_FW_ATQLEN; + ccq->reg.bah =3D PF_FW_ATQBAH; + ccq->reg.bal =3D PF_FW_ATQBAL; ccq->reg.len_mask =3D PF_FW_ATQLEN_ATQLEN_M; ccq->reg.len_ena_mask =3D PF_FW_ATQLEN_ATQENABLE_M; ccq->reg.head_mask =3D PF_FW_ATQH_ATQH_M; break; case IDPF_CTLQ_TYPE_MAILBOX_RX: /* set head and tail registers in our local struct */ - ccq->reg.head =3D PF_FW_ARQH - mbx_start; - ccq->reg.tail =3D PF_FW_ARQT - mbx_start; - ccq->reg.len =3D PF_FW_ARQLEN - mbx_start; - ccq->reg.bah =3D PF_FW_ARQBAH - mbx_start; - ccq->reg.bal =3D PF_FW_ARQBAL - mbx_start; + ccq->reg.head =3D PF_FW_ARQH; + ccq->reg.tail =3D PF_FW_ARQT; + ccq->reg.len =3D PF_FW_ARQLEN; + ccq->reg.bah =3D PF_FW_ARQBAH; + ccq->reg.bal =3D PF_FW_ARQBAL; ccq->reg.len_mask =3D PF_FW_ARQLEN_ARQLEN_M; ccq->reg.len_ena_mask =3D PF_FW_ARQLEN_ARQENABLE_M; ccq->reg.head_mask =3D PF_FW_ARQH_ARQH_M; @@ -57,13 +56,14 @@ static void idpf_ctlq_reg_init(struct idpf_adapter *ada= pter, */ static void idpf_mb_intr_reg_init(struct idpf_adapter *adapter) { + struct libie_mmio_info *mmio =3D &adapter->ctlq_ctx.mmio_info; struct idpf_intr_reg *intr =3D &adapter->mb_vector.intr_reg; u32 dyn_ctl =3D le32_to_cpu(adapter->caps.mailbox_dyn_ctl); =20 - intr->dyn_ctl =3D idpf_get_reg_addr(adapter, dyn_ctl); + intr->dyn_ctl =3D libie_pci_get_mmio_addr(mmio, dyn_ctl); intr->dyn_ctl_intena_m =3D PF_GLINT_DYN_CTL_INTENA_M; intr->dyn_ctl_itridx_m =3D PF_GLINT_DYN_CTL_ITR_INDX_M; - intr->icr_ena =3D idpf_get_reg_addr(adapter, PF_INT_DIR_OICR_ENA); + intr->icr_ena =3D libie_pci_get_mmio_addr(mmio, PF_INT_DIR_OICR_ENA); intr->icr_ena_ctlq_m =3D PF_INT_DIR_OICR_ENA_M; } =20 @@ -78,6 +78,7 @@ static int idpf_intr_reg_init(struct idpf_vport *vport, struct idpf_adapter *adapter =3D vport->adapter; u16 num_vecs =3D rsrc->num_q_vectors; struct idpf_vec_regs *reg_vals; + struct libie_mmio_info *mmio; int num_regs, i, err =3D 0; u32 rx_itr, tx_itr, val; u16 total_vecs; @@ -94,14 +95,17 @@ static int idpf_intr_reg_init(struct idpf_vport *vport, goto free_reg_vals; } =20 + mmio =3D &adapter->ctlq_ctx.mmio_info; + for (i =3D 0; i < num_vecs; i++) { struct idpf_q_vector *q_vector =3D &rsrc->q_vectors[i]; u16 vec_id =3D rsrc->q_vector_idxs[i] - IDPF_MBX_Q_VEC; struct idpf_intr_reg *intr =3D &q_vector->intr_reg; + struct idpf_vec_regs *reg =3D ®_vals[vec_id]; u32 spacing; =20 - intr->dyn_ctl =3D idpf_get_reg_addr(adapter, - reg_vals[vec_id].dyn_ctl_reg); + intr->dyn_ctl =3D libie_pci_get_mmio_addr(mmio, + reg->dyn_ctl_reg); intr->dyn_ctl_intena_m =3D PF_GLINT_DYN_CTL_INTENA_M; intr->dyn_ctl_intena_msk_m =3D PF_GLINT_DYN_CTL_INTENA_MSK_M; intr->dyn_ctl_itridx_s =3D PF_GLINT_DYN_CTL_ITR_INDX_S; @@ -111,22 +115,21 @@ static int idpf_intr_reg_init(struct idpf_vport *vpor= t, intr->dyn_ctl_sw_itridx_ena_m =3D PF_GLINT_DYN_CTL_SW_ITR_INDX_ENA_M; =20 - spacing =3D IDPF_ITR_IDX_SPACING(reg_vals[vec_id].itrn_index_spacing, + spacing =3D IDPF_ITR_IDX_SPACING(reg->itrn_index_spacing, IDPF_PF_ITR_IDX_SPACING); rx_itr =3D PF_GLINT_ITR_ADDR(VIRTCHNL2_ITR_IDX_0, - reg_vals[vec_id].itrn_reg, - spacing); + reg->itrn_reg, spacing); tx_itr =3D PF_GLINT_ITR_ADDR(VIRTCHNL2_ITR_IDX_1, - reg_vals[vec_id].itrn_reg, - spacing); - intr->rx_itr =3D idpf_get_reg_addr(adapter, rx_itr); - intr->tx_itr =3D idpf_get_reg_addr(adapter, tx_itr); + reg->itrn_reg, spacing); + intr->rx_itr =3D libie_pci_get_mmio_addr(mmio, rx_itr); + intr->tx_itr =3D libie_pci_get_mmio_addr(mmio, tx_itr); } =20 /* Data vector for NOIRQ queues */ =20 val =3D reg_vals[rsrc->q_vector_idxs[i] - IDPF_MBX_Q_VEC].dyn_ctl_reg; - rsrc->noirq_dyn_ctl =3D idpf_get_reg_addr(adapter, val); + rsrc->noirq_dyn_ctl =3D + libie_pci_get_mmio_addr(&adapter->ctlq_ctx.mmio_info, val); =20 val =3D PF_GLINT_DYN_CTL_WB_ON_ITR_M | PF_GLINT_DYN_CTL_INTENA_MSK_M | FIELD_PREP(PF_GLINT_DYN_CTL_ITR_INDX_M, IDPF_NO_ITR_UPDATE_IDX); @@ -144,7 +147,9 @@ static int idpf_intr_reg_init(struct idpf_vport *vport, */ static void idpf_reset_reg_init(struct idpf_adapter *adapter) { - adapter->reset_reg.rstat =3D idpf_get_rstat_reg_addr(adapter, PFGEN_RSTAT= ); + adapter->reset_reg.rstat =3D + libie_pci_get_mmio_addr(&adapter->ctlq_ctx.mmio_info, + PFGEN_RSTAT); adapter->reset_reg.rstat_m =3D PFGEN_RSTAT_PFR_STATE_M; } =20 @@ -156,11 +161,11 @@ static void idpf_reset_reg_init(struct idpf_adapter *= adapter) static void idpf_trigger_reset(struct idpf_adapter *adapter, enum idpf_flags __always_unused trig_cause) { - u32 reset_reg; + void __iomem *addr; =20 - reset_reg =3D readl(idpf_get_rstat_reg_addr(adapter, PFGEN_CTRL)); - writel(reset_reg | PFGEN_CTRL_PFSWR, - idpf_get_rstat_reg_addr(adapter, PFGEN_CTRL)); + addr =3D libie_pci_get_mmio_addr(&adapter->ctlq_ctx.mmio_info, + PFGEN_CTRL); + writel(readl(addr) | PFGEN_CTRL_PFSWR, addr); } =20 /** diff --git a/drivers/net/ethernet/intel/idpf/idpf_idc.c b/drivers/net/ether= net/intel/idpf/idpf_idc.c index 7e20a07e98e5..c1b963f6bfad 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_idc.c +++ b/drivers/net/ethernet/intel/idpf/idpf_idc.c @@ -410,9 +410,12 @@ idpf_idc_init_msix_data(struct idpf_adapter *adapter) int idpf_idc_init_aux_core_dev(struct idpf_adapter *adapter, enum iidc_function_type ftype) { + struct libie_mmio_info *mmio =3D &adapter->ctlq_ctx.mmio_info; struct iidc_rdma_core_dev_info *cdev_info; struct iidc_rdma_priv_dev_info *privd; - int err, i; + struct libie_pci_mmio_region *mr; + size_t num_mem_regions; + int err, i =3D 0; =20 adapter->cdev_info =3D kzalloc(sizeof(*cdev_info), GFP_KERNEL); if (!adapter->cdev_info) @@ -430,8 +433,15 @@ int idpf_idc_init_aux_core_dev(struct idpf_adapter *ad= apter, cdev_info->rdma_protocol =3D IIDC_RDMA_PROTOCOL_ROCEV2; privd->ftype =3D ftype; =20 + num_mem_regions =3D list_count_nodes(&mmio->mmio_list); + if (num_mem_regions <=3D IDPF_MMIO_REG_NUM_STATIC) { + err =3D -EINVAL; + goto err_plug_aux_dev; + } + + num_mem_regions -=3D IDPF_MMIO_REG_NUM_STATIC; privd->mapped_mem_regions =3D - kcalloc(adapter->hw.num_lan_regs, + kcalloc(num_mem_regions, sizeof(struct iidc_rdma_lan_mapped_mem_region), GFP_KERNEL); if (!privd->mapped_mem_regions) { @@ -439,14 +449,22 @@ int idpf_idc_init_aux_core_dev(struct idpf_adapter *a= dapter, goto err_plug_aux_dev; } =20 - privd->num_memory_regions =3D cpu_to_le16(adapter->hw.num_lan_regs); - for (i =3D 0; i < adapter->hw.num_lan_regs; i++) { - privd->mapped_mem_regions[i].region_addr =3D - adapter->hw.lan_regs[i].vaddr; - privd->mapped_mem_regions[i].size =3D - cpu_to_le64(adapter->hw.lan_regs[i].addr_len); - privd->mapped_mem_regions[i].start_offset =3D - cpu_to_le64(adapter->hw.lan_regs[i].addr_start); + privd->num_memory_regions =3D cpu_to_le16(num_mem_regions); + list_for_each_entry(mr, &mmio->mmio_list, list) { + struct resource *static_regs =3D adapter->dev_ops.static_reg_info; + bool is_static =3D false; + + for (uint j =3D 0; j < IDPF_MMIO_REG_NUM_STATIC; j++) + if (mr->offset =3D=3D static_regs[j].start) + is_static =3D true; + + if (is_static) + continue; + + privd->mapped_mem_regions[i].region_addr =3D mr->addr; + privd->mapped_mem_regions[i].size =3D cpu_to_le64(mr->size); + privd->mapped_mem_regions[i++].start_offset =3D + cpu_to_le64(mr->offset); } =20 idpf_idc_init_msix_data(adapter); diff --git a/drivers/net/ethernet/intel/idpf/idpf_lib.c b/drivers/net/ether= net/intel/idpf/idpf_lib.c index dca7861a0a2a..e15b1e8effc8 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_lib.c +++ b/drivers/net/ethernet/intel/idpf/idpf_lib.c @@ -1845,15 +1845,14 @@ void idpf_deinit_task(struct idpf_adapter *adapter) =20 /** * idpf_check_reset_complete - check that reset is complete - * @hw: pointer to hw struct + * @adapter: adapter to check * @reset_reg: struct with reset registers * * Returns 0 if device is ready to use, or -EBUSY if it's in reset. **/ -static int idpf_check_reset_complete(struct idpf_hw *hw, +static int idpf_check_reset_complete(struct idpf_adapter *adapter, struct idpf_reset_reg *reset_reg) { - struct idpf_adapter *adapter =3D hw->back; int i; =20 for (i =3D 0; i < 2000; i++) { @@ -1916,7 +1915,7 @@ static void idpf_init_hard_reset(struct idpf_adapter = *adapter) } =20 /* Wait for reset to complete */ - err =3D idpf_check_reset_complete(&adapter->hw, &adapter->reset_reg); + err =3D idpf_check_reset_complete(adapter, &adapter->reset_reg); if (err) { dev_err(dev, "The driver was unable to contact the device's firmware. Ch= eck that the FW is running. Driver state=3D 0x%x\n", adapter->state); diff --git a/drivers/net/ethernet/intel/idpf/idpf_main.c b/drivers/net/ethe= rnet/intel/idpf/idpf_main.c index de5d722cc21d..9da02ce42605 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_main.c +++ b/drivers/net/ethernet/intel/idpf/idpf_main.c @@ -15,6 +15,8 @@ =20 MODULE_DESCRIPTION(DRV_SUMMARY); MODULE_IMPORT_NS("LIBETH"); +MODULE_IMPORT_NS("LIBIE_CP"); +MODULE_IMPORT_NS("LIBIE_PCI"); MODULE_IMPORT_NS("LIBETH_XDP"); MODULE_LICENSE("GPL"); =20 @@ -90,6 +92,15 @@ static int idpf_dev_init(struct idpf_adapter *adapter, return 0; } =20 +/** + * idpf_decfg_device - deconfigure device and device specific resources + * @adapter: driver specific private structure + */ +static void idpf_decfg_device(struct idpf_adapter *adapter) +{ + libie_pci_unmap_all_mmio_regions(&adapter->ctlq_ctx.mmio_info); +} + /** * idpf_remove - Device removal routine * @pdev: PCI device information struct @@ -159,6 +170,7 @@ static void idpf_remove(struct pci_dev *pdev) mutex_destroy(&adapter->queue_lock); mutex_destroy(&adapter->vc_buf_lock); =20 + idpf_decfg_device(adapter); pci_set_drvdata(pdev, NULL); kfree(adapter); } @@ -181,46 +193,52 @@ static void idpf_shutdown(struct pci_dev *pdev) } =20 /** - * idpf_cfg_hw - Initialize HW struct - * @adapter: adapter to setup hw struct for + * idpf_cfg_device - configure device and device specific resources + * @adapter: driver specific private structure * - * Returns 0 on success, negative on failure + * Return: %0 on success, -%errno on failure. */ -static int idpf_cfg_hw(struct idpf_adapter *adapter) +static int idpf_cfg_device(struct idpf_adapter *adapter) { - resource_size_t res_start, mbx_start, rstat_start; + struct libie_mmio_info *mmio_info =3D &adapter->ctlq_ctx.mmio_info; struct pci_dev *pdev =3D adapter->pdev; - struct idpf_hw *hw =3D &adapter->hw; - struct device *dev =3D &pdev->dev; - long len; + struct resource *region; + bool mapped =3D false; + int err; =20 - res_start =3D pci_resource_start(pdev, 0); + err =3D libie_pci_init_dev(pdev); + if (err) + return err; =20 - /* Map mailbox space for virtchnl communication */ - mbx_start =3D res_start + adapter->dev_ops.static_reg_info[0].start; - len =3D resource_size(&adapter->dev_ops.static_reg_info[0]); - hw->mbx.vaddr =3D devm_ioremap(dev, mbx_start, len); - if (!hw->mbx.vaddr) { - pci_err(pdev, "failed to allocate BAR0 mbx region\n"); + mmio_info->pdev =3D pdev; + INIT_LIST_HEAD(&mmio_info->mmio_list); =20 + /* Map mailbox space for virtchnl communication */ + region =3D &adapter->dev_ops.static_reg_info[0]; + mapped =3D libie_pci_map_mmio_region(mmio_info, region->start, + resource_size(region)); + if (!mapped) { + pci_err(pdev, "failed to map BAR0 mbx region\n"); return -ENOMEM; } - hw->mbx.addr_start =3D adapter->dev_ops.static_reg_info[0].start; - hw->mbx.addr_len =3D len; =20 /* Map rstat space for resets */ - rstat_start =3D res_start + adapter->dev_ops.static_reg_info[1].start; - len =3D resource_size(&adapter->dev_ops.static_reg_info[1]); - hw->rstat.vaddr =3D devm_ioremap(dev, rstat_start, len); - if (!hw->rstat.vaddr) { - pci_err(pdev, "failed to allocate BAR0 rstat region\n"); + region =3D &adapter->dev_ops.static_reg_info[1]; =20 + mapped =3D libie_pci_map_mmio_region(mmio_info, region->start, + resource_size(region)); + if (!mapped) { + pci_err(pdev, "failed to map BAR0 rstat region\n"); + libie_pci_unmap_all_mmio_regions(mmio_info); return -ENOMEM; } - hw->rstat.addr_start =3D adapter->dev_ops.static_reg_info[1].start; - hw->rstat.addr_len =3D len; =20 - hw->back =3D adapter; + err =3D pci_enable_ptm(pdev, NULL); + if (err) + pci_dbg(pdev, "PCIe PTM is not supported by PCIe bus/controller\n"); + + pci_set_drvdata(pdev, adapter); + adapter->hw.back =3D adapter; =20 return 0; } @@ -246,32 +264,21 @@ static int idpf_probe(struct pci_dev *pdev, const str= uct pci_device_id *ent) adapter->req_rx_splitq =3D true; =20 adapter->pdev =3D pdev; - err =3D pcim_enable_device(pdev); - if (err) - goto err_free; =20 - err =3D pcim_request_region(pdev, 0, pci_name(pdev)); + err =3D idpf_dev_init(adapter, ent); if (err) { - pci_err(pdev, "pcim_request_region failed %pe\n", ERR_PTR(err)); - + dev_err(&pdev->dev, "Unexpected dev ID 0x%x in idpf probe\n", + ent->device); goto err_free; } =20 - err =3D pci_enable_ptm(pdev, NULL); - if (err) - pci_dbg(pdev, "PCIe PTM is not supported by PCIe bus/controller\n"); - - /* set up for high or low dma */ - err =3D dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64)); + err =3D idpf_cfg_device(adapter); if (err) { - pci_err(pdev, "DMA configuration failed: %pe\n", ERR_PTR(err)); - + pci_err(pdev, "Failed to configure device specific resources: %pe\n", + ERR_PTR(err)); goto err_free; } =20 - pci_set_master(pdev); - pci_set_drvdata(pdev, adapter); - adapter->init_wq =3D alloc_workqueue("%s-%s-init", WQ_UNBOUND | WQ_MEM_RECLAIM, 0, dev_driver_string(dev), @@ -279,7 +286,7 @@ static int idpf_probe(struct pci_dev *pdev, const struc= t pci_device_id *ent) if (!adapter->init_wq) { dev_err(dev, "Failed to allocate init workqueue\n"); err =3D -ENOMEM; - goto err_free; + goto err_init_wq; } =20 adapter->serv_wq =3D alloc_workqueue("%s-%s-service", @@ -324,20 +331,6 @@ static int idpf_probe(struct pci_dev *pdev, const stru= ct pci_device_id *ent) /* setup msglvl */ adapter->msg_enable =3D netif_msg_init(-1, IDPF_AVAIL_NETIF_M); =20 - err =3D idpf_dev_init(adapter, ent); - if (err) { - dev_err(&pdev->dev, "Unexpected dev ID 0x%x in idpf probe\n", - ent->device); - goto destroy_vc_event_wq; - } - - err =3D idpf_cfg_hw(adapter); - if (err) { - dev_err(dev, "Failed to configure HW structure for adapter: %d\n", - err); - goto destroy_vc_event_wq; - } - mutex_init(&adapter->vport_ctrl_lock); mutex_init(&adapter->vector_lock); mutex_init(&adapter->queue_lock); @@ -356,8 +349,6 @@ static int idpf_probe(struct pci_dev *pdev, const struc= t pci_device_id *ent) =20 return 0; =20 -destroy_vc_event_wq: - destroy_workqueue(adapter->vc_event_wq); err_vc_event_wq_alloc: destroy_workqueue(adapter->stats_wq); err_stats_wq_alloc: @@ -366,6 +357,8 @@ static int idpf_probe(struct pci_dev *pdev, const struc= t pci_device_id *ent) destroy_workqueue(adapter->serv_wq); err_serv_wq_alloc: destroy_workqueue(adapter->init_wq); +err_init_wq: + idpf_decfg_device(adapter); err_free: kfree(adapter); return err; diff --git a/drivers/net/ethernet/intel/idpf/idpf_vf_dev.c b/drivers/net/et= hernet/intel/idpf/idpf_vf_dev.c index 7527b967e2e7..b7aa9538435e 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_vf_dev.c +++ b/drivers/net/ethernet/intel/idpf/idpf_vf_dev.c @@ -56,13 +56,14 @@ static void idpf_vf_ctlq_reg_init(struct idpf_adapter *= adapter, */ static void idpf_vf_mb_intr_reg_init(struct idpf_adapter *adapter) { + struct libie_mmio_info *mmio =3D &adapter->ctlq_ctx.mmio_info; struct idpf_intr_reg *intr =3D &adapter->mb_vector.intr_reg; u32 dyn_ctl =3D le32_to_cpu(adapter->caps.mailbox_dyn_ctl); =20 - intr->dyn_ctl =3D idpf_get_reg_addr(adapter, dyn_ctl); + intr->dyn_ctl =3D libie_pci_get_mmio_addr(mmio, dyn_ctl); intr->dyn_ctl_intena_m =3D VF_INT_DYN_CTL0_INTENA_M; intr->dyn_ctl_itridx_m =3D VF_INT_DYN_CTL0_ITR_INDX_M; - intr->icr_ena =3D idpf_get_reg_addr(adapter, VF_INT_ICR0_ENA1); + intr->icr_ena =3D libie_pci_get_mmio_addr(mmio, VF_INT_ICR0_ENA1); intr->icr_ena_ctlq_m =3D VF_INT_ICR0_ENA1_ADMINQ_M; } =20 @@ -77,6 +78,7 @@ static int idpf_vf_intr_reg_init(struct idpf_vport *vport, struct idpf_adapter *adapter =3D vport->adapter; u16 num_vecs =3D rsrc->num_q_vectors; struct idpf_vec_regs *reg_vals; + struct libie_mmio_info *mmio; int num_regs, i, err =3D 0; u32 rx_itr, tx_itr, val; u16 total_vecs; @@ -93,14 +95,17 @@ static int idpf_vf_intr_reg_init(struct idpf_vport *vpo= rt, goto free_reg_vals; } =20 + mmio =3D &adapter->ctlq_ctx.mmio_info; + for (i =3D 0; i < num_vecs; i++) { struct idpf_q_vector *q_vector =3D &rsrc->q_vectors[i]; u16 vec_id =3D rsrc->q_vector_idxs[i] - IDPF_MBX_Q_VEC; struct idpf_intr_reg *intr =3D &q_vector->intr_reg; + struct idpf_vec_regs *reg =3D ®_vals[vec_id]; u32 spacing; =20 - intr->dyn_ctl =3D idpf_get_reg_addr(adapter, - reg_vals[vec_id].dyn_ctl_reg); + intr->dyn_ctl =3D libie_pci_get_mmio_addr(mmio, + reg->dyn_ctl_reg); intr->dyn_ctl_intena_m =3D VF_INT_DYN_CTLN_INTENA_M; intr->dyn_ctl_intena_msk_m =3D VF_INT_DYN_CTLN_INTENA_MSK_M; intr->dyn_ctl_itridx_s =3D VF_INT_DYN_CTLN_ITR_INDX_S; @@ -110,22 +115,21 @@ static int idpf_vf_intr_reg_init(struct idpf_vport *v= port, intr->dyn_ctl_sw_itridx_ena_m =3D VF_INT_DYN_CTLN_SW_ITR_INDX_ENA_M; =20 - spacing =3D IDPF_ITR_IDX_SPACING(reg_vals[vec_id].itrn_index_spacing, + spacing =3D IDPF_ITR_IDX_SPACING(reg->itrn_index_spacing, IDPF_VF_ITR_IDX_SPACING); rx_itr =3D VF_INT_ITRN_ADDR(VIRTCHNL2_ITR_IDX_0, - reg_vals[vec_id].itrn_reg, - spacing); + reg->itrn_reg, spacing); tx_itr =3D VF_INT_ITRN_ADDR(VIRTCHNL2_ITR_IDX_1, - reg_vals[vec_id].itrn_reg, - spacing); - intr->rx_itr =3D idpf_get_reg_addr(adapter, rx_itr); - intr->tx_itr =3D idpf_get_reg_addr(adapter, tx_itr); + reg->itrn_reg, spacing); + intr->rx_itr =3D libie_pci_get_mmio_addr(mmio, rx_itr); + intr->tx_itr =3D libie_pci_get_mmio_addr(mmio, tx_itr); } =20 /* Data vector for NOIRQ queues */ =20 val =3D reg_vals[rsrc->q_vector_idxs[i] - IDPF_MBX_Q_VEC].dyn_ctl_reg; - rsrc->noirq_dyn_ctl =3D idpf_get_reg_addr(adapter, val); + rsrc->noirq_dyn_ctl =3D + libie_pci_get_mmio_addr(&adapter->ctlq_ctx.mmio_info, val); =20 val =3D VF_INT_DYN_CTLN_WB_ON_ITR_M | VF_INT_DYN_CTLN_INTENA_MSK_M | FIELD_PREP(VF_INT_DYN_CTLN_ITR_INDX_M, IDPF_NO_ITR_UPDATE_IDX); @@ -143,7 +147,9 @@ static int idpf_vf_intr_reg_init(struct idpf_vport *vpo= rt, */ static void idpf_vf_reset_reg_init(struct idpf_adapter *adapter) { - adapter->reset_reg.rstat =3D idpf_get_rstat_reg_addr(adapter, VFGEN_RSTAT= ); + adapter->reset_reg.rstat =3D + libie_pci_get_mmio_addr(&adapter->ctlq_ctx.mmio_info, + VFGEN_RSTAT); adapter->reset_reg.rstat_m =3D VFGEN_RSTAT_VFR_STATE_M; } =20 diff --git a/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c b/drivers/net/= ethernet/intel/idpf/idpf_virtchnl.c index eb834f29ff77..278247e456f4 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c +++ b/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c @@ -2,6 +2,7 @@ /* Copyright (C) 2023 Intel Corporation */ =20 #include +#include #include =20 #include "idpf.h" @@ -1017,12 +1018,46 @@ static int idpf_send_get_caps_msg(struct idpf_adapt= er *adapter) } =20 /** - * idpf_send_get_lan_memory_regions - Send virtchnl get LAN memory regions= msg + * idpf_mmio_region_non_static - Check if region is not static + * @mmio_info: PCI resources info + * @reg: region to check + * + * Return: %true if region can be received though virtchnl command, + * %false if region is related to mailbox or resetting + */ +static bool idpf_mmio_region_non_static(struct libie_mmio_info *mmio_info, + struct libie_pci_mmio_region *reg) +{ + struct idpf_adapter *adapter =3D + container_of(mmio_info, struct idpf_adapter, + ctlq_ctx.mmio_info); + + for (uint i =3D 0; i < IDPF_MMIO_REG_NUM_STATIC; i++) { + if (reg->bar_idx =3D=3D 0 && + reg->offset =3D=3D adapter->dev_ops.static_reg_info[i].start) + return false; + } + + return true; +} + +/** + * idpf_decfg_lan_memory_regions - Unmap non-static memory regions + * @adapter: Driver specific private structure + */ +static void idpf_decfg_lan_memory_regions(struct idpf_adapter *adapter) +{ + libie_pci_unmap_fltr_regs(&adapter->ctlq_ctx.mmio_info, + idpf_mmio_region_non_static); +} + +/** + * idpf_cfg_lan_memory_regions - Send virtchnl get LAN memory regions msg * @adapter: Driver specific private struct * * Return: 0 on success or error code on failure. */ -static int idpf_send_get_lan_memory_regions(struct idpf_adapter *adapter) +static int idpf_cfg_lan_memory_regions(struct idpf_adapter *adapter) { struct virtchnl2_get_lan_memory_regions *rcvd_regions __free(kfree); struct idpf_vc_xn_params xn_params =3D { @@ -1031,7 +1066,6 @@ static int idpf_send_get_lan_memory_regions(struct id= pf_adapter *adapter) .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, }; int num_regions, size; - struct idpf_hw *hw; ssize_t reply_sz; int err =3D 0; =20 @@ -1052,88 +1086,51 @@ static int idpf_send_get_lan_memory_regions(struct = idpf_adapter *adapter) if (size > IDPF_CTLQ_MAX_BUF_LEN) return -EINVAL; =20 - hw =3D &adapter->hw; - hw->lan_regs =3D kcalloc(num_regions, sizeof(*hw->lan_regs), GFP_KERNEL); - if (!hw->lan_regs) - return -ENOMEM; - for (int i =3D 0; i < num_regions; i++) { - hw->lan_regs[i].addr_len =3D - le64_to_cpu(rcvd_regions->mem_reg[i].size); - hw->lan_regs[i].addr_start =3D - le64_to_cpu(rcvd_regions->mem_reg[i].start_offset); + struct libie_mmio_info *mmio =3D &adapter->ctlq_ctx.mmio_info; + resource_size_t offset, len; + + offset =3D le64_to_cpu(rcvd_regions->mem_reg[i].start_offset); + len =3D le64_to_cpu(rcvd_regions->mem_reg[i].size); + if (!libie_pci_map_mmio_region(mmio, offset, len)) { + idpf_decfg_lan_memory_regions(adapter); + return -EIO; + } } - hw->num_lan_regs =3D num_regions; =20 return err; } =20 /** - * idpf_calc_remaining_mmio_regs - calculate MMIO regions outside mbx and = rstat + * idpf_map_remaining_mmio_regs - map MMIO regions outside mbx and rstat * @adapter: Driver specific private structure * - * Called when idpf_send_get_lan_memory_regions is not supported. This will + * Called when idpf_cfg_lan_memory_regions is not supported. This will * calculate the offsets and sizes for the regions before, in between, and * after the mailbox and rstat MMIO mappings. * * Return: 0 on success or error code on failure. */ -static int idpf_calc_remaining_mmio_regs(struct idpf_adapter *adapter) +static int idpf_map_remaining_mmio_regs(struct idpf_adapter *adapter) { struct resource *rstat_reg =3D &adapter->dev_ops.static_reg_info[1]; struct resource *mbx_reg =3D &adapter->dev_ops.static_reg_info[0]; - struct idpf_hw *hw =3D &adapter->hw; - - hw->num_lan_regs =3D IDPF_MMIO_MAP_FALLBACK_MAX_REMAINING; - hw->lan_regs =3D kcalloc(hw->num_lan_regs, sizeof(*hw->lan_regs), - GFP_KERNEL); - if (!hw->lan_regs) - return -ENOMEM; + struct libie_mmio_info *mmio =3D &adapter->ctlq_ctx.mmio_info; + resource_size_t reg_start; =20 /* Region preceding mailbox */ - hw->lan_regs[0].addr_start =3D 0; - hw->lan_regs[0].addr_len =3D mbx_reg->start; - /* Region between mailbox and rstat */ - hw->lan_regs[1].addr_start =3D mbx_reg->end + 1; - hw->lan_regs[1].addr_len =3D rstat_reg->start - - hw->lan_regs[1].addr_start; - /* Region after rstat */ - hw->lan_regs[2].addr_start =3D rstat_reg->end + 1; - hw->lan_regs[2].addr_len =3D pci_resource_len(adapter->pdev, 0) - - hw->lan_regs[2].addr_start; - - return 0; -} + libie_pci_map_mmio_region(mmio, 0, mbx_reg->start); =20 -/** - * idpf_map_lan_mmio_regs - map remaining LAN BAR regions - * @adapter: Driver specific private structure - * - * Return: 0 on success or error code on failure. - */ -static int idpf_map_lan_mmio_regs(struct idpf_adapter *adapter) -{ - struct pci_dev *pdev =3D adapter->pdev; - struct idpf_hw *hw =3D &adapter->hw; - resource_size_t res_start; - - res_start =3D pci_resource_start(pdev, 0); - - for (int i =3D 0; i < hw->num_lan_regs; i++) { - resource_size_t start; - long len; - - len =3D hw->lan_regs[i].addr_len; - if (!len) - continue; - start =3D hw->lan_regs[i].addr_start + res_start; + /* Region between mailbox and rstat */ + reg_start =3D mbx_reg->end + 1; + libie_pci_map_mmio_region(mmio, reg_start, + rstat_reg->start - reg_start); =20 - hw->lan_regs[i].vaddr =3D devm_ioremap(&pdev->dev, start, len); - if (!hw->lan_regs[i].vaddr) { - pci_err(pdev, "failed to allocate BAR0 region\n"); - return -ENOMEM; - } - } + /* Region after rstat */ + reg_start =3D rstat_reg->end + 1; + libie_pci_map_mmio_region(mmio, reg_start, + pci_resource_len(adapter->pdev, 0) - + reg_start); =20 return 0; } @@ -1404,7 +1401,7 @@ static int __idpf_queue_reg_init(struct idpf_vport *v= port, struct idpf_q_vec_rsrc *rsrc, u32 *reg_vals, int num_regs, u32 q_type) { - struct idpf_adapter *adapter =3D vport->adapter; + struct libie_mmio_info *mmio =3D &vport->adapter->ctlq_ctx.mmio_info; int i, j, k =3D 0; =20 switch (q_type) { @@ -1414,7 +1411,8 @@ static int __idpf_queue_reg_init(struct idpf_vport *v= port, =20 for (j =3D 0; j < tx_qgrp->num_txq && k < num_regs; j++, k++) tx_qgrp->txqs[j]->tail =3D - idpf_get_reg_addr(adapter, reg_vals[k]); + libie_pci_get_mmio_addr(mmio, + reg_vals[k]); } break; case VIRTCHNL2_QUEUE_TYPE_RX: @@ -1426,8 +1424,8 @@ static int __idpf_queue_reg_init(struct idpf_vport *v= port, struct idpf_rx_queue *q; =20 q =3D rx_qgrp->singleq.rxqs[j]; - q->tail =3D idpf_get_reg_addr(adapter, - reg_vals[k]); + q->tail =3D libie_pci_get_mmio_addr(mmio, + reg_vals[k]); } } break; @@ -1440,8 +1438,8 @@ static int __idpf_queue_reg_init(struct idpf_vport *v= port, struct idpf_buf_queue *q; =20 q =3D &rx_qgrp->splitq.bufq_sets[j].bufq; - q->tail =3D idpf_get_reg_addr(adapter, - reg_vals[k]); + q->tail =3D libie_pci_get_mmio_addr(mmio, + reg_vals[k]); } } break; @@ -3505,29 +3503,22 @@ int idpf_vc_core_init(struct idpf_adapter *adapter) } =20 if (idpf_is_cap_ena(adapter, IDPF_OTHER_CAPS, VIRTCHNL2_CAP_LAN_MEMORY_RE= GIONS)) { - err =3D idpf_send_get_lan_memory_regions(adapter); + err =3D idpf_cfg_lan_memory_regions(adapter); if (err) { - dev_err(&adapter->pdev->dev, "Failed to get LAN memory regions: %d\n", + dev_err(&adapter->pdev->dev, "Failed to configure LAN memory regions: %= d\n", err); return -EINVAL; } } else { /* Fallback to mapping the remaining regions of the entire BAR */ - err =3D idpf_calc_remaining_mmio_regs(adapter); + err =3D idpf_map_remaining_mmio_regs(adapter); if (err) { - dev_err(&adapter->pdev->dev, "Failed to allocate BAR0 region(s): %d\n", + dev_err(&adapter->pdev->dev, "Failed to configure BAR0 region(s): %d\n", err); return -ENOMEM; } } =20 - err =3D idpf_map_lan_mmio_regs(adapter); - if (err) { - dev_err(&adapter->pdev->dev, "Failed to map BAR0 region(s): %d\n", - err); - return -ENOMEM; - } - pci_sriov_set_totalvfs(adapter->pdev, idpf_get_max_vfs(adapter)); num_max_vports =3D idpf_get_max_vports(adapter); adapter->max_vports =3D num_max_vports; @@ -3634,7 +3625,6 @@ int idpf_vc_core_init(struct idpf_adapter *adapter) */ void idpf_vc_core_deinit(struct idpf_adapter *adapter) { - struct idpf_hw *hw =3D &adapter->hw; bool remove_in_prog; =20 if (!test_bit(IDPF_VC_CORE_INIT, adapter->flags)) @@ -3659,12 +3649,10 @@ void idpf_vc_core_deinit(struct idpf_adapter *adapt= er) =20 idpf_vport_params_buf_rel(adapter); =20 - kfree(hw->lan_regs); - hw->lan_regs =3D NULL; - kfree(adapter->vports); adapter->vports =3D NULL; =20 + idpf_decfg_lan_memory_regions(adapter); clear_bit(IDPF_VC_CORE_INIT, adapter->flags); } =20 diff --git a/drivers/net/ethernet/intel/idpf/idpf_virtchnl_ptp.c b/drivers/= net/ethernet/intel/idpf/idpf_virtchnl_ptp.c index 61cedb6f2854..82f26fc7bc08 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_virtchnl_ptp.c +++ b/drivers/net/ethernet/intel/idpf/idpf_virtchnl_ptp.c @@ -31,6 +31,7 @@ int idpf_ptp_get_caps(struct idpf_adapter *adapter) .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, }; struct virtchnl2_ptp_cross_time_reg_offsets cross_tstamp_offsets; + struct libie_mmio_info *mmio =3D &adapter->ctlq_ctx.mmio_info; struct virtchnl2_ptp_clk_adj_reg_offsets clk_adj_offsets; struct virtchnl2_ptp_clk_reg_offsets clock_offsets; struct idpf_ptp_secondary_mbx *scnd_mbx; @@ -77,19 +78,20 @@ int idpf_ptp_get_caps(struct idpf_adapter *adapter) clock_offsets =3D recv_ptp_caps_msg->clk_offsets; =20 temp_offset =3D le32_to_cpu(clock_offsets.dev_clk_ns_l); - ptp->dev_clk_regs.dev_clk_ns_l =3D idpf_get_reg_addr(adapter, - temp_offset); + ptp->dev_clk_regs.dev_clk_ns_l =3D + libie_pci_get_mmio_addr(mmio, temp_offset); temp_offset =3D le32_to_cpu(clock_offsets.dev_clk_ns_h); - ptp->dev_clk_regs.dev_clk_ns_h =3D idpf_get_reg_addr(adapter, - temp_offset); + ptp->dev_clk_regs.dev_clk_ns_h =3D + libie_pci_get_mmio_addr(mmio, temp_offset); temp_offset =3D le32_to_cpu(clock_offsets.phy_clk_ns_l); - ptp->dev_clk_regs.phy_clk_ns_l =3D idpf_get_reg_addr(adapter, - temp_offset); + ptp->dev_clk_regs.phy_clk_ns_l =3D + libie_pci_get_mmio_addr(mmio, temp_offset); temp_offset =3D le32_to_cpu(clock_offsets.phy_clk_ns_h); - ptp->dev_clk_regs.phy_clk_ns_h =3D idpf_get_reg_addr(adapter, - temp_offset); + ptp->dev_clk_regs.phy_clk_ns_h =3D + libie_pci_get_mmio_addr(mmio, temp_offset); temp_offset =3D le32_to_cpu(clock_offsets.cmd_sync_trigger); - ptp->dev_clk_regs.cmd_sync =3D idpf_get_reg_addr(adapter, temp_offset); + ptp->dev_clk_regs.cmd_sync =3D + libie_pci_get_mmio_addr(mmio, temp_offset); =20 cross_tstamp: access_type =3D ptp->get_cross_tstamp_access; @@ -99,13 +101,14 @@ int idpf_ptp_get_caps(struct idpf_adapter *adapter) cross_tstamp_offsets =3D recv_ptp_caps_msg->cross_time_offsets; =20 temp_offset =3D le32_to_cpu(cross_tstamp_offsets.sys_time_ns_l); - ptp->dev_clk_regs.sys_time_ns_l =3D idpf_get_reg_addr(adapter, - temp_offset); + ptp->dev_clk_regs.sys_time_ns_l =3D + libie_pci_get_mmio_addr(mmio, temp_offset); temp_offset =3D le32_to_cpu(cross_tstamp_offsets.sys_time_ns_h); - ptp->dev_clk_regs.sys_time_ns_h =3D idpf_get_reg_addr(adapter, - temp_offset); + ptp->dev_clk_regs.sys_time_ns_h =3D + libie_pci_get_mmio_addr(mmio, temp_offset); temp_offset =3D le32_to_cpu(cross_tstamp_offsets.cmd_sync_trigger); - ptp->dev_clk_regs.cmd_sync =3D idpf_get_reg_addr(adapter, temp_offset); + ptp->dev_clk_regs.cmd_sync =3D + libie_pci_get_mmio_addr(mmio, temp_offset); =20 discipline_clock: access_type =3D ptp->adj_dev_clk_time_access; @@ -116,29 +119,32 @@ int idpf_ptp_get_caps(struct idpf_adapter *adapter) =20 /* Device clock offsets */ temp_offset =3D le32_to_cpu(clk_adj_offsets.dev_clk_cmd_type); - ptp->dev_clk_regs.cmd =3D idpf_get_reg_addr(adapter, temp_offset); + ptp->dev_clk_regs.cmd =3D libie_pci_get_mmio_addr(mmio, temp_offset); temp_offset =3D le32_to_cpu(clk_adj_offsets.dev_clk_incval_l); - ptp->dev_clk_regs.incval_l =3D idpf_get_reg_addr(adapter, temp_offset); + ptp->dev_clk_regs.incval_l =3D libie_pci_get_mmio_addr(mmio, temp_offset); temp_offset =3D le32_to_cpu(clk_adj_offsets.dev_clk_incval_h); - ptp->dev_clk_regs.incval_h =3D idpf_get_reg_addr(adapter, temp_offset); + ptp->dev_clk_regs.incval_h =3D libie_pci_get_mmio_addr(mmio, temp_offset); temp_offset =3D le32_to_cpu(clk_adj_offsets.dev_clk_shadj_l); - ptp->dev_clk_regs.shadj_l =3D idpf_get_reg_addr(adapter, temp_offset); + ptp->dev_clk_regs.shadj_l =3D libie_pci_get_mmio_addr(mmio, temp_offset); temp_offset =3D le32_to_cpu(clk_adj_offsets.dev_clk_shadj_h); - ptp->dev_clk_regs.shadj_h =3D idpf_get_reg_addr(adapter, temp_offset); + ptp->dev_clk_regs.shadj_h =3D libie_pci_get_mmio_addr(mmio, temp_offset); =20 /* PHY clock offsets */ temp_offset =3D le32_to_cpu(clk_adj_offsets.phy_clk_cmd_type); - ptp->dev_clk_regs.phy_cmd =3D idpf_get_reg_addr(adapter, temp_offset); + ptp->dev_clk_regs.phy_cmd =3D + libie_pci_get_mmio_addr(mmio, temp_offset); temp_offset =3D le32_to_cpu(clk_adj_offsets.phy_clk_incval_l); - ptp->dev_clk_regs.phy_incval_l =3D idpf_get_reg_addr(adapter, - temp_offset); + ptp->dev_clk_regs.phy_incval_l =3D + libie_pci_get_mmio_addr(mmio, temp_offset); temp_offset =3D le32_to_cpu(clk_adj_offsets.phy_clk_incval_h); - ptp->dev_clk_regs.phy_incval_h =3D idpf_get_reg_addr(adapter, - temp_offset); + ptp->dev_clk_regs.phy_incval_h =3D + libie_pci_get_mmio_addr(mmio, temp_offset); temp_offset =3D le32_to_cpu(clk_adj_offsets.phy_clk_shadj_l); - ptp->dev_clk_regs.phy_shadj_l =3D idpf_get_reg_addr(adapter, temp_offset); + ptp->dev_clk_regs.phy_shadj_l =3D + libie_pci_get_mmio_addr(mmio, temp_offset); temp_offset =3D le32_to_cpu(clk_adj_offsets.phy_clk_shadj_h); - ptp->dev_clk_regs.phy_shadj_h =3D idpf_get_reg_addr(adapter, temp_offset); + ptp->dev_clk_regs.phy_shadj_h =3D + libie_pci_get_mmio_addr(mmio, temp_offset); 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X-CSE-ConnectionGUID: +7gc2ghLSRmpVOAcLE89wg== X-CSE-MsgGUID: mbWsPGwxQPyexqLyEW0PPw== X-IronPort-AV: E=McAfee;i="6800,10657,11616"; a="76846185" X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="76846185" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Nov 2025 05:49:43 -0800 X-CSE-ConnectionGUID: 4Wa8BBEOSt6FTqHFGEJUqw== X-CSE-MsgGUID: W60yqc1kSYGfB0kTEbI4+Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="190115756" Received: from irvmail002.ir.intel.com ([10.43.11.120]) by fmviesa007.fm.intel.com with ESMTP; 17 Nov 2025 05:49:31 -0800 Received: from mglak.igk.intel.com (mglak.igk.intel.com [10.237.112.146]) by irvmail002.ir.intel.com (Postfix) with ESMTP id 02B8037E3C; Mon, 17 Nov 2025 13:49:28 +0000 (GMT) From: Larysa Zaremba To: intel-wired-lan@lists.osuosl.org, Tony Nguyen Cc: aleksander.lobakin@intel.com, sridhar.samudrala@intel.com, "Singhai, Anjali" , Michal Swiatkowski , Larysa Zaremba , "Fijalkowski, Maciej" , Emil Tantilov , Madhu Chittim , Josh Hay , "Keller, Jacob E" , jayaprakash.shanmugam@intel.com, natalia.wochtman@intel.com, Jiri Pirko , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Simon Horman , Jonathan Corbet , Richard Cochran , Przemek Kitszel , Andrew Lunn , netdev@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Aleksandr Loktionov Subject: [PATCH iwl-next v5 09/15] idpf: refactor idpf to use libie control queues Date: Mon, 17 Nov 2025 14:48:49 +0100 Message-ID: <20251117134912.18566-10-larysa.zaremba@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20251117134912.18566-1-larysa.zaremba@intel.com> References: <20251117134912.18566-1-larysa.zaremba@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Pavan Kumar Linga Support to initialize and configure controlqs, and manage their transactions was introduced in libie. As part of it, most of the existing controlq structures are renamed and modified. Use those APIs in idpf and make all the necessary changes. Previously for the send and receive virtchnl messages, there used to be a memcpy involved in controlq code to copy the buffer info passed by the send function into the controlq specific buffers. There was no restriction to use automatic memory in that case. The new implementation in libie removed copying of the send buffer info and introduced DMA mapping of the send buffer itself. To accommodate it, use dynamic memory for the larger send buffers. For smaller ones (<=3D 128 bytes) libie still can copy them into t= he pre-allocated message memory. In case of receive, idpf receives a page pool buffer allocated by the libie and care should be taken to release it after use in the idpf. The changes are fairly trivial and localized, with a notable exception being the consolidation of idpf_vc_xn_shutdown and idpf_deinit_dflt_mbx under the latter name. This has some additional consequences that are addressed in the following patches. This refactoring introduces roughly additional 40KB of module storage used for systems that only run idpf, so idpf + libie_cp + libie_pci takes about 7% more storage than just idpf before refactoring. We now pre-allocate small TX buffers, so that does increase the memory usage, but reduces the need to allocate. This results in additional 256 * 128B of memory permanently used, increasing the worst-case memory usage by 32KB but our ctlq RX buffers need to be of size 4096B anyway (not changed by the patchset), so this is hardly noticeable. As for the timings, the fact that we are mostly limited by the HW response time which is far from instant, is not changed by this refactor. Reviewed-by: Aleksandr Loktionov Signed-off-by: Pavan Kumar Linga Co-developed-by: Larysa Zaremba Signed-off-by: Larysa Zaremba --- drivers/net/ethernet/intel/idpf/Makefile | 2 - drivers/net/ethernet/intel/idpf/idpf.h | 28 +- .../net/ethernet/intel/idpf/idpf_controlq.c | 633 ------- .../net/ethernet/intel/idpf/idpf_controlq.h | 142 -- .../ethernet/intel/idpf/idpf_controlq_api.h | 177 -- .../ethernet/intel/idpf/idpf_controlq_setup.c | 171 -- drivers/net/ethernet/intel/idpf/idpf_dev.c | 60 +- .../net/ethernet/intel/idpf/idpf_ethtool.c | 20 +- drivers/net/ethernet/intel/idpf/idpf_lib.c | 67 +- drivers/net/ethernet/intel/idpf/idpf_main.c | 5 - drivers/net/ethernet/intel/idpf/idpf_mem.h | 20 - drivers/net/ethernet/intel/idpf/idpf_txrx.h | 2 +- drivers/net/ethernet/intel/idpf/idpf_vf_dev.c | 67 +- .../net/ethernet/intel/idpf/idpf_virtchnl.c | 1580 ++++++----------- .../net/ethernet/intel/idpf/idpf_virtchnl.h | 90 +- .../ethernet/intel/idpf/idpf_virtchnl_ptp.c | 239 ++- 16 files changed, 783 insertions(+), 2520 deletions(-) delete mode 100644 drivers/net/ethernet/intel/idpf/idpf_controlq.c delete mode 100644 drivers/net/ethernet/intel/idpf/idpf_controlq.h delete mode 100644 drivers/net/ethernet/intel/idpf/idpf_controlq_api.h delete mode 100644 drivers/net/ethernet/intel/idpf/idpf_controlq_setup.c delete mode 100644 drivers/net/ethernet/intel/idpf/idpf_mem.h diff --git a/drivers/net/ethernet/intel/idpf/Makefile b/drivers/net/etherne= t/intel/idpf/Makefile index 651ddee942bd..4aaafa175ec3 100644 --- a/drivers/net/ethernet/intel/idpf/Makefile +++ b/drivers/net/ethernet/intel/idpf/Makefile @@ -6,8 +6,6 @@ obj-$(CONFIG_IDPF) +=3D idpf.o =20 idpf-y :=3D \ - idpf_controlq.o \ - idpf_controlq_setup.o \ idpf_dev.o \ idpf_ethtool.o \ idpf_idc.o \ diff --git a/drivers/net/ethernet/intel/idpf/idpf.h b/drivers/net/ethernet/= intel/idpf/idpf.h index dfa7618ed261..0594f4a30f23 100644 --- a/drivers/net/ethernet/intel/idpf/idpf.h +++ b/drivers/net/ethernet/intel/idpf/idpf.h @@ -27,7 +27,6 @@ struct idpf_rss_data; #include =20 #include "idpf_txrx.h" -#include "idpf_controlq.h" =20 #define GETMAXVAL(num_bits) GENMASK((num_bits) - 1, 0) =20 @@ -37,11 +36,10 @@ struct idpf_rss_data; #define IDPF_NUM_FILTERS_PER_MSG 20 #define IDPF_NUM_DFLT_MBX_Q 2 /* includes both TX and RX */ #define IDPF_DFLT_MBX_Q_LEN 64 -#define IDPF_DFLT_MBX_ID -1 /* maximum number of times to try before resetting mailbox */ #define IDPF_MB_MAX_ERR 20 #define IDPF_NUM_CHUNKS_PER_MSG(struct_sz, chunk_sz) \ - ((IDPF_CTLQ_MAX_BUF_LEN - (struct_sz)) / (chunk_sz)) + ((LIBIE_CTLQ_MAX_BUF_LEN - (struct_sz)) / (chunk_sz)) =20 #define IDPF_WAIT_FOR_MARKER_TIMEO 500 #define IDPF_MAX_WAIT 500 @@ -202,8 +200,8 @@ struct idpf_vport_max_q { * @ptp_reg_init: PTP register initialization */ struct idpf_reg_ops { - void (*ctlq_reg_init)(struct idpf_adapter *adapter, - struct idpf_ctlq_create_info *cq); + void (*ctlq_reg_init)(struct libie_mmio_info *mmio, + struct libie_ctlq_create_info *cctlq_info); int (*intr_reg_init)(struct idpf_vport *vport, struct idpf_q_vec_rsrc *rsrc); void (*mb_intr_reg_init)(struct idpf_adapter *adapter); @@ -606,8 +604,6 @@ struct idpf_vport_config { DECLARE_BITMAP(flags, IDPF_VPORT_CONFIG_FLAGS_NBITS); }; =20 -struct idpf_vc_xn_manager; - #define idpf_for_each_vport(adapter, iter) \ for (struct idpf_vport **__##iter =3D &(adapter)->vports[0], \ *iter =3D (adapter)->max_vports ? *__##iter : NULL; \ @@ -625,8 +621,10 @@ struct idpf_vc_xn_manager; * @state: Init state machine * @flags: See enum idpf_flags * @reset_reg: See struct idpf_reset_reg - * @hw: Device access data * @ctlq_ctx: controlq context + * @asq: Send control queue info + * @arq: Receive control queue info + * @xn_init_params: Xn transaction manager parameters * @num_avail_msix: Available number of MSIX vectors * @num_msix_entries: Number of entries in MSIX table * @msix_entries: MSIX table @@ -659,7 +657,6 @@ struct idpf_vc_xn_manager; * @stats_task: Periodic statistics retrieval task * @stats_wq: Workqueue for statistics task * @caps: Negotiated capabilities with device - * @vcxn_mngr: Virtchnl transaction manager * @dev_ops: See idpf_dev_ops * @cdev_info: IDC core device info pointer * @num_vfs: Number of allocated VFs through sysfs. PF does not directly t= alk @@ -683,8 +680,10 @@ struct idpf_adapter { enum idpf_state state; DECLARE_BITMAP(flags, IDPF_FLAGS_NBITS); struct idpf_reset_reg reset_reg; - struct idpf_hw hw; struct libie_ctlq_ctx ctlq_ctx; + struct libie_ctlq_info *asq; + struct libie_ctlq_info *arq; + struct libie_ctlq_xn_init_params xn_init_params; u16 num_avail_msix; u16 num_msix_entries; struct msix_entry *msix_entries; @@ -721,7 +720,6 @@ struct idpf_adapter { struct delayed_work stats_task; struct workqueue_struct *stats_wq; struct virtchnl2_get_capabilities caps; - struct idpf_vc_xn_manager *vcxn_mngr; =20 struct idpf_dev_ops dev_ops; struct iidc_rdma_core_dev_info *cdev_info; @@ -881,12 +879,12 @@ static inline u8 idpf_get_min_tx_pkt_len(struct idpf_= adapter *adapter) */ static inline bool idpf_is_reset_detected(struct idpf_adapter *adapter) { - if (!adapter->hw.arq) + struct libie_ctlq_info *arq =3D adapter->arq; + + if (!arq) return true; =20 - return !(readl(libie_pci_get_mmio_addr(&adapter->ctlq_ctx.mmio_info, - adapter->hw.arq->reg.len)) & - adapter->hw.arq->reg.len_mask); + return !(readl(arq->reg.len) & arq->reg.len_mask); } =20 /** diff --git a/drivers/net/ethernet/intel/idpf/idpf_controlq.c b/drivers/net/= ethernet/intel/idpf/idpf_controlq.c deleted file mode 100644 index 89f6b39934d8..000000000000 --- a/drivers/net/ethernet/intel/idpf/idpf_controlq.c +++ /dev/null @@ -1,633 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* Copyright (C) 2023 Intel Corporation */ - -#include "idpf.h" - -/** - * idpf_ctlq_setup_regs - initialize control queue registers - * @cq: pointer to the specific control queue - * @q_create_info: structs containing info for each queue to be initialized - */ -static void idpf_ctlq_setup_regs(struct idpf_ctlq_info *cq, - struct idpf_ctlq_create_info *q_create_info) -{ - /* set control queue registers in our local struct */ - cq->reg.head =3D q_create_info->reg.head; - cq->reg.tail =3D q_create_info->reg.tail; - cq->reg.len =3D q_create_info->reg.len; - cq->reg.bah =3D q_create_info->reg.bah; - cq->reg.bal =3D q_create_info->reg.bal; - cq->reg.len_mask =3D q_create_info->reg.len_mask; - cq->reg.len_ena_mask =3D q_create_info->reg.len_ena_mask; - cq->reg.head_mask =3D q_create_info->reg.head_mask; -} - -/** - * idpf_ctlq_init_regs - Initialize control queue registers - * @hw: pointer to hw struct - * @cq: pointer to the specific Control queue - * @is_rxq: true if receive control queue, false otherwise - * - * Initialize registers. The caller is expected to have already initialize= d the - * descriptor ring memory and buffer memory - */ -static void idpf_ctlq_init_regs(struct idpf_hw *hw, struct idpf_ctlq_info = *cq, - bool is_rxq) -{ - struct libie_mmio_info *mmio =3D &hw->back->ctlq_ctx.mmio_info; - - /* Update tail to post pre-allocated buffers for rx queues */ - if (is_rxq) - writel((u32)(cq->ring_size - 1), - libie_pci_get_mmio_addr(mmio, cq->reg.tail)); - - /* For non-Mailbox control queues only TAIL need to be set */ - if (cq->q_id !=3D -1) - return; - - /* Clear Head for both send or receive */ - writel(0, libie_pci_get_mmio_addr(mmio, cq->reg.head)); - - /* set starting point */ - writel(lower_32_bits(cq->desc_ring.pa), - libie_pci_get_mmio_addr(mmio, cq->reg.bal)); - writel(upper_32_bits(cq->desc_ring.pa), - libie_pci_get_mmio_addr(mmio, cq->reg.bah)); - writel((cq->ring_size | cq->reg.len_ena_mask), - libie_pci_get_mmio_addr(mmio, cq->reg.len)); -} - -/** - * idpf_ctlq_init_rxq_bufs - populate receive queue descriptors with buf - * @cq: pointer to the specific Control queue - * - * Record the address of the receive queue DMA buffers in the descriptors. - * The buffers must have been previously allocated. - */ -static void idpf_ctlq_init_rxq_bufs(struct idpf_ctlq_info *cq) -{ - int i; - - for (i =3D 0; i < cq->ring_size; i++) { - struct idpf_ctlq_desc *desc =3D IDPF_CTLQ_DESC(cq, i); - struct idpf_dma_mem *bi =3D cq->bi.rx_buff[i]; - - /* No buffer to post to descriptor, continue */ - if (!bi) - continue; - - desc->flags =3D - cpu_to_le16(IDPF_CTLQ_FLAG_BUF | IDPF_CTLQ_FLAG_RD); - desc->opcode =3D 0; - desc->datalen =3D cpu_to_le16(bi->size); - desc->ret_val =3D 0; - desc->v_opcode_dtype =3D 0; - desc->v_retval =3D 0; - desc->params.indirect.addr_high =3D - cpu_to_le32(upper_32_bits(bi->pa)); - desc->params.indirect.addr_low =3D - cpu_to_le32(lower_32_bits(bi->pa)); - desc->params.indirect.param0 =3D 0; - desc->params.indirect.sw_cookie =3D 0; - desc->params.indirect.v_flags =3D 0; - } -} - -/** - * idpf_ctlq_shutdown - shutdown the CQ - * @hw: pointer to hw struct - * @cq: pointer to the specific Control queue - * - * The main shutdown routine for any controq queue - */ -static void idpf_ctlq_shutdown(struct idpf_hw *hw, struct idpf_ctlq_info *= cq) -{ - spin_lock(&cq->cq_lock); - - /* free ring buffers and the ring itself */ - idpf_ctlq_dealloc_ring_res(hw, cq); - - /* Set ring_size to 0 to indicate uninitialized queue */ - cq->ring_size =3D 0; - - spin_unlock(&cq->cq_lock); -} - -/** - * idpf_ctlq_add - add one control queue - * @hw: pointer to hardware struct - * @qinfo: info for queue to be created - * @cq_out: (output) double pointer to control queue to be created - * - * Allocate and initialize a control queue and add it to the control queue= list. - * The cq parameter will be allocated/initialized and passed back to the c= aller - * if no errors occur. - * - * Note: idpf_ctlq_init must be called prior to any calls to idpf_ctlq_add - */ -int idpf_ctlq_add(struct idpf_hw *hw, - struct idpf_ctlq_create_info *qinfo, - struct idpf_ctlq_info **cq_out) -{ - struct idpf_ctlq_info *cq; - bool is_rxq =3D false; - int err; - - cq =3D kzalloc(sizeof(*cq), GFP_KERNEL); - if (!cq) - return -ENOMEM; - - cq->cq_type =3D qinfo->type; - cq->q_id =3D qinfo->id; - cq->buf_size =3D qinfo->buf_size; - cq->ring_size =3D qinfo->len; - - cq->next_to_use =3D 0; - cq->next_to_clean =3D 0; - cq->next_to_post =3D cq->ring_size - 1; - - switch (qinfo->type) { - case IDPF_CTLQ_TYPE_MAILBOX_RX: - is_rxq =3D true; - fallthrough; - case IDPF_CTLQ_TYPE_MAILBOX_TX: - err =3D idpf_ctlq_alloc_ring_res(hw, cq); - break; - default: - err =3D -EBADR; - break; - } - - if (err) - goto init_free_q; - - if (is_rxq) { - idpf_ctlq_init_rxq_bufs(cq); - } else { - /* Allocate the array of msg pointers for TX queues */ - cq->bi.tx_msg =3D kcalloc(qinfo->len, - sizeof(struct idpf_ctlq_msg *), - GFP_KERNEL); - if (!cq->bi.tx_msg) { - err =3D -ENOMEM; - goto init_dealloc_q_mem; - } - } - - idpf_ctlq_setup_regs(cq, qinfo); - - idpf_ctlq_init_regs(hw, cq, is_rxq); - - spin_lock_init(&cq->cq_lock); - - list_add(&cq->cq_list, &hw->cq_list_head); - - *cq_out =3D cq; - - return 0; - -init_dealloc_q_mem: - /* free ring buffers and the ring itself */ - idpf_ctlq_dealloc_ring_res(hw, cq); -init_free_q: - kfree(cq); - - return err; -} - -/** - * idpf_ctlq_remove - deallocate and remove specified control queue - * @hw: pointer to hardware struct - * @cq: pointer to control queue to be removed - */ -void idpf_ctlq_remove(struct idpf_hw *hw, - struct idpf_ctlq_info *cq) -{ - list_del(&cq->cq_list); - idpf_ctlq_shutdown(hw, cq); - kfree(cq); -} - -/** - * idpf_ctlq_init - main initialization routine for all control queues - * @hw: pointer to hardware struct - * @num_q: number of queues to initialize - * @q_info: array of structs containing info for each queue to be initiali= zed - * - * This initializes any number and any type of control queues. This is an = all - * or nothing routine; if one fails, all previously allocated queues will = be - * destroyed. This must be called prior to using the individual add/remove - * APIs. - */ -int idpf_ctlq_init(struct idpf_hw *hw, u8 num_q, - struct idpf_ctlq_create_info *q_info) -{ - struct idpf_ctlq_info *cq, *tmp; - int err; - int i; - - INIT_LIST_HEAD(&hw->cq_list_head); - - for (i =3D 0; i < num_q; i++) { - struct idpf_ctlq_create_info *qinfo =3D q_info + i; - - err =3D idpf_ctlq_add(hw, qinfo, &cq); - if (err) - goto init_destroy_qs; - } - - return 0; - -init_destroy_qs: - list_for_each_entry_safe(cq, tmp, &hw->cq_list_head, cq_list) - idpf_ctlq_remove(hw, cq); - - return err; -} - -/** - * idpf_ctlq_deinit - destroy all control queues - * @hw: pointer to hw struct - */ -void idpf_ctlq_deinit(struct idpf_hw *hw) -{ - struct idpf_ctlq_info *cq, *tmp; - - list_for_each_entry_safe(cq, tmp, &hw->cq_list_head, cq_list) - idpf_ctlq_remove(hw, cq); -} - -/** - * idpf_ctlq_send - send command to Control Queue (CTQ) - * @hw: pointer to hw struct - * @cq: handle to control queue struct to send on - * @num_q_msg: number of messages to send on control queue - * @q_msg: pointer to array of queue messages to be sent - * - * The caller is expected to allocate DMAable buffers and pass them to the - * send routine via the q_msg struct / control queue specific data struct. - * The control queue will hold a reference to each send message until - * the completion for that message has been cleaned. - */ -int idpf_ctlq_send(struct idpf_hw *hw, struct idpf_ctlq_info *cq, - u16 num_q_msg, struct idpf_ctlq_msg q_msg[]) -{ - struct idpf_ctlq_desc *desc; - int num_desc_avail; - int err =3D 0; - int i; - - spin_lock(&cq->cq_lock); - - /* Ensure there are enough descriptors to send all messages */ - num_desc_avail =3D IDPF_CTLQ_DESC_UNUSED(cq); - if (num_desc_avail =3D=3D 0 || num_desc_avail < num_q_msg) { - err =3D -ENOSPC; - goto err_unlock; - } - - for (i =3D 0; i < num_q_msg; i++) { - struct idpf_ctlq_msg *msg =3D &q_msg[i]; - - desc =3D IDPF_CTLQ_DESC(cq, cq->next_to_use); - - desc->opcode =3D cpu_to_le16(msg->opcode); - desc->pfid_vfid =3D cpu_to_le16(msg->func_id); - - desc->v_opcode_dtype =3D cpu_to_le32(msg->cookie.mbx.chnl_opcode); - desc->v_retval =3D cpu_to_le32(msg->cookie.mbx.chnl_retval); - - desc->flags =3D cpu_to_le16((msg->host_id & IDPF_HOST_ID_MASK) << - IDPF_CTLQ_FLAG_HOST_ID_S); - if (msg->data_len) { - struct idpf_dma_mem *buff =3D msg->ctx.indirect.payload; - - desc->datalen |=3D cpu_to_le16(msg->data_len); - desc->flags |=3D cpu_to_le16(IDPF_CTLQ_FLAG_BUF); - desc->flags |=3D cpu_to_le16(IDPF_CTLQ_FLAG_RD); - - /* Update the address values in the desc with the pa - * value for respective buffer - */ - desc->params.indirect.addr_high =3D - cpu_to_le32(upper_32_bits(buff->pa)); - desc->params.indirect.addr_low =3D - cpu_to_le32(lower_32_bits(buff->pa)); - - memcpy(&desc->params, msg->ctx.indirect.context, - IDPF_INDIRECT_CTX_SIZE); - } else { - memcpy(&desc->params, msg->ctx.direct, - IDPF_DIRECT_CTX_SIZE); - } - - /* Store buffer info */ - cq->bi.tx_msg[cq->next_to_use] =3D msg; - - (cq->next_to_use)++; - if (cq->next_to_use =3D=3D cq->ring_size) - cq->next_to_use =3D 0; - } - - /* Force memory write to complete before letting hardware - * know that there are new descriptors to fetch. - */ - dma_wmb(); - - writel(cq->next_to_use, - libie_pci_get_mmio_addr(&hw->back->ctlq_ctx.mmio_info, - cq->reg.tail)); - -err_unlock: - spin_unlock(&cq->cq_lock); - - return err; -} - -/** - * idpf_ctlq_clean_sq - reclaim send descriptors on HW write back for the - * requested queue - * @cq: pointer to the specific Control queue - * @clean_count: (input|output) number of descriptors to clean as input, a= nd - * number of descriptors actually cleaned as output - * @msg_status: (output) pointer to msg pointer array to be populated; nee= ds - * to be allocated by caller - * - * Returns an array of message pointers associated with the cleaned - * descriptors. The pointers are to the original ctlq_msgs sent on the cle= aned - * descriptors. The status will be returned for each; any messages that f= ailed - * to send will have a non-zero status. The caller is expected to free ori= ginal - * ctlq_msgs and free or reuse the DMA buffers. - */ -int idpf_ctlq_clean_sq(struct idpf_ctlq_info *cq, u16 *clean_count, - struct idpf_ctlq_msg *msg_status[]) -{ - struct idpf_ctlq_desc *desc; - u16 i, num_to_clean; - u16 ntc, desc_err; - - if (*clean_count =3D=3D 0) - return 0; - if (*clean_count > cq->ring_size) - return -EBADR; - - spin_lock(&cq->cq_lock); - - ntc =3D cq->next_to_clean; - - num_to_clean =3D *clean_count; - - for (i =3D 0; i < num_to_clean; i++) { - /* Fetch next descriptor and check if marked as done */ - desc =3D IDPF_CTLQ_DESC(cq, ntc); - if (!(le16_to_cpu(desc->flags) & IDPF_CTLQ_FLAG_DD)) - break; - - /* Ensure no other fields are read until DD flag is checked */ - dma_rmb(); - - /* strip off FW internal code */ - desc_err =3D le16_to_cpu(desc->ret_val) & 0xff; - - msg_status[i] =3D cq->bi.tx_msg[ntc]; - msg_status[i]->status =3D desc_err; - - cq->bi.tx_msg[ntc] =3D NULL; - - /* Zero out any stale data */ - memset(desc, 0, sizeof(*desc)); - - ntc++; - if (ntc =3D=3D cq->ring_size) - ntc =3D 0; - } - - cq->next_to_clean =3D ntc; - - spin_unlock(&cq->cq_lock); - - /* Return number of descriptors actually cleaned */ - *clean_count =3D i; - - return 0; -} - -/** - * idpf_ctlq_post_rx_buffs - post buffers to descriptor ring - * @hw: pointer to hw struct - * @cq: pointer to control queue handle - * @buff_count: (input|output) input is number of buffers caller is trying= to - * return; output is number of buffers that were not posted - * @buffs: array of pointers to dma mem structs to be given to hardware - * - * Caller uses this function to return DMA buffers to the descriptor ring = after - * consuming them; buff_count will be the number of buffers. - * - * Note: this function needs to be called after a receive call even - * if there are no DMA buffers to be returned, i.e. buff_count =3D 0, - * buffs =3D NULL to support direct commands - */ -int idpf_ctlq_post_rx_buffs(struct idpf_hw *hw, struct idpf_ctlq_info *cq, - u16 *buff_count, struct idpf_dma_mem **buffs) -{ - struct idpf_ctlq_desc *desc; - u16 ntp =3D cq->next_to_post; - bool buffs_avail =3D false; - u16 tbp =3D ntp + 1; - int i =3D 0; - - if (*buff_count > cq->ring_size) - return -EBADR; - - if (*buff_count > 0) - buffs_avail =3D true; - - spin_lock(&cq->cq_lock); - - if (tbp >=3D cq->ring_size) - tbp =3D 0; - - if (tbp =3D=3D cq->next_to_clean) - /* Nothing to do */ - goto post_buffs_out; - - /* Post buffers for as many as provided or up until the last one used */ - while (ntp !=3D cq->next_to_clean) { - desc =3D IDPF_CTLQ_DESC(cq, ntp); - - if (cq->bi.rx_buff[ntp]) - goto fill_desc; - if (!buffs_avail) { - /* If the caller hasn't given us any buffers or - * there are none left, search the ring itself - * for an available buffer to move to this - * entry starting at the next entry in the ring - */ - tbp =3D ntp + 1; - - /* Wrap ring if necessary */ - if (tbp >=3D cq->ring_size) - tbp =3D 0; - - while (tbp !=3D cq->next_to_clean) { - if (cq->bi.rx_buff[tbp]) { - cq->bi.rx_buff[ntp] =3D - cq->bi.rx_buff[tbp]; - cq->bi.rx_buff[tbp] =3D NULL; - - /* Found a buffer, no need to - * search anymore - */ - break; - } - - /* Wrap ring if necessary */ - tbp++; - if (tbp >=3D cq->ring_size) - tbp =3D 0; - } - - if (tbp =3D=3D cq->next_to_clean) - goto post_buffs_out; - } else { - /* Give back pointer to DMA buffer */ - cq->bi.rx_buff[ntp] =3D buffs[i]; - i++; - - if (i >=3D *buff_count) - buffs_avail =3D false; - } - -fill_desc: - desc->flags =3D - cpu_to_le16(IDPF_CTLQ_FLAG_BUF | IDPF_CTLQ_FLAG_RD); - - /* Post buffers to descriptor */ - desc->datalen =3D cpu_to_le16(cq->bi.rx_buff[ntp]->size); - desc->params.indirect.addr_high =3D - cpu_to_le32(upper_32_bits(cq->bi.rx_buff[ntp]->pa)); - desc->params.indirect.addr_low =3D - cpu_to_le32(lower_32_bits(cq->bi.rx_buff[ntp]->pa)); - - ntp++; - if (ntp =3D=3D cq->ring_size) - ntp =3D 0; - } - -post_buffs_out: - /* Only update tail if buffers were actually posted */ - if (cq->next_to_post !=3D ntp) { - if (ntp) - /* Update next_to_post to ntp - 1 since current ntp - * will not have a buffer - */ - cq->next_to_post =3D ntp - 1; - else - /* Wrap to end of end ring since current ntp is 0 */ - cq->next_to_post =3D cq->ring_size - 1; - - dma_wmb(); - - writel(cq->next_to_post, - libie_pci_get_mmio_addr(&hw->back->ctlq_ctx.mmio_info, - cq->reg.tail)); - } - - spin_unlock(&cq->cq_lock); - - /* return the number of buffers that were not posted */ - *buff_count =3D *buff_count - i; - - return 0; -} - -/** - * idpf_ctlq_recv - receive control queue message call back - * @cq: pointer to control queue handle to receive on - * @num_q_msg: (input|output) input number of messages that should be rece= ived; - * output number of messages actually received - * @q_msg: (output) array of received control queue messages on this q; - * needs to be pre-allocated by caller for as many messages as requested - * - * Called by interrupt handler or polling mechanism. Caller is expected - * to free buffers - */ -int idpf_ctlq_recv(struct idpf_ctlq_info *cq, u16 *num_q_msg, - struct idpf_ctlq_msg *q_msg) -{ - u16 num_to_clean, ntc, flags; - struct idpf_ctlq_desc *desc; - int err =3D 0; - u16 i; - - /* take the lock before we start messing with the ring */ - spin_lock(&cq->cq_lock); - - ntc =3D cq->next_to_clean; - - num_to_clean =3D *num_q_msg; - - for (i =3D 0; i < num_to_clean; i++) { - /* Fetch next descriptor and check if marked as done */ - desc =3D IDPF_CTLQ_DESC(cq, ntc); - flags =3D le16_to_cpu(desc->flags); - - if (!(flags & IDPF_CTLQ_FLAG_DD)) - break; - - /* Ensure no other fields are read until DD flag is checked */ - dma_rmb(); - - q_msg[i].vmvf_type =3D (flags & - (IDPF_CTLQ_FLAG_FTYPE_VM | - IDPF_CTLQ_FLAG_FTYPE_PF)) >> - IDPF_CTLQ_FLAG_FTYPE_S; - - if (flags & IDPF_CTLQ_FLAG_ERR) - err =3D -EBADMSG; - - q_msg[i].cookie.mbx.chnl_opcode =3D - le32_to_cpu(desc->v_opcode_dtype); - q_msg[i].cookie.mbx.chnl_retval =3D - le32_to_cpu(desc->v_retval); - - q_msg[i].opcode =3D le16_to_cpu(desc->opcode); - q_msg[i].data_len =3D le16_to_cpu(desc->datalen); - q_msg[i].status =3D le16_to_cpu(desc->ret_val); - - if (desc->datalen) { - memcpy(q_msg[i].ctx.indirect.context, - &desc->params.indirect, IDPF_INDIRECT_CTX_SIZE); - - /* Assign pointer to dma buffer to ctlq_msg array - * to be given to upper layer - */ - q_msg[i].ctx.indirect.payload =3D cq->bi.rx_buff[ntc]; - - /* Zero out pointer to DMA buffer info; - * will be repopulated by post buffers API - */ - cq->bi.rx_buff[ntc] =3D NULL; - } else { - memcpy(q_msg[i].ctx.direct, desc->params.raw, - IDPF_DIRECT_CTX_SIZE); - } - - /* Zero out stale data in descriptor */ - memset(desc, 0, sizeof(struct idpf_ctlq_desc)); - - ntc++; - if (ntc =3D=3D cq->ring_size) - ntc =3D 0; - } - - cq->next_to_clean =3D ntc; - - spin_unlock(&cq->cq_lock); - - *num_q_msg =3D i; - if (*num_q_msg =3D=3D 0) - err =3D -ENOMSG; - - return err; -} diff --git a/drivers/net/ethernet/intel/idpf/idpf_controlq.h b/drivers/net/= ethernet/intel/idpf/idpf_controlq.h deleted file mode 100644 index acf595e9265f..000000000000 --- a/drivers/net/ethernet/intel/idpf/idpf_controlq.h +++ /dev/null @@ -1,142 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* Copyright (C) 2023 Intel Corporation */ - -#ifndef _IDPF_CONTROLQ_H_ -#define _IDPF_CONTROLQ_H_ - -#include - -#include "idpf_controlq_api.h" - -/* Maximum buffer length for all control queue types */ -#define IDPF_CTLQ_MAX_BUF_LEN 4096 - -#define IDPF_CTLQ_DESC(R, i) \ - (&(((struct idpf_ctlq_desc *)((R)->desc_ring.va))[i])) - -#define IDPF_CTLQ_DESC_UNUSED(R) \ - ((u16)((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->ring_size) + \ - (R)->next_to_clean - (R)->next_to_use - 1)) - -/* Control Queue default settings */ -#define IDPF_CTRL_SQ_CMD_TIMEOUT 250 /* msecs */ - -struct idpf_ctlq_desc { - /* Control queue descriptor flags */ - __le16 flags; - /* Control queue message opcode */ - __le16 opcode; - __le16 datalen; /* 0 for direct commands */ - union { - __le16 ret_val; - __le16 pfid_vfid; -#define IDPF_CTLQ_DESC_VF_ID_S 0 -#define IDPF_CTLQ_DESC_VF_ID_M (0x7FF << IDPF_CTLQ_DESC_VF_ID_S) -#define IDPF_CTLQ_DESC_PF_ID_S 11 -#define IDPF_CTLQ_DESC_PF_ID_M (0x1F << IDPF_CTLQ_DESC_PF_ID_S) - }; - - /* Virtchnl message opcode and virtchnl descriptor type - * v_opcode=3D[27:0], v_dtype=3D[31:28] - */ - __le32 v_opcode_dtype; - /* Virtchnl return value */ - __le32 v_retval; - union { - struct { - __le32 param0; - __le32 param1; - __le32 param2; - __le32 param3; - } direct; - struct { - __le32 param0; - __le16 sw_cookie; - /* Virtchnl flags */ - __le16 v_flags; - __le32 addr_high; - __le32 addr_low; - } indirect; - u8 raw[16]; - } params; -}; - -/* Flags sub-structure - * |0 |1 |2 |3 |4 |5 |6 |7 |8 |9 |10 |11 |12 |13 |14 |15 | - * |DD |CMP|ERR| * RSV * |FTYPE | *RSV* |RD |VFC|BUF| HOST_ID | - */ -/* command flags and offsets */ -#define IDPF_CTLQ_FLAG_DD_S 0 -#define IDPF_CTLQ_FLAG_CMP_S 1 -#define IDPF_CTLQ_FLAG_ERR_S 2 -#define IDPF_CTLQ_FLAG_FTYPE_S 6 -#define IDPF_CTLQ_FLAG_RD_S 10 -#define IDPF_CTLQ_FLAG_VFC_S 11 -#define IDPF_CTLQ_FLAG_BUF_S 12 -#define IDPF_CTLQ_FLAG_HOST_ID_S 13 - -#define IDPF_CTLQ_FLAG_DD BIT(IDPF_CTLQ_FLAG_DD_S) /* 0x1 */ -#define IDPF_CTLQ_FLAG_CMP BIT(IDPF_CTLQ_FLAG_CMP_S) /* 0x2 */ -#define IDPF_CTLQ_FLAG_ERR BIT(IDPF_CTLQ_FLAG_ERR_S) /* 0x4 */ -#define IDPF_CTLQ_FLAG_FTYPE_VM BIT(IDPF_CTLQ_FLAG_FTYPE_S) /* 0x40 */ -#define IDPF_CTLQ_FLAG_FTYPE_PF BIT(IDPF_CTLQ_FLAG_FTYPE_S + 1) /* 0x80 = */ -#define IDPF_CTLQ_FLAG_RD BIT(IDPF_CTLQ_FLAG_RD_S) /* 0x400 */ -#define IDPF_CTLQ_FLAG_VFC BIT(IDPF_CTLQ_FLAG_VFC_S) /* 0x800 */ -#define IDPF_CTLQ_FLAG_BUF BIT(IDPF_CTLQ_FLAG_BUF_S) /* 0x1000 */ - -/* Host ID is a special field that has 3b and not a 1b flag */ -#define IDPF_CTLQ_FLAG_HOST_ID_M MAKE_MASK(0x7000UL, IDPF_CTLQ_FLAG_HOST_I= D_S) - -struct idpf_mbxq_desc { - u8 pad[8]; /* CTLQ flags/opcode/len/retval fields */ - u32 chnl_opcode; /* avoid confusion with desc->opcode */ - u32 chnl_retval; /* ditto for desc->retval */ - u32 pf_vf_id; /* used by CP when sending to PF */ -}; - -/* Max number of MMIO regions not including the mailbox and rstat regions = in - * the fallback case when the whole bar is mapped. - */ -#define IDPF_MMIO_MAP_FALLBACK_MAX_REMAINING 3 - -struct idpf_mmio_reg { - void __iomem *vaddr; - resource_size_t addr_start; - resource_size_t addr_len; -}; - -/* Define the driver hardware struct to replace other control structs as n= eeded - * Align to ctlq_hw_info - */ -struct idpf_hw { - /* Array of remaining LAN BAR regions */ - int num_lan_regs; - struct idpf_mmio_reg *lan_regs; - - struct idpf_adapter *back; - - /* control queue - send and receive */ - struct idpf_ctlq_info *asq; - struct idpf_ctlq_info *arq; - - /* pci info */ - u16 device_id; - u16 vendor_id; - u16 subsystem_device_id; - u16 subsystem_vendor_id; - u8 revision_id; - bool adapter_stopped; - - struct list_head cq_list_head; -}; - -int idpf_ctlq_alloc_ring_res(struct idpf_hw *hw, - struct idpf_ctlq_info *cq); - -void idpf_ctlq_dealloc_ring_res(struct idpf_hw *hw, struct idpf_ctlq_info = *cq); - -/* prototype for functions used for dynamic memory allocation */ -void *idpf_alloc_dma_mem(struct idpf_hw *hw, struct idpf_dma_mem *mem, - u64 size); -void idpf_free_dma_mem(struct idpf_hw *hw, struct idpf_dma_mem *mem); -#endif /* _IDPF_CONTROLQ_H_ */ diff --git a/drivers/net/ethernet/intel/idpf/idpf_controlq_api.h b/drivers/= net/ethernet/intel/idpf/idpf_controlq_api.h deleted file mode 100644 index 3414c5f9a831..000000000000 --- a/drivers/net/ethernet/intel/idpf/idpf_controlq_api.h +++ /dev/null @@ -1,177 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* Copyright (C) 2023 Intel Corporation */ - -#ifndef _IDPF_CONTROLQ_API_H_ -#define _IDPF_CONTROLQ_API_H_ - -#include "idpf_mem.h" - -struct idpf_hw; - -/* Used for queue init, response and events */ -enum idpf_ctlq_type { - IDPF_CTLQ_TYPE_MAILBOX_TX =3D 0, - IDPF_CTLQ_TYPE_MAILBOX_RX =3D 1, - IDPF_CTLQ_TYPE_CONFIG_TX =3D 2, - IDPF_CTLQ_TYPE_CONFIG_RX =3D 3, - IDPF_CTLQ_TYPE_EVENT_RX =3D 4, - IDPF_CTLQ_TYPE_RDMA_TX =3D 5, - IDPF_CTLQ_TYPE_RDMA_RX =3D 6, - IDPF_CTLQ_TYPE_RDMA_COMPL =3D 7 -}; - -/* Generic Control Queue Structures */ -struct idpf_ctlq_reg { - /* used for queue tracking */ - u32 head; - u32 tail; - /* Below applies only to default mb (if present) */ - u32 len; - u32 bah; - u32 bal; - u32 len_mask; - u32 len_ena_mask; - u32 head_mask; -}; - -/* Generic queue msg structure */ -struct idpf_ctlq_msg { - u8 vmvf_type; /* represents the source of the message on recv */ -#define IDPF_VMVF_TYPE_VF 0 -#define IDPF_VMVF_TYPE_VM 1 -#define IDPF_VMVF_TYPE_PF 2 - u8 host_id; - /* 3b field used only when sending a message to CP - to be used in - * combination with target func_id to route the message - */ -#define IDPF_HOST_ID_MASK 0x7 - - u16 opcode; - u16 data_len; /* data_len =3D 0 when no payload is attached */ - union { - u16 func_id; /* when sending a message */ - u16 status; /* when receiving a message */ - }; - union { - struct { - u32 chnl_opcode; - u32 chnl_retval; - } mbx; - } cookie; - union { -#define IDPF_DIRECT_CTX_SIZE 16 -#define IDPF_INDIRECT_CTX_SIZE 8 - /* 16 bytes of context can be provided or 8 bytes of context - * plus the address of a DMA buffer - */ - u8 direct[IDPF_DIRECT_CTX_SIZE]; - struct { - u8 context[IDPF_INDIRECT_CTX_SIZE]; - struct idpf_dma_mem *payload; - } indirect; - struct { - u32 rsvd; - u16 data; - u16 flags; - } sw_cookie; - } ctx; -}; - -/* Generic queue info structures */ -/* MB, CONFIG and EVENT q do not have extended info */ -struct idpf_ctlq_create_info { - enum idpf_ctlq_type type; - int id; /* absolute queue offset passed as input - * -1 for default mailbox if present - */ - u16 len; /* Queue length passed as input */ - u16 buf_size; /* buffer size passed as input */ - u64 base_address; /* output, HPA of the Queue start */ - struct idpf_ctlq_reg reg; /* registers accessed by ctlqs */ - - int ext_info_size; - void *ext_info; /* Specific to q type */ -}; - -/* Control Queue information */ -struct idpf_ctlq_info { - struct list_head cq_list; - - enum idpf_ctlq_type cq_type; - int q_id; - spinlock_t cq_lock; /* control queue lock */ - /* used for interrupt processing */ - u16 next_to_use; - u16 next_to_clean; - u16 next_to_post; /* starting descriptor to post buffers - * to after recev - */ - - struct idpf_dma_mem desc_ring; /* descriptor ring memory - * idpf_dma_mem is defined in OSdep.h - */ - union { - struct idpf_dma_mem **rx_buff; - struct idpf_ctlq_msg **tx_msg; - } bi; - - u16 buf_size; /* queue buffer size */ - u16 ring_size; /* Number of descriptors */ - struct idpf_ctlq_reg reg; /* registers accessed by ctlqs */ -}; - -/** - * enum idpf_mbx_opc - PF/VF mailbox commands - * @idpf_mbq_opc_send_msg_to_cp: used by PF or VF to send a message to its= CP - * @idpf_mbq_opc_send_msg_to_peer_drv: used by PF or VF to send a message = to - * any peer driver - */ -enum idpf_mbx_opc { - idpf_mbq_opc_send_msg_to_cp =3D 0x0801, - idpf_mbq_opc_send_msg_to_peer_drv =3D 0x0804, -}; - -/* API supported for control queue management */ -/* Will init all required q including default mb. "q_info" is an array of - * create_info structs equal to the number of control queues to be created. - */ -int idpf_ctlq_init(struct idpf_hw *hw, u8 num_q, - struct idpf_ctlq_create_info *q_info); - -/* Allocate and initialize a single control queue, which will be added to = the - * control queue list; returns a handle to the created control queue - */ -int idpf_ctlq_add(struct idpf_hw *hw, - struct idpf_ctlq_create_info *qinfo, - struct idpf_ctlq_info **cq); - -/* Deinitialize and deallocate a single control queue */ -void idpf_ctlq_remove(struct idpf_hw *hw, - struct idpf_ctlq_info *cq); - -/* Sends messages to HW and will also free the buffer*/ -int idpf_ctlq_send(struct idpf_hw *hw, - struct idpf_ctlq_info *cq, - u16 num_q_msg, - struct idpf_ctlq_msg q_msg[]); - -/* Receives messages and called by interrupt handler/polling - * initiated by app/process. Also caller is supposed to free the buffers - */ -int idpf_ctlq_recv(struct idpf_ctlq_info *cq, u16 *num_q_msg, - struct idpf_ctlq_msg *q_msg); - -/* Reclaims send descriptors on HW write back */ -int idpf_ctlq_clean_sq(struct idpf_ctlq_info *cq, u16 *clean_count, - struct idpf_ctlq_msg *msg_status[]); - -/* Indicate RX buffers are done being processed */ -int idpf_ctlq_post_rx_buffs(struct idpf_hw *hw, - struct idpf_ctlq_info *cq, - u16 *buff_count, - struct idpf_dma_mem **buffs); - -/* Will destroy all q including the default mb */ -void idpf_ctlq_deinit(struct idpf_hw *hw); - -#endif /* _IDPF_CONTROLQ_API_H_ */ diff --git a/drivers/net/ethernet/intel/idpf/idpf_controlq_setup.c b/driver= s/net/ethernet/intel/idpf/idpf_controlq_setup.c deleted file mode 100644 index a942a6385d06..000000000000 --- a/drivers/net/ethernet/intel/idpf/idpf_controlq_setup.c +++ /dev/null @@ -1,171 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* Copyright (C) 2023 Intel Corporation */ - -#include "idpf_controlq.h" - -/** - * idpf_ctlq_alloc_desc_ring - Allocate Control Queue (CQ) rings - * @hw: pointer to hw struct - * @cq: pointer to the specific Control queue - */ -static int idpf_ctlq_alloc_desc_ring(struct idpf_hw *hw, - struct idpf_ctlq_info *cq) -{ - size_t size =3D cq->ring_size * sizeof(struct idpf_ctlq_desc); - - cq->desc_ring.va =3D idpf_alloc_dma_mem(hw, &cq->desc_ring, size); - if (!cq->desc_ring.va) - return -ENOMEM; - - return 0; -} - -/** - * idpf_ctlq_alloc_bufs - Allocate Control Queue (CQ) buffers - * @hw: pointer to hw struct - * @cq: pointer to the specific Control queue - * - * Allocate the buffer head for all control queues, and if it's a receive - * queue, allocate DMA buffers - */ -static int idpf_ctlq_alloc_bufs(struct idpf_hw *hw, - struct idpf_ctlq_info *cq) -{ - int i; - - /* Do not allocate DMA buffers for transmit queues */ - if (cq->cq_type =3D=3D IDPF_CTLQ_TYPE_MAILBOX_TX) - return 0; - - /* We'll be allocating the buffer info memory first, then we can - * allocate the mapped buffers for the event processing - */ - cq->bi.rx_buff =3D kcalloc(cq->ring_size, sizeof(struct idpf_dma_mem *), - GFP_KERNEL); - if (!cq->bi.rx_buff) - return -ENOMEM; - - /* allocate the mapped buffers (except for the last one) */ - for (i =3D 0; i < cq->ring_size - 1; i++) { - struct idpf_dma_mem *bi; - int num =3D 1; /* number of idpf_dma_mem to be allocated */ - - cq->bi.rx_buff[i] =3D kcalloc(num, sizeof(struct idpf_dma_mem), - GFP_KERNEL); - if (!cq->bi.rx_buff[i]) - goto unwind_alloc_cq_bufs; - - bi =3D cq->bi.rx_buff[i]; - - bi->va =3D idpf_alloc_dma_mem(hw, bi, cq->buf_size); - if (!bi->va) { - /* unwind will not free the failed entry */ - kfree(cq->bi.rx_buff[i]); - goto unwind_alloc_cq_bufs; - } - } - - return 0; - -unwind_alloc_cq_bufs: - /* don't try to free the one that failed... */ - i--; - for (; i >=3D 0; i--) { - idpf_free_dma_mem(hw, cq->bi.rx_buff[i]); - kfree(cq->bi.rx_buff[i]); - } - kfree(cq->bi.rx_buff); - - return -ENOMEM; -} - -/** - * idpf_ctlq_free_desc_ring - Free Control Queue (CQ) rings - * @hw: pointer to hw struct - * @cq: pointer to the specific Control queue - * - * This assumes the posted send buffers have already been cleaned - * and de-allocated - */ -static void idpf_ctlq_free_desc_ring(struct idpf_hw *hw, - struct idpf_ctlq_info *cq) -{ - idpf_free_dma_mem(hw, &cq->desc_ring); -} - -/** - * idpf_ctlq_free_bufs - Free CQ buffer info elements - * @hw: pointer to hw struct - * @cq: pointer to the specific Control queue - * - * Free the DMA buffers for RX queues, and DMA buffer header for both RX a= nd TX - * queues. The upper layers are expected to manage freeing of TX DMA buff= ers - */ -static void idpf_ctlq_free_bufs(struct idpf_hw *hw, struct idpf_ctlq_info = *cq) -{ - void *bi; - - if (cq->cq_type =3D=3D IDPF_CTLQ_TYPE_MAILBOX_RX) { - int i; - - /* free DMA buffers for rx queues*/ - for (i =3D 0; i < cq->ring_size; i++) { - if (cq->bi.rx_buff[i]) { - idpf_free_dma_mem(hw, cq->bi.rx_buff[i]); - kfree(cq->bi.rx_buff[i]); - } - } - - bi =3D (void *)cq->bi.rx_buff; - } else { - bi =3D (void *)cq->bi.tx_msg; - } - - /* free the buffer header */ - kfree(bi); -} - -/** - * idpf_ctlq_dealloc_ring_res - Free memory allocated for control queue - * @hw: pointer to hw struct - * @cq: pointer to the specific Control queue - * - * Free the memory used by the ring, buffers and other related structures - */ -void idpf_ctlq_dealloc_ring_res(struct idpf_hw *hw, struct idpf_ctlq_info = *cq) -{ - /* free ring buffers and the ring itself */ - idpf_ctlq_free_bufs(hw, cq); - idpf_ctlq_free_desc_ring(hw, cq); -} - -/** - * idpf_ctlq_alloc_ring_res - allocate memory for descriptor ring and bufs - * @hw: pointer to hw struct - * @cq: pointer to control queue struct - * - * Do *NOT* hold cq_lock when calling this as the memory allocation routin= es - * called are not going to be atomic context safe - */ -int idpf_ctlq_alloc_ring_res(struct idpf_hw *hw, struct idpf_ctlq_info *cq) -{ - int err; - - /* allocate the ring memory */ - err =3D idpf_ctlq_alloc_desc_ring(hw, cq); - if (err) - return err; - - /* allocate buffers in the rings */ - err =3D idpf_ctlq_alloc_bufs(hw, cq); - if (err) - goto idpf_init_cq_free_ring; - - /* success! */ - return 0; - -idpf_init_cq_free_ring: - idpf_free_dma_mem(hw, &cq->desc_ring); - - return err; -} diff --git a/drivers/net/ethernet/intel/idpf/idpf_dev.c b/drivers/net/ether= net/intel/idpf/idpf_dev.c index 3a9355d40c90..9a8ce2396cf7 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_dev.c +++ b/drivers/net/ethernet/intel/idpf/idpf_dev.c @@ -10,44 +10,32 @@ =20 /** * idpf_ctlq_reg_init - initialize default mailbox registers - * @adapter: adapter structure - * @cq: pointer to the array of create control queues + * @mmio: struct that contains MMIO region info + * @cci: struct where the register offset pointer to be copied to */ -static void idpf_ctlq_reg_init(struct idpf_adapter *adapter, - struct idpf_ctlq_create_info *cq) +static void idpf_ctlq_reg_init(struct libie_mmio_info *mmio, + struct libie_ctlq_create_info *cci) { - int i; - - for (i =3D 0; i < IDPF_NUM_DFLT_MBX_Q; i++) { - struct idpf_ctlq_create_info *ccq =3D cq + i; - - switch (ccq->type) { - case IDPF_CTLQ_TYPE_MAILBOX_TX: - /* set head and tail registers in our local struct */ - ccq->reg.head =3D PF_FW_ATQH; - ccq->reg.tail =3D PF_FW_ATQT; - ccq->reg.len =3D PF_FW_ATQLEN; - ccq->reg.bah =3D PF_FW_ATQBAH; - ccq->reg.bal =3D PF_FW_ATQBAL; - ccq->reg.len_mask =3D PF_FW_ATQLEN_ATQLEN_M; - ccq->reg.len_ena_mask =3D PF_FW_ATQLEN_ATQENABLE_M; - ccq->reg.head_mask =3D PF_FW_ATQH_ATQH_M; - break; - case IDPF_CTLQ_TYPE_MAILBOX_RX: - /* set head and tail registers in our local struct */ - ccq->reg.head =3D PF_FW_ARQH; - ccq->reg.tail =3D PF_FW_ARQT; - ccq->reg.len =3D PF_FW_ARQLEN; - ccq->reg.bah =3D PF_FW_ARQBAH; - ccq->reg.bal =3D PF_FW_ARQBAL; - ccq->reg.len_mask =3D PF_FW_ARQLEN_ARQLEN_M; - ccq->reg.len_ena_mask =3D PF_FW_ARQLEN_ARQENABLE_M; - ccq->reg.head_mask =3D PF_FW_ARQH_ARQH_M; - break; - default: - break; - } - } + struct libie_ctlq_reg *tx_reg =3D &cci[LIBIE_CTLQ_TYPE_TX].reg; + struct libie_ctlq_reg *rx_reg =3D &cci[LIBIE_CTLQ_TYPE_RX].reg; + + tx_reg->head =3D libie_pci_get_mmio_addr(mmio, PF_FW_ATQH); + tx_reg->tail =3D libie_pci_get_mmio_addr(mmio, PF_FW_ATQT); + tx_reg->len =3D libie_pci_get_mmio_addr(mmio, PF_FW_ATQLEN); + tx_reg->addr_high =3D libie_pci_get_mmio_addr(mmio, PF_FW_ATQBAH); + tx_reg->addr_low =3D libie_pci_get_mmio_addr(mmio, PF_FW_ATQBAL); + tx_reg->len_mask =3D PF_FW_ATQLEN_ATQLEN_M; + tx_reg->len_ena_mask =3D PF_FW_ATQLEN_ATQENABLE_M; + tx_reg->head_mask =3D PF_FW_ATQH_ATQH_M; + + rx_reg->head =3D libie_pci_get_mmio_addr(mmio, PF_FW_ARQH); + rx_reg->tail =3D libie_pci_get_mmio_addr(mmio, PF_FW_ARQT); + rx_reg->len =3D libie_pci_get_mmio_addr(mmio, PF_FW_ARQLEN); + rx_reg->addr_high =3D libie_pci_get_mmio_addr(mmio, PF_FW_ARQBAH); + rx_reg->addr_low =3D libie_pci_get_mmio_addr(mmio, PF_FW_ARQBAL); + rx_reg->len_mask =3D PF_FW_ARQLEN_ARQLEN_M; + rx_reg->len_ena_mask =3D PF_FW_ARQLEN_ARQENABLE_M; + rx_reg->head_mask =3D PF_FW_ARQH_ARQH_M; } =20 /** diff --git a/drivers/net/ethernet/intel/idpf/idpf_ethtool.c b/drivers/net/e= thernet/intel/idpf/idpf_ethtool.c index 0b283852ad7c..961e5fec5e43 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_ethtool.c +++ b/drivers/net/ethernet/intel/idpf/idpf_ethtool.c @@ -207,7 +207,7 @@ static int idpf_add_flow_steer(struct net_device *netde= v, spin_unlock_bh(&vport_config->flow_steer_list_lock); =20 if (err) - goto out; + goto out_free_fltr; =20 rule->vport_id =3D cpu_to_le32(vport->vport_id); rule->count =3D cpu_to_le32(1); @@ -233,18 +233,15 @@ static int idpf_add_flow_steer(struct net_device *net= dev, idpf_fsteer_fill_tcp(hdrs, fsp, true); break; default: - err =3D -EINVAL; - goto out; + goto out_free_fltr; } =20 err =3D idpf_add_del_fsteer_filters(vport->adapter, rule, VIRTCHNL2_OP_ADD_FLOW_RULE); - if (err) - goto out; - - if (info->status !=3D cpu_to_le32(VIRTCHNL2_FLOW_RULE_SUCCESS)) { - err =3D -EIO; - goto out; + if (err || info->status !=3D cpu_to_le32(VIRTCHNL2_FLOW_RULE_SUCCESS)) { + /* virtchnl2 rule is already consumed */ + kfree(fltr); + return err; } =20 /* Save a copy of the user's flow spec so ethtool can later retrieve it */ @@ -256,9 +253,10 @@ static int idpf_add_flow_steer(struct net_device *netd= ev, =20 user_config->num_fsteer_fltrs++; spin_unlock_bh(&vport_config->flow_steer_list_lock); - goto out_free_rule; =20 -out: + return 0; + +out_free_fltr: kfree(fltr); out_free_rule: kfree(rule); diff --git a/drivers/net/ethernet/intel/idpf/idpf_lib.c b/drivers/net/ether= net/intel/idpf/idpf_lib.c index e15b1e8effc8..7751a81fc29d 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_lib.c +++ b/drivers/net/ethernet/intel/idpf/idpf_lib.c @@ -1363,6 +1363,7 @@ void idpf_statistics_task(struct work_struct *work) */ void idpf_mbx_task(struct work_struct *work) { + struct libie_ctlq_xn_recv_params xn_params; struct idpf_adapter *adapter; =20 adapter =3D container_of(work, struct idpf_adapter, mbx_task.work); @@ -1373,7 +1374,14 @@ void idpf_mbx_task(struct work_struct *work) queue_delayed_work(adapter->mbx_wq, &adapter->mbx_task, usecs_to_jiffies(300)); =20 - idpf_recv_mb_msg(adapter, adapter->hw.arq); + xn_params =3D (struct libie_ctlq_xn_recv_params) { + .xnm =3D adapter->xn_init_params.xnm, + .ctlq =3D adapter->arq, + .ctlq_msg_handler =3D idpf_recv_event_msg, + .budget =3D LIBIE_CTLQ_MAX_XN_ENTRIES, + }; + + libie_ctlq_xn_recv(&xn_params); } =20 /** @@ -1907,7 +1915,6 @@ static void idpf_init_hard_reset(struct idpf_adapter = *adapter) idpf_vc_core_deinit(adapter); if (!is_reset) reg_ops->trigger_reset(adapter, IDPF_HR_FUNC_RESET); - idpf_deinit_dflt_mbx(adapter); } else { dev_err(dev, "Unhandled hard reset cause\n"); err =3D -EBADRQC; @@ -1972,19 +1979,11 @@ void idpf_vc_event_task(struct work_struct *work) if (test_bit(IDPF_REMOVE_IN_PROG, adapter->flags)) return; =20 - if (test_bit(IDPF_HR_FUNC_RESET, adapter->flags)) - goto func_reset; - - if (test_bit(IDPF_HR_DRV_LOAD, adapter->flags)) - goto drv_load; - - return; - -func_reset: - idpf_vc_xn_shutdown(adapter->vcxn_mngr); -drv_load: - set_bit(IDPF_HR_RESET_IN_PROG, adapter->flags); - idpf_init_hard_reset(adapter); + if (test_bit(IDPF_HR_FUNC_RESET, adapter->flags) || + test_bit(IDPF_HR_DRV_LOAD, adapter->flags)) { + set_bit(IDPF_HR_RESET_IN_PROG, adapter->flags); + idpf_init_hard_reset(adapter); + } } =20 /** @@ -2577,44 +2576,6 @@ static int idpf_set_mac(struct net_device *netdev, v= oid *p) return err; } =20 -/** - * idpf_alloc_dma_mem - Allocate dma memory - * @hw: pointer to hw struct - * @mem: pointer to dma_mem struct - * @size: size of the memory to allocate - */ -void *idpf_alloc_dma_mem(struct idpf_hw *hw, struct idpf_dma_mem *mem, u64= size) -{ - struct idpf_adapter *adapter =3D hw->back; - size_t sz =3D ALIGN(size, 4096); - - /* The control queue resources are freed under a spinlock, contiguous - * pages will avoid IOMMU remapping and the use vmap (and vunmap in - * dma_free_*() path. - */ - mem->va =3D dma_alloc_attrs(&adapter->pdev->dev, sz, &mem->pa, - GFP_KERNEL, DMA_ATTR_FORCE_CONTIGUOUS); - mem->size =3D sz; - - return mem->va; -} - -/** - * idpf_free_dma_mem - Free the allocated dma memory - * @hw: pointer to hw struct - * @mem: pointer to dma_mem struct - */ -void idpf_free_dma_mem(struct idpf_hw *hw, struct idpf_dma_mem *mem) -{ - struct idpf_adapter *adapter =3D hw->back; - - dma_free_attrs(&adapter->pdev->dev, mem->size, - mem->va, mem->pa, DMA_ATTR_FORCE_CONTIGUOUS); - mem->size =3D 0; - mem->va =3D NULL; - mem->pa =3D 0; -} - static int idpf_hwtstamp_set(struct net_device *netdev, struct kernel_hwtstamp_config *config, struct netlink_ext_ack *extack) diff --git a/drivers/net/ethernet/intel/idpf/idpf_main.c b/drivers/net/ethe= rnet/intel/idpf/idpf_main.c index 9da02ce42605..5458a07ecf54 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_main.c +++ b/drivers/net/ethernet/intel/idpf/idpf_main.c @@ -125,7 +125,6 @@ static void idpf_remove(struct pci_dev *pdev) =20 /* Be a good citizen and leave the device clean on exit */ adapter->dev_ops.reg_ops.trigger_reset(adapter, IDPF_HR_FUNC_RESET); - idpf_deinit_dflt_mbx(adapter); =20 if (!adapter->netdevs) goto destroy_wqs; @@ -162,8 +161,6 @@ static void idpf_remove(struct pci_dev *pdev) adapter->vport_config =3D NULL; kfree(adapter->netdevs); adapter->netdevs =3D NULL; - kfree(adapter->vcxn_mngr); - adapter->vcxn_mngr =3D NULL; =20 mutex_destroy(&adapter->vport_ctrl_lock); mutex_destroy(&adapter->vector_lock); @@ -186,7 +183,6 @@ static void idpf_shutdown(struct pci_dev *pdev) cancel_delayed_work_sync(&adapter->serv_task); cancel_delayed_work_sync(&adapter->vc_event_task); idpf_vc_core_deinit(adapter); - idpf_deinit_dflt_mbx(adapter); =20 if (system_state =3D=3D SYSTEM_POWER_OFF) pci_set_power_state(pdev, PCI_D3hot); @@ -238,7 +234,6 @@ static int idpf_cfg_device(struct idpf_adapter *adapter) pci_dbg(pdev, "PCIe PTM is not supported by PCIe bus/controller\n"); =20 pci_set_drvdata(pdev, adapter); - adapter->hw.back =3D adapter; =20 return 0; } diff --git a/drivers/net/ethernet/intel/idpf/idpf_mem.h b/drivers/net/ether= net/intel/idpf/idpf_mem.h deleted file mode 100644 index 2aaabdc02dd2..000000000000 --- a/drivers/net/ethernet/intel/idpf/idpf_mem.h +++ /dev/null @@ -1,20 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* Copyright (C) 2023 Intel Corporation */ - -#ifndef _IDPF_MEM_H_ -#define _IDPF_MEM_H_ - -#include - -struct idpf_dma_mem { - void *va; - dma_addr_t pa; - size_t size; -}; - -#define idpf_mbx_wr32(a, reg, value) writel((value), ((a)->mbx.vaddr + (re= g))) -#define idpf_mbx_rd32(a, reg) readl((a)->mbx.vaddr + (reg)) -#define idpf_mbx_wr64(a, reg, value) writeq((value), ((a)->mbx.vaddr + (re= g))) -#define idpf_mbx_rd64(a, reg) readq((a)->mbx.vaddr + (reg)) - -#endif /* _IDPF_MEM_H_ */ diff --git a/drivers/net/ethernet/intel/idpf/idpf_txrx.h b/drivers/net/ethe= rnet/intel/idpf/idpf_txrx.h index e8ca0186ac01..6796f010e382 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_txrx.h +++ b/drivers/net/ethernet/intel/idpf/idpf_txrx.h @@ -236,7 +236,7 @@ enum idpf_tx_ctx_desc_eipt_offload { (sizeof(u16) * IDPF_RX_MAX_PTYPE_PROTO_IDS)) #define IDPF_RX_PTYPE_HDR_SZ sizeof(struct virtchnl2_get_ptype_info) #define IDPF_RX_MAX_PTYPES_PER_BUF \ - DIV_ROUND_DOWN_ULL((IDPF_CTLQ_MAX_BUF_LEN - IDPF_RX_PTYPE_HDR_SZ), \ + DIV_ROUND_DOWN_ULL(LIBIE_CTLQ_MAX_BUF_LEN - IDPF_RX_PTYPE_HDR_SZ, \ IDPF_RX_MAX_PTYPE_SZ) =20 #define IDPF_GET_PTYPE_SIZE(p) struct_size((p), proto_id, (p)->proto_id_co= unt) diff --git a/drivers/net/ethernet/intel/idpf/idpf_vf_dev.c b/drivers/net/et= hernet/intel/idpf/idpf_vf_dev.c index b7aa9538435e..f492ee241e56 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_vf_dev.c +++ b/drivers/net/ethernet/intel/idpf/idpf_vf_dev.c @@ -9,45 +9,32 @@ =20 /** * idpf_vf_ctlq_reg_init - initialize default mailbox registers - * @adapter: adapter structure - * @cq: pointer to the array of create control queues + * @mmio: struct that contains MMIO region info + * @cci: struct where the register offset pointer to be copied to */ -static void idpf_vf_ctlq_reg_init(struct idpf_adapter *adapter, - struct idpf_ctlq_create_info *cq) +static void idpf_vf_ctlq_reg_init(struct libie_mmio_info *mmio, + struct libie_ctlq_create_info *cci) { - resource_size_t mbx_start =3D adapter->dev_ops.static_reg_info[0].start; - int i; - - for (i =3D 0; i < IDPF_NUM_DFLT_MBX_Q; i++) { - struct idpf_ctlq_create_info *ccq =3D cq + i; - - switch (ccq->type) { - case IDPF_CTLQ_TYPE_MAILBOX_TX: - /* set head and tail registers in our local struct */ - ccq->reg.head =3D VF_ATQH - mbx_start; - ccq->reg.tail =3D VF_ATQT - mbx_start; - ccq->reg.len =3D VF_ATQLEN - mbx_start; - ccq->reg.bah =3D VF_ATQBAH - mbx_start; - ccq->reg.bal =3D VF_ATQBAL - mbx_start; - ccq->reg.len_mask =3D VF_ATQLEN_ATQLEN_M; - ccq->reg.len_ena_mask =3D VF_ATQLEN_ATQENABLE_M; - ccq->reg.head_mask =3D VF_ATQH_ATQH_M; - break; - case IDPF_CTLQ_TYPE_MAILBOX_RX: - /* set head and tail registers in our local struct */ - ccq->reg.head =3D VF_ARQH - mbx_start; - ccq->reg.tail =3D VF_ARQT - mbx_start; - ccq->reg.len =3D VF_ARQLEN - mbx_start; - ccq->reg.bah =3D VF_ARQBAH - mbx_start; - ccq->reg.bal =3D VF_ARQBAL - mbx_start; - ccq->reg.len_mask =3D VF_ARQLEN_ARQLEN_M; - ccq->reg.len_ena_mask =3D VF_ARQLEN_ARQENABLE_M; - ccq->reg.head_mask =3D VF_ARQH_ARQH_M; - break; - default: - break; - } - } + struct libie_ctlq_reg *tx_reg =3D &cci[LIBIE_CTLQ_TYPE_TX].reg; + struct libie_ctlq_reg *rx_reg =3D &cci[LIBIE_CTLQ_TYPE_RX].reg; + + tx_reg->head =3D libie_pci_get_mmio_addr(mmio, VF_ATQH); + tx_reg->tail =3D libie_pci_get_mmio_addr(mmio, VF_ATQT); + tx_reg->len =3D libie_pci_get_mmio_addr(mmio, VF_ATQLEN); + tx_reg->addr_high =3D libie_pci_get_mmio_addr(mmio, VF_ATQBAH); + tx_reg->addr_low =3D libie_pci_get_mmio_addr(mmio, VF_ATQBAL); + tx_reg->len_mask =3D VF_ATQLEN_ATQLEN_M; + tx_reg->len_ena_mask =3D VF_ATQLEN_ATQENABLE_M; + tx_reg->head_mask =3D VF_ATQH_ATQH_M; + + rx_reg->head =3D libie_pci_get_mmio_addr(mmio, VF_ARQH); + rx_reg->tail =3D libie_pci_get_mmio_addr(mmio, VF_ARQT); + rx_reg->len =3D libie_pci_get_mmio_addr(mmio, VF_ARQLEN); + rx_reg->addr_high =3D libie_pci_get_mmio_addr(mmio, VF_ARQBAH); + rx_reg->addr_low =3D libie_pci_get_mmio_addr(mmio, VF_ARQBAL); + rx_reg->len_mask =3D VF_ARQLEN_ARQLEN_M; + rx_reg->len_ena_mask =3D VF_ARQLEN_ARQENABLE_M; + rx_reg->head_mask =3D VF_ARQH_ARQH_M; } =20 /** @@ -161,11 +148,13 @@ static void idpf_vf_reset_reg_init(struct idpf_adapte= r *adapter) static void idpf_vf_trigger_reset(struct idpf_adapter *adapter, enum idpf_flags trig_cause) { + struct libie_ctlq_xn_send_params xn_params =3D { + .chnl_opcode =3D VIRTCHNL2_OP_RESET_VF, + }; /* Do not send VIRTCHNL2_OP_RESET_VF message on driver unload */ if (trig_cause =3D=3D IDPF_HR_FUNC_RESET && !test_bit(IDPF_REMOVE_IN_PROG, adapter->flags)) - idpf_send_mb_msg(adapter, adapter->hw.asq, - VIRTCHNL2_OP_RESET_VF, 0, NULL, 0); + idpf_send_mb_msg(adapter, &xn_params, NULL, 0); } =20 /** diff --git a/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c b/drivers/net/= ethernet/intel/idpf/idpf_virtchnl.c index 278247e456f4..132bbe5b9d7d 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c +++ b/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c @@ -9,20 +9,6 @@ #include "idpf_virtchnl.h" #include "idpf_ptp.h" =20 -/** - * struct idpf_vc_xn_manager - Manager for tracking transactions - * @ring: backing and lookup for transactions - * @free_xn_bm: bitmap for free transactions - * @xn_bm_lock: make bitmap access synchronous where necessary - * @salt: used to make cookie unique every message - */ -struct idpf_vc_xn_manager { - struct idpf_vc_xn ring[IDPF_VC_XN_RING_LEN]; - DECLARE_BITMAP(free_xn_bm, IDPF_VC_XN_RING_LEN); - spinlock_t xn_bm_lock; - u8 salt; -}; - /** * idpf_vid_to_vport - Translate vport id to vport pointer * @adapter: private data struct @@ -83,37 +69,43 @@ static void idpf_handle_event_link(struct idpf_adapter = *adapter, =20 /** * idpf_recv_event_msg - Receive virtchnl event message - * @adapter: Driver specific private structure + * @ctx: control queue context * @ctlq_msg: message to copy from * * Receive virtchnl event message */ -static void idpf_recv_event_msg(struct idpf_adapter *adapter, - struct idpf_ctlq_msg *ctlq_msg) +void idpf_recv_event_msg(struct libie_ctlq_ctx *ctx, + struct libie_ctlq_msg *ctlq_msg) { - int payload_size =3D ctlq_msg->ctx.indirect.payload->size; + struct kvec *buff =3D &ctlq_msg->recv_mem; + int payload_size =3D buff->iov_len; + struct idpf_adapter *adapter; struct virtchnl2_event *v2e; u32 event; =20 + adapter =3D container_of(ctx, struct idpf_adapter, ctlq_ctx); if (payload_size < sizeof(*v2e)) { dev_err_ratelimited(&adapter->pdev->dev, "Failed to receive valid payloa= d for event msg (op %d len %d)\n", - ctlq_msg->cookie.mbx.chnl_opcode, + ctlq_msg->chnl_opcode, payload_size); - return; + goto free_rx_buf; } =20 - v2e =3D (struct virtchnl2_event *)ctlq_msg->ctx.indirect.payload->va; + v2e =3D (struct virtchnl2_event *)buff->iov_base; event =3D le32_to_cpu(v2e->event); =20 switch (event) { case VIRTCHNL2_EVENT_LINK_CHANGE: idpf_handle_event_link(adapter, v2e); - return; + break; default: dev_err(&adapter->pdev->dev, "Unknown event %d from PF\n", event); break; } + +free_rx_buf: + libie_ctlq_release_rx_buf(buff); } =20 /** @@ -121,41 +113,19 @@ static void idpf_recv_event_msg(struct idpf_adapter *= adapter, * @adapter: driver specific private structure * @asq: send control queue info * - * Reclaim the send mailbox queue entries to be used to send further messa= ges - * - * Returns 0 on success, negative on failure + * This is a helper function to clean the send mailbox queue entries. */ -static int idpf_mb_clean(struct idpf_adapter *adapter, - struct idpf_ctlq_info *asq) +static void idpf_mb_clean(struct idpf_adapter *adapter, + struct libie_ctlq_info *asq) { - u16 i, num_q_msg =3D IDPF_DFLT_MBX_Q_LEN; - struct idpf_ctlq_msg **q_msg; - struct idpf_dma_mem *dma_mem; - int err; - - q_msg =3D kcalloc(num_q_msg, sizeof(struct idpf_ctlq_msg *), GFP_ATOMIC); - if (!q_msg) - return -ENOMEM; - - err =3D idpf_ctlq_clean_sq(asq, &num_q_msg, q_msg); - if (err) - goto err_kfree; - - for (i =3D 0; i < num_q_msg; i++) { - if (!q_msg[i]) - continue; - dma_mem =3D q_msg[i]->ctx.indirect.payload; - if (dma_mem) - dma_free_coherent(&adapter->pdev->dev, dma_mem->size, - dma_mem->va, dma_mem->pa); - kfree(q_msg[i]); - kfree(dma_mem); - } - -err_kfree: - kfree(q_msg); + struct libie_ctlq_xn_clean_params clean_params =3D { + .ctx =3D &adapter->ctlq_ctx, + .ctlq =3D asq, + .rel_tx_buf =3D kfree, + .num_msgs =3D IDPF_DFLT_MBX_Q_LEN, + }; =20 - return err; + libie_ctlq_xn_send_clean(&clean_params); } =20 #if IS_ENABLED(CONFIG_PTP_1588_CLOCK) @@ -189,7 +159,7 @@ static bool idpf_ptp_is_mb_msg(u32 op) * @ctlq_msg: Corresponding control queue message */ static void idpf_prepare_ptp_mb_msg(struct idpf_adapter *adapter, u32 op, - struct idpf_ctlq_msg *ctlq_msg) + struct libie_ctlq_msg *ctlq_msg) { /* If the message is PTP-related and the secondary mailbox is available, * send the message through the secondary mailbox. @@ -197,525 +167,83 @@ static void idpf_prepare_ptp_mb_msg(struct idpf_adap= ter *adapter, u32 op, if (!idpf_ptp_is_mb_msg(op) || !adapter->ptp->secondary_mbx.valid) return; =20 - ctlq_msg->opcode =3D idpf_mbq_opc_send_msg_to_peer_drv; + ctlq_msg->opcode =3D LIBIE_CTLQ_SEND_MSG_TO_PEER; ctlq_msg->func_id =3D adapter->ptp->secondary_mbx.peer_mbx_q_id; - ctlq_msg->host_id =3D adapter->ptp->secondary_mbx.peer_id; + ctlq_msg->flags =3D FIELD_PREP(LIBIE_CTLQ_DESC_FLAG_HOST_ID, + adapter->ptp->secondary_mbx.peer_id); } #else /* !CONFIG_PTP_1588_CLOCK */ static void idpf_prepare_ptp_mb_msg(struct idpf_adapter *adapter, u32 op, - struct idpf_ctlq_msg *ctlq_msg) + struct libie_ctlq_msg *ctlq_msg) { } #endif /* CONFIG_PTP_1588_CLOCK */ =20 /** - * idpf_send_mb_msg - Send message over mailbox + * idpf_send_mb_msg - send mailbox message to the device control plane * @adapter: driver specific private structure - * @asq: control queue to send message to - * @op: virtchnl opcode - * @msg_size: size of the payload - * @msg: pointer to buffer holding the payload - * @cookie: unique SW generated cookie per message + * @xn_params: Xn send parameters to fill + * @send_buf: buffer to send + * @send_buf_size: size of the send buffer * - * Will prepare the control queue message and initiates the send api + * Fill the Xn parameters with the required info to send a virtchnl messag= e. + * The send buffer is DMA mapped in the libie to avoid memcpy. * - * Returns 0 on success, negative on failure - */ -int idpf_send_mb_msg(struct idpf_adapter *adapter, struct idpf_ctlq_info *= asq, - u32 op, u16 msg_size, u8 *msg, u16 cookie) -{ - struct idpf_ctlq_msg *ctlq_msg; - struct idpf_dma_mem *dma_mem; - int err; - - /* If we are here and a reset is detected nothing much can be - * done. This thread should silently abort and expected to - * be corrected with a new run either by user or driver - * flows after reset - */ - if (idpf_is_reset_detected(adapter)) - return 0; - - err =3D idpf_mb_clean(adapter, asq); - if (err) - return err; - - ctlq_msg =3D kzalloc(sizeof(*ctlq_msg), GFP_ATOMIC); - if (!ctlq_msg) - return -ENOMEM; - - dma_mem =3D kzalloc(sizeof(*dma_mem), GFP_ATOMIC); - if (!dma_mem) { - err =3D -ENOMEM; - goto dma_mem_error; - } - - ctlq_msg->opcode =3D idpf_mbq_opc_send_msg_to_cp; - ctlq_msg->func_id =3D 0; - - idpf_prepare_ptp_mb_msg(adapter, op, ctlq_msg); - - ctlq_msg->data_len =3D msg_size; - ctlq_msg->cookie.mbx.chnl_opcode =3D op; - ctlq_msg->cookie.mbx.chnl_retval =3D 0; - dma_mem->size =3D IDPF_CTLQ_MAX_BUF_LEN; - dma_mem->va =3D dma_alloc_coherent(&adapter->pdev->dev, dma_mem->size, - &dma_mem->pa, GFP_ATOMIC); - if (!dma_mem->va) { - err =3D -ENOMEM; - goto dma_alloc_error; - } - - /* It's possible we're just sending an opcode but no buffer */ - if (msg && msg_size) - memcpy(dma_mem->va, msg, msg_size); - ctlq_msg->ctx.indirect.payload =3D dma_mem; - ctlq_msg->ctx.sw_cookie.data =3D cookie; - - err =3D idpf_ctlq_send(&adapter->hw, asq, 1, ctlq_msg); - if (err) - goto send_error; - - return 0; - -send_error: - dma_free_coherent(&adapter->pdev->dev, dma_mem->size, dma_mem->va, - dma_mem->pa); -dma_alloc_error: - kfree(dma_mem); -dma_mem_error: - kfree(ctlq_msg); - - return err; -} - -/* API for virtchnl "transaction" support ("xn" for short). - * - * We are reusing the completion lock to serialize the accesses to the - * transaction state for simplicity, but it could be its own separate sync= hro - * as well. For now, this API is only used from within a workqueue context; - * raw_spin_lock() is enough. - */ -/** - * idpf_vc_xn_lock - Request exclusive access to vc transaction - * @xn: struct idpf_vc_xn* to access - */ -#define idpf_vc_xn_lock(xn) \ - raw_spin_lock(&(xn)->completed.wait.lock) - -/** - * idpf_vc_xn_unlock - Release exclusive access to vc transaction - * @xn: struct idpf_vc_xn* to access - */ -#define idpf_vc_xn_unlock(xn) \ - raw_spin_unlock(&(xn)->completed.wait.lock) - -/** - * idpf_vc_xn_release_bufs - Release reference to reply buffer(s) and - * reset the transaction state. - * @xn: struct idpf_vc_xn to update - */ -static void idpf_vc_xn_release_bufs(struct idpf_vc_xn *xn) -{ - xn->reply.iov_base =3D NULL; - xn->reply.iov_len =3D 0; - - if (xn->state !=3D IDPF_VC_XN_SHUTDOWN) - xn->state =3D IDPF_VC_XN_IDLE; -} - -/** - * idpf_vc_xn_init - Initialize virtchnl transaction object - * @vcxn_mngr: pointer to vc transaction manager struct - */ -static void idpf_vc_xn_init(struct idpf_vc_xn_manager *vcxn_mngr) -{ - int i; - - spin_lock_init(&vcxn_mngr->xn_bm_lock); - - for (i =3D 0; i < ARRAY_SIZE(vcxn_mngr->ring); i++) { - struct idpf_vc_xn *xn =3D &vcxn_mngr->ring[i]; - - xn->state =3D IDPF_VC_XN_IDLE; - xn->idx =3D i; - idpf_vc_xn_release_bufs(xn); - init_completion(&xn->completed); - } - - bitmap_fill(vcxn_mngr->free_xn_bm, IDPF_VC_XN_RING_LEN); -} - -/** - * idpf_vc_xn_shutdown - Uninitialize virtchnl transaction object - * @vcxn_mngr: pointer to vc transaction manager struct - * - * All waiting threads will be woken-up and their transaction aborted. Fur= ther - * operations on that object will fail. - */ -void idpf_vc_xn_shutdown(struct idpf_vc_xn_manager *vcxn_mngr) -{ - int i; - - spin_lock_bh(&vcxn_mngr->xn_bm_lock); - bitmap_zero(vcxn_mngr->free_xn_bm, IDPF_VC_XN_RING_LEN); - spin_unlock_bh(&vcxn_mngr->xn_bm_lock); - - for (i =3D 0; i < ARRAY_SIZE(vcxn_mngr->ring); i++) { - struct idpf_vc_xn *xn =3D &vcxn_mngr->ring[i]; - - idpf_vc_xn_lock(xn); - xn->state =3D IDPF_VC_XN_SHUTDOWN; - idpf_vc_xn_release_bufs(xn); - idpf_vc_xn_unlock(xn); - complete_all(&xn->completed); - } -} - -/** - * idpf_vc_xn_pop_free - Pop a free transaction from free list - * @vcxn_mngr: transaction manager to pop from - * - * Returns NULL if no free transactions - */ -static -struct idpf_vc_xn *idpf_vc_xn_pop_free(struct idpf_vc_xn_manager *vcxn_mng= r) -{ - struct idpf_vc_xn *xn =3D NULL; - unsigned long free_idx; - - spin_lock_bh(&vcxn_mngr->xn_bm_lock); - free_idx =3D find_first_bit(vcxn_mngr->free_xn_bm, IDPF_VC_XN_RING_LEN); - if (free_idx =3D=3D IDPF_VC_XN_RING_LEN) - goto do_unlock; - - clear_bit(free_idx, vcxn_mngr->free_xn_bm); - xn =3D &vcxn_mngr->ring[free_idx]; - xn->salt =3D vcxn_mngr->salt++; - -do_unlock: - spin_unlock_bh(&vcxn_mngr->xn_bm_lock); - - return xn; -} - -/** - * idpf_vc_xn_push_free - Push a free transaction to free list - * @vcxn_mngr: transaction manager to push to - * @xn: transaction to push - */ -static void idpf_vc_xn_push_free(struct idpf_vc_xn_manager *vcxn_mngr, - struct idpf_vc_xn *xn) -{ - idpf_vc_xn_release_bufs(xn); - set_bit(xn->idx, vcxn_mngr->free_xn_bm); -} - -/** - * idpf_vc_xn_exec - Perform a send/recv virtchnl transaction - * @adapter: driver specific private structure with vcxn_mngr - * @params: parameters for this particular transaction including - * -vc_op: virtchannel operation to send - * -send_buf: kvec iov for send buf and len - * -recv_buf: kvec iov for recv buf and len (ignored if NULL) - * -timeout_ms: timeout waiting for a reply (milliseconds) - * -async: don't wait for message reply, will lose caller context - * -async_handler: callback to handle async replies - * - * @returns >=3D 0 for success, the size of the initial reply (may or may = not be - * >=3D @recv_buf.iov_len, but we never overflow @@recv_buf_iov_base). < 0= for - * error. - */ -ssize_t idpf_vc_xn_exec(struct idpf_adapter *adapter, - const struct idpf_vc_xn_params *params) -{ - const struct kvec *send_buf =3D ¶ms->send_buf; - struct idpf_vc_xn *xn; - ssize_t retval; - u16 cookie; - - xn =3D idpf_vc_xn_pop_free(adapter->vcxn_mngr); - /* no free transactions available */ - if (!xn) - return -ENOSPC; - - idpf_vc_xn_lock(xn); - if (xn->state =3D=3D IDPF_VC_XN_SHUTDOWN) { - retval =3D -ENXIO; - goto only_unlock; - } else if (xn->state !=3D IDPF_VC_XN_IDLE) { - /* We're just going to clobber this transaction even though - * it's not IDLE. If we don't reuse it we could theoretically - * eventually leak all the free transactions and not be able to - * send any messages. At least this way we make an attempt to - * remain functional even though something really bad is - * happening that's corrupting what was supposed to be free - * transactions. - */ - WARN_ONCE(1, "There should only be idle transactions in free list (idx %= d op %d)\n", - xn->idx, xn->vc_op); - } - - xn->reply =3D params->recv_buf; - xn->reply_sz =3D 0; - xn->state =3D params->async ? IDPF_VC_XN_ASYNC : IDPF_VC_XN_WAITING; - xn->vc_op =3D params->vc_op; - xn->async_handler =3D params->async_handler; - idpf_vc_xn_unlock(xn); - - if (!params->async) - reinit_completion(&xn->completed); - cookie =3D FIELD_PREP(IDPF_VC_XN_SALT_M, xn->salt) | - FIELD_PREP(IDPF_VC_XN_IDX_M, xn->idx); - - retval =3D idpf_send_mb_msg(adapter, adapter->hw.asq, params->vc_op, - send_buf->iov_len, send_buf->iov_base, - cookie); - if (retval) { - idpf_vc_xn_lock(xn); - goto release_and_unlock; - } - - if (params->async) - return 0; - - wait_for_completion_timeout(&xn->completed, - msecs_to_jiffies(params->timeout_ms)); - - /* No need to check the return value; we check the final state of the - * transaction below. It's possible the transaction actually gets more - * timeout than specified if we get preempted here but after - * wait_for_completion_timeout returns. This should be non-issue - * however. - */ - idpf_vc_xn_lock(xn); - switch (xn->state) { - case IDPF_VC_XN_SHUTDOWN: - retval =3D -ENXIO; - goto only_unlock; - case IDPF_VC_XN_WAITING: - dev_notice_ratelimited(&adapter->pdev->dev, - "Transaction timed-out (op:%d cookie:%04x vc_op:%d salt:%02x ti= meout:%dms)\n", - params->vc_op, cookie, xn->vc_op, - xn->salt, params->timeout_ms); - retval =3D -ETIME; - break; - case IDPF_VC_XN_COMPLETED_SUCCESS: - retval =3D xn->reply_sz; - break; - case IDPF_VC_XN_COMPLETED_FAILED: - dev_notice_ratelimited(&adapter->pdev->dev, "Transaction failed (op %d)\= n", - params->vc_op); - retval =3D -EIO; - break; - default: - /* Invalid state. */ - WARN_ON_ONCE(1); - retval =3D -EIO; - break; - } - -release_and_unlock: - idpf_vc_xn_push_free(adapter->vcxn_mngr, xn); - /* If we receive a VC reply after here, it will be dropped. */ -only_unlock: - idpf_vc_xn_unlock(xn); - - return retval; -} - -/** - * idpf_vc_xn_forward_async - Handle async reply receives - * @adapter: private data struct - * @xn: transaction to handle - * @ctlq_msg: corresponding ctlq_msg + * Cleanup the mailbox queue entries of the previously sent message to + * unmap and release the buffer. * - * For async sends we're going to lose the caller's context so, if an - * async_handler was provided, it can deal with the reply, otherwise we'll= just - * check and report if there is an error. + * Return: 0 if sending was successful or reset in detected, + * negative error code on failure. */ -static int -idpf_vc_xn_forward_async(struct idpf_adapter *adapter, struct idpf_vc_xn *= xn, - const struct idpf_ctlq_msg *ctlq_msg) +int idpf_send_mb_msg(struct idpf_adapter *adapter, + struct libie_ctlq_xn_send_params *xn_params, + void *send_buf, size_t send_buf_size) { - int err =3D 0; + struct libie_ctlq_msg ctlq_msg =3D {}; =20 - if (ctlq_msg->cookie.mbx.chnl_opcode !=3D xn->vc_op) { - dev_err_ratelimited(&adapter->pdev->dev, "Async message opcode does not = match transaction opcode (msg: %d) (xn: %d)\n", - ctlq_msg->cookie.mbx.chnl_opcode, xn->vc_op); - xn->reply_sz =3D 0; - err =3D -EINVAL; - goto release_bufs; - } + if (idpf_is_reset_detected(adapter)) { + if (!libie_cp_can_send_onstack(send_buf_size)) + kfree(send_buf); =20 - if (xn->async_handler) { - err =3D xn->async_handler(adapter, xn, ctlq_msg); - goto release_bufs; + return -EBUSY; } =20 - if (ctlq_msg->cookie.mbx.chnl_retval) { - xn->reply_sz =3D 0; - dev_err_ratelimited(&adapter->pdev->dev, "Async message failure (op %d)\= n", - ctlq_msg->cookie.mbx.chnl_opcode); - err =3D -EINVAL; - } + idpf_prepare_ptp_mb_msg(adapter, xn_params->chnl_opcode, &ctlq_msg); + xn_params->ctlq_msg =3D ctlq_msg.opcode ? &ctlq_msg : NULL; =20 -release_bufs: - idpf_vc_xn_push_free(adapter->vcxn_mngr, xn); + xn_params->send_buf.iov_base =3D send_buf; + xn_params->send_buf.iov_len =3D send_buf_size; + xn_params->xnm =3D adapter->xn_init_params.xnm; + xn_params->ctlq =3D xn_params->ctlq ? xn_params->ctlq : adapter->asq; + xn_params->rel_tx_buf =3D kfree; =20 - return err; -} - -/** - * idpf_vc_xn_forward_reply - copy a reply back to receiving thread - * @adapter: driver specific private structure with vcxn_mngr - * @ctlq_msg: controlq message to send back to receiving thread - */ -static int -idpf_vc_xn_forward_reply(struct idpf_adapter *adapter, - const struct idpf_ctlq_msg *ctlq_msg) -{ - const void *payload =3D NULL; - size_t payload_size =3D 0; - struct idpf_vc_xn *xn; - u16 msg_info; - int err =3D 0; - u16 xn_idx; - u16 salt; - - msg_info =3D ctlq_msg->ctx.sw_cookie.data; - xn_idx =3D FIELD_GET(IDPF_VC_XN_IDX_M, msg_info); - if (xn_idx >=3D ARRAY_SIZE(adapter->vcxn_mngr->ring)) { - dev_err_ratelimited(&adapter->pdev->dev, "Out of bounds cookie received:= %02x\n", - xn_idx); - return -EINVAL; - } - xn =3D &adapter->vcxn_mngr->ring[xn_idx]; - idpf_vc_xn_lock(xn); - salt =3D FIELD_GET(IDPF_VC_XN_SALT_M, msg_info); - if (xn->salt !=3D salt) { - dev_err_ratelimited(&adapter->pdev->dev, "Transaction salt does not matc= h (exp:%d@%02x(%d) !=3D got:%d@%02x)\n", - xn->vc_op, xn->salt, xn->state, - ctlq_msg->cookie.mbx.chnl_opcode, salt); - idpf_vc_xn_unlock(xn); - return -EINVAL; - } - - switch (xn->state) { - case IDPF_VC_XN_WAITING: - /* success */ - break; - case IDPF_VC_XN_IDLE: - dev_err_ratelimited(&adapter->pdev->dev, "Unexpected or belated VC reply= (op %d)\n", - ctlq_msg->cookie.mbx.chnl_opcode); - err =3D -EINVAL; - goto out_unlock; - case IDPF_VC_XN_SHUTDOWN: - /* ENXIO is a bit special here as the recv msg loop uses that - * know if it should stop trying to clean the ring if we lost - * the virtchnl. We need to stop playing with registers and - * yield. - */ - err =3D -ENXIO; - goto out_unlock; - case IDPF_VC_XN_ASYNC: - err =3D idpf_vc_xn_forward_async(adapter, xn, ctlq_msg); - idpf_vc_xn_unlock(xn); - return err; - default: - dev_err_ratelimited(&adapter->pdev->dev, "Overwriting VC reply (op %d)\n= ", - ctlq_msg->cookie.mbx.chnl_opcode); - err =3D -EBUSY; - goto out_unlock; - } - - if (ctlq_msg->cookie.mbx.chnl_opcode !=3D xn->vc_op) { - dev_err_ratelimited(&adapter->pdev->dev, "Message opcode does not match = transaction opcode (msg: %d) (xn: %d)\n", - ctlq_msg->cookie.mbx.chnl_opcode, xn->vc_op); - xn->reply_sz =3D 0; - xn->state =3D IDPF_VC_XN_COMPLETED_FAILED; - err =3D -EINVAL; - goto out_unlock; - } - - if (ctlq_msg->cookie.mbx.chnl_retval) { - xn->reply_sz =3D 0; - xn->state =3D IDPF_VC_XN_COMPLETED_FAILED; - err =3D -EINVAL; - goto out_unlock; - } - - if (ctlq_msg->data_len) { - payload =3D ctlq_msg->ctx.indirect.payload->va; - payload_size =3D ctlq_msg->data_len; - } + idpf_mb_clean(adapter, xn_params->ctlq); =20 - xn->reply_sz =3D payload_size; - xn->state =3D IDPF_VC_XN_COMPLETED_SUCCESS; - - if (xn->reply.iov_base && xn->reply.iov_len && payload_size) - memcpy(xn->reply.iov_base, payload, - min_t(size_t, xn->reply.iov_len, payload_size)); - -out_unlock: - idpf_vc_xn_unlock(xn); - /* we _cannot_ hold lock while calling complete */ - complete(&xn->completed); - - return err; + return libie_ctlq_xn_send(xn_params); } =20 /** - * idpf_recv_mb_msg - Receive message over mailbox + * idpf_send_mb_msg_kfree - send mailbox message and free the send buffer * @adapter: driver specific private structure - * @arq: control queue to receive message from + * @xn_params: Xn send parameters to fill + * @send_buf: buffer to send, can be released with kfree() + * @send_buf_size: size of the send buffer * - * Will receive control queue message and posts the receive buffer. Return= s 0 - * on success and negative on failure. + * libie_cp functions consume only buffers above certain size, + * smaller buffers are assumed to be on the stack. However, for some + * commands with variable message size it makes sense to always use kzallo= c(), + * which means we have to free smaller buffers ourselves. + * + * Return: 0 if no unexpected errors were encountered, + * negative error code otherwise. */ -int idpf_recv_mb_msg(struct idpf_adapter *adapter, struct idpf_ctlq_info *= arq) +static int idpf_send_mb_msg_kfree(struct idpf_adapter *adapter, + struct libie_ctlq_xn_send_params *xn_params, + void *send_buf, size_t send_buf_size) { - struct idpf_ctlq_msg ctlq_msg; - struct idpf_dma_mem *dma_mem; - int post_err, err; - u16 num_recv; - - while (1) { - /* This will get <=3D num_recv messages and output how many - * actually received on num_recv. - */ - num_recv =3D 1; - err =3D idpf_ctlq_recv(arq, &num_recv, &ctlq_msg); - if (err || !num_recv) - break; + int err =3D idpf_send_mb_msg(adapter, xn_params, send_buf, send_buf_size); =20 - if (ctlq_msg.data_len) { - dma_mem =3D ctlq_msg.ctx.indirect.payload; - } else { - dma_mem =3D NULL; - num_recv =3D 0; - } - - if (ctlq_msg.cookie.mbx.chnl_opcode =3D=3D VIRTCHNL2_OP_EVENT) - idpf_recv_event_msg(adapter, &ctlq_msg); - else - err =3D idpf_vc_xn_forward_reply(adapter, &ctlq_msg); - - post_err =3D idpf_ctlq_post_rx_buffs(&adapter->hw, arq, - &num_recv, &dma_mem); - - /* If post failed clear the only buffer we supplied */ - if (post_err) { - if (dma_mem) - dma_free_coherent(&adapter->pdev->dev, - dma_mem->size, dma_mem->va, - dma_mem->pa); - break; - } - - /* virtchnl trying to shutdown, stop cleaning */ - if (err =3D=3D -ENXIO) - break; - } + if (libie_cp_can_send_onstack(send_buf_size)) + kfree(send_buf); =20 return err; } @@ -765,45 +293,41 @@ struct idpf_queue_set *idpf_alloc_queue_set(struct id= pf_adapter *adapter, static int idpf_send_chunked_msg(struct idpf_adapter *adapter, const struct idpf_chunked_msg_params *params) { - struct idpf_vc_xn_params xn_params =3D { - .vc_op =3D params->vc_op, + struct libie_ctlq_xn_send_params xn_params =3D { .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, + .chnl_opcode =3D params->vc_op, }; const void *pos =3D params->chunks; - u32 num_chunks, num_msgs, buf_sz; - void *buf __free(kfree) =3D NULL; u32 totqs =3D params->num_chunks; u32 vid =3D params->vport_id; + u32 num_chunks, num_msgs; =20 - num_chunks =3D min(IDPF_NUM_CHUNKS_PER_MSG(params->config_sz, - params->chunk_sz), totqs); + num_chunks =3D IDPF_NUM_CHUNKS_PER_MSG(params->config_sz, + params->chunk_sz); num_msgs =3D DIV_ROUND_UP(totqs, num_chunks); =20 - buf_sz =3D params->config_sz + num_chunks * params->chunk_sz; - buf =3D kzalloc(buf_sz, GFP_KERNEL); - if (!buf) - return -ENOMEM; - - xn_params.send_buf.iov_base =3D buf; - for (u32 i =3D 0; i < num_msgs; i++) { - ssize_t reply_sz; + u32 buf_sz; + void *buf; + int err; =20 - memset(buf, 0, buf_sz); - xn_params.send_buf.iov_len =3D buf_sz; + num_chunks =3D min(num_chunks, totqs); + buf_sz =3D params->config_sz + num_chunks * params->chunk_sz; + buf =3D kzalloc(buf_sz, GFP_KERNEL); + if (!buf) + return -ENOMEM; =20 if (params->prepare_msg(vid, buf, pos, num_chunks) !=3D buf_sz) return -EINVAL; =20 - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); - if (reply_sz < 0) - return reply_sz; + err =3D idpf_send_mb_msg_kfree(adapter, &xn_params, buf, buf_sz); + if (err) + return err; =20 + libie_ctlq_release_rx_buf(&xn_params.recv_mem); + xn_params.recv_mem =3D (struct kvec) {}; pos +=3D num_chunks * params->chunk_sz; totqs -=3D num_chunks; - - num_chunks =3D min(num_chunks, totqs); - buf_sz =3D params->config_sz + num_chunks * params->chunk_sz; } =20 return 0; @@ -878,11 +402,14 @@ static int idpf_wait_for_marker_event(struct idpf_vpo= rt *vport) */ static int idpf_send_ver_msg(struct idpf_adapter *adapter) { - struct idpf_vc_xn_params xn_params =3D {}; + struct libie_ctlq_xn_send_params xn_params =3D { + .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, + .chnl_opcode =3D VIRTCHNL2_OP_VERSION, + }; + struct virtchnl2_version_info *vvi_recv; struct virtchnl2_version_info vvi; - ssize_t reply_sz; u32 major, minor; - int err =3D 0; + int err; =20 if (adapter->virt_ver_maj) { vvi.major =3D cpu_to_le32(adapter->virt_ver_maj); @@ -892,24 +419,23 @@ static int idpf_send_ver_msg(struct idpf_adapter *ada= pter) vvi.minor =3D cpu_to_le32(IDPF_VIRTCHNL_VERSION_MINOR); } =20 - xn_params.vc_op =3D VIRTCHNL2_OP_VERSION; - xn_params.send_buf.iov_base =3D &vvi; - xn_params.send_buf.iov_len =3D sizeof(vvi); - xn_params.recv_buf =3D xn_params.send_buf; - xn_params.timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC; + err =3D idpf_send_mb_msg(adapter, &xn_params, &vvi, sizeof(vvi)); + if (err) + return err; =20 - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); - if (reply_sz < 0) - return reply_sz; - if (reply_sz < sizeof(vvi)) - return -EIO; + if (xn_params.recv_mem.iov_len < sizeof(*vvi_recv)) { + err =3D -EIO; + goto free_rx_buf; + } =20 - major =3D le32_to_cpu(vvi.major); - minor =3D le32_to_cpu(vvi.minor); + vvi_recv =3D xn_params.recv_mem.iov_base; + major =3D le32_to_cpu(vvi_recv->major); + minor =3D le32_to_cpu(vvi_recv->minor); =20 if (major > IDPF_VIRTCHNL_VERSION_MAJOR) { dev_warn(&adapter->pdev->dev, "Virtchnl major version greater than suppo= rted\n"); - return -EINVAL; + err =3D -EINVAL; + goto free_rx_buf; } =20 if (major =3D=3D IDPF_VIRTCHNL_VERSION_MAJOR && @@ -927,6 +453,9 @@ static int idpf_send_ver_msg(struct idpf_adapter *adapt= er) adapter->virt_ver_maj =3D major; adapter->virt_ver_min =3D minor; =20 +free_rx_buf: + libie_ctlq_release_rx_buf(&xn_params.recv_mem); + return err; } =20 @@ -939,9 +468,12 @@ static int idpf_send_ver_msg(struct idpf_adapter *adap= ter) */ static int idpf_send_get_caps_msg(struct idpf_adapter *adapter) { + struct libie_ctlq_xn_send_params xn_params =3D { + .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, + .chnl_opcode =3D VIRTCHNL2_OP_GET_CAPS, + }; struct virtchnl2_get_capabilities caps =3D {}; - struct idpf_vc_xn_params xn_params =3D {}; - ssize_t reply_sz; + int err; =20 caps.csum_caps =3D cpu_to_le32(VIRTCHNL2_CAP_TX_CSUM_L3_IPV4 | @@ -1001,20 +533,22 @@ static int idpf_send_get_caps_msg(struct idpf_adapte= r *adapter) VIRTCHNL2_CAP_LOOPBACK | VIRTCHNL2_CAP_PTP); =20 - xn_params.vc_op =3D VIRTCHNL2_OP_GET_CAPS; - xn_params.send_buf.iov_base =3D ∩︀ - xn_params.send_buf.iov_len =3D sizeof(caps); - xn_params.recv_buf.iov_base =3D &adapter->caps; - xn_params.recv_buf.iov_len =3D sizeof(adapter->caps); - xn_params.timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC; - - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); - if (reply_sz < 0) - return reply_sz; - if (reply_sz < sizeof(adapter->caps)) - return -EIO; + err =3D idpf_send_mb_msg(adapter, &xn_params, &caps, sizeof(caps)); + if (err) + return err; =20 - return 0; + if (xn_params.recv_mem.iov_len < sizeof(adapter->caps)) { + err =3D -EIO; + goto free_rx_buf; + } + + memcpy(&adapter->caps, xn_params.recv_mem.iov_base, + sizeof(adapter->caps)); + +free_rx_buf: + libie_ctlq_release_rx_buf(&xn_params.recv_mem); + + return err; } =20 /** @@ -1059,32 +593,29 @@ static void idpf_decfg_lan_memory_regions(struct idp= f_adapter *adapter) */ static int idpf_cfg_lan_memory_regions(struct idpf_adapter *adapter) { - struct virtchnl2_get_lan_memory_regions *rcvd_regions __free(kfree); - struct idpf_vc_xn_params xn_params =3D { - .vc_op =3D VIRTCHNL2_OP_GET_LAN_MEMORY_REGIONS, - .recv_buf.iov_len =3D IDPF_CTLQ_MAX_BUF_LEN, + struct libie_ctlq_xn_send_params xn_params =3D { + .chnl_opcode =3D VIRTCHNL2_OP_GET_LAN_MEMORY_REGIONS, .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, }; - int num_regions, size; - ssize_t reply_sz; + struct virtchnl2_get_lan_memory_regions send_regions =3D {}; + struct virtchnl2_get_lan_memory_regions *rcvd_regions; + size_t reply_sz, size; + int num_regions; int err =3D 0; =20 - rcvd_regions =3D kzalloc(IDPF_CTLQ_MAX_BUF_LEN, GFP_KERNEL); - if (!rcvd_regions) - return -ENOMEM; - - xn_params.recv_buf.iov_base =3D rcvd_regions; - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); - if (reply_sz < 0) - return reply_sz; + err =3D idpf_send_mb_msg(adapter, &xn_params, &send_regions, + sizeof(send_regions)); + if (err) + return err; =20 + rcvd_regions =3D xn_params.recv_mem.iov_base; + reply_sz =3D xn_params.recv_mem.iov_len; num_regions =3D le16_to_cpu(rcvd_regions->num_memory_regions); size =3D struct_size(rcvd_regions, mem_reg, num_regions); - if (reply_sz < size) - return -EIO; - - if (size > IDPF_CTLQ_MAX_BUF_LEN) - return -EINVAL; + if (reply_sz < size) { + err =3D -EIO; + goto rel_rx_buf; + } =20 for (int i =3D 0; i < num_regions; i++) { struct libie_mmio_info *mmio =3D &adapter->ctlq_ctx.mmio_info; @@ -1094,10 +625,14 @@ static int idpf_cfg_lan_memory_regions(struct idpf_a= dapter *adapter) len =3D le64_to_cpu(rcvd_regions->mem_reg[i].size); if (!libie_pci_map_mmio_region(mmio, offset, len)) { idpf_decfg_lan_memory_regions(adapter); - return -EIO; + err =3D -EIO; + goto rel_rx_buf; } } =20 +rel_rx_buf: + libie_ctlq_release_rx_buf(&xn_params.recv_mem); + return err; } =20 @@ -1150,24 +685,27 @@ int idpf_add_del_fsteer_filters(struct idpf_adapter = *adapter, struct virtchnl2_flow_rule_add_del *rule, enum virtchnl2_op opcode) { + struct libie_ctlq_xn_send_params xn_params =3D { + .chnl_opcode =3D opcode, + .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, + }; int rule_count =3D le32_to_cpu(rule->count); - struct idpf_vc_xn_params xn_params =3D {}; - ssize_t reply_sz; + size_t send_sz; + int err; =20 if (opcode !=3D VIRTCHNL2_OP_ADD_FLOW_RULE && - opcode !=3D VIRTCHNL2_OP_DEL_FLOW_RULE) + opcode !=3D VIRTCHNL2_OP_DEL_FLOW_RULE) { + kfree(rule); return -EINVAL; + } =20 - xn_params.vc_op =3D opcode; - xn_params.timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC; - xn_params.async =3D false; - xn_params.send_buf.iov_base =3D rule; - xn_params.send_buf.iov_len =3D struct_size(rule, rule_info, rule_count); - xn_params.recv_buf.iov_base =3D rule; - xn_params.recv_buf.iov_len =3D struct_size(rule, rule_info, rule_count); + send_sz =3D struct_size(rule, rule_info, rule_count); + err =3D idpf_send_mb_msg(adapter, &xn_params, rule, send_sz); + if (err) + return err; =20 - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); - return reply_sz < 0 ? reply_sz : 0; + libie_ctlq_release_rx_buf(&xn_params.recv_mem); + return 0; } =20 /** @@ -1539,11 +1077,13 @@ int idpf_queue_reg_init(struct idpf_vport *vport, int idpf_send_create_vport_msg(struct idpf_adapter *adapter, struct idpf_vport_max_q *max_q) { + struct libie_ctlq_xn_send_params xn_params =3D { + .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, + .chnl_opcode =3D VIRTCHNL2_OP_CREATE_VPORT, + }; struct virtchnl2_create_vport *vport_msg; - struct idpf_vc_xn_params xn_params =3D {}; u16 idx =3D adapter->next_vport; int err, buf_size; - ssize_t reply_sz; =20 buf_size =3D sizeof(struct virtchnl2_create_vport); vport_msg =3D kzalloc(buf_size, GFP_KERNEL); @@ -1570,33 +1110,29 @@ int idpf_send_create_vport_msg(struct idpf_adapter = *adapter, } =20 if (!adapter->vport_params_recvd[idx]) { - adapter->vport_params_recvd[idx] =3D kzalloc(IDPF_CTLQ_MAX_BUF_LEN, - GFP_KERNEL); + adapter->vport_params_recvd[idx] =3D + kzalloc(LIBIE_CTLQ_MAX_BUF_LEN, GFP_KERNEL); if (!adapter->vport_params_recvd[idx]) { err =3D -ENOMEM; goto rel_buf; } } =20 - xn_params.vc_op =3D VIRTCHNL2_OP_CREATE_VPORT; - xn_params.send_buf.iov_base =3D vport_msg; - xn_params.send_buf.iov_len =3D buf_size; - xn_params.recv_buf.iov_base =3D adapter->vport_params_recvd[idx]; - xn_params.recv_buf.iov_len =3D IDPF_CTLQ_MAX_BUF_LEN; - xn_params.timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC; - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); - if (reply_sz < 0) { - err =3D reply_sz; - goto free_vport_params; + err =3D idpf_send_mb_msg_kfree(adapter, &xn_params, vport_msg, + sizeof(*vport_msg)); + if (err) { + kfree(adapter->vport_params_recvd[idx]); + adapter->vport_params_recvd[idx] =3D NULL; + return err; } =20 - kfree(vport_msg); + memcpy(adapter->vport_params_recvd[idx], xn_params.recv_mem.iov_base, + xn_params.recv_mem.iov_len); + + libie_ctlq_release_rx_buf(&xn_params.recv_mem); =20 return 0; =20 -free_vport_params: - kfree(adapter->vport_params_recvd[idx]); - adapter->vport_params_recvd[idx] =3D NULL; rel_buf: kfree(vport_msg); =20 @@ -1659,19 +1195,22 @@ int idpf_check_supported_desc_ids(struct idpf_vport= *vport) */ int idpf_send_destroy_vport_msg(struct idpf_adapter *adapter, u32 vport_id) { - struct idpf_vc_xn_params xn_params =3D {}; + struct libie_ctlq_xn_send_params xn_params =3D { + .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, + .chnl_opcode =3D VIRTCHNL2_OP_DESTROY_VPORT, + }; struct virtchnl2_vport v_id; - ssize_t reply_sz; + int err; =20 v_id.vport_id =3D cpu_to_le32(vport_id); =20 - xn_params.vc_op =3D VIRTCHNL2_OP_DESTROY_VPORT; - xn_params.send_buf.iov_base =3D &v_id; - xn_params.send_buf.iov_len =3D sizeof(v_id); - xn_params.timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC; - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); + err =3D idpf_send_mb_msg(adapter, &xn_params, &v_id, sizeof(v_id)); + if (err) + return err; + + libie_ctlq_release_rx_buf(&xn_params.recv_mem); =20 - return reply_sz < 0 ? reply_sz : 0; + return 0; } =20 /** @@ -1684,19 +1223,22 @@ int idpf_send_destroy_vport_msg(struct idpf_adapter= *adapter, u32 vport_id) */ int idpf_send_enable_vport_msg(struct idpf_adapter *adapter, u32 vport_id) { - struct idpf_vc_xn_params xn_params =3D {}; + struct libie_ctlq_xn_send_params xn_params =3D { + .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, + .chnl_opcode =3D VIRTCHNL2_OP_ENABLE_VPORT, + }; struct virtchnl2_vport v_id; - ssize_t reply_sz; + int err; =20 v_id.vport_id =3D cpu_to_le32(vport_id); =20 - xn_params.vc_op =3D VIRTCHNL2_OP_ENABLE_VPORT; - xn_params.send_buf.iov_base =3D &v_id; - xn_params.send_buf.iov_len =3D sizeof(v_id); - xn_params.timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC; - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); + err =3D idpf_send_mb_msg(adapter, &xn_params, &v_id, sizeof(v_id)); + if (err) + return err; + + libie_ctlq_release_rx_buf(&xn_params.recv_mem); =20 - return reply_sz < 0 ? reply_sz : 0; + return 0; } =20 /** @@ -1709,19 +1251,22 @@ int idpf_send_enable_vport_msg(struct idpf_adapter = *adapter, u32 vport_id) */ int idpf_send_disable_vport_msg(struct idpf_adapter *adapter, u32 vport_id) { - struct idpf_vc_xn_params xn_params =3D {}; + struct libie_ctlq_xn_send_params xn_params =3D { + .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, + .chnl_opcode =3D VIRTCHNL2_OP_DISABLE_VPORT, + }; struct virtchnl2_vport v_id; - ssize_t reply_sz; + int err; =20 v_id.vport_id =3D cpu_to_le32(vport_id); =20 - xn_params.vc_op =3D VIRTCHNL2_OP_DISABLE_VPORT; - xn_params.send_buf.iov_base =3D &v_id; - xn_params.send_buf.iov_len =3D sizeof(v_id); - xn_params.timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC; - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); + err =3D idpf_send_mb_msg(adapter, &xn_params, &v_id, sizeof(v_id)); + if (err) + return err; + + libie_ctlq_release_rx_buf(&xn_params.recv_mem); =20 - return reply_sz < 0 ? reply_sz : 0; + return 0; } =20 /** @@ -2561,11 +2106,14 @@ int idpf_send_delete_queues_msg(struct idpf_adapter= *adapter, struct idpf_queue_id_reg_info *chunks, u32 vport_id) { - struct virtchnl2_del_ena_dis_queues *eq __free(kfree) =3D NULL; - struct idpf_vc_xn_params xn_params =3D {}; - ssize_t reply_sz; + struct libie_ctlq_xn_send_params xn_params =3D { + .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, + .chnl_opcode =3D VIRTCHNL2_OP_DEL_QUEUES, + }; + struct virtchnl2_del_ena_dis_queues *eq; + ssize_t buf_size; u16 num_chunks; - int buf_size; + int err; =20 num_chunks =3D chunks->num_chunks; buf_size =3D struct_size(eq, chunks.chunks, num_chunks); @@ -2580,13 +2128,13 @@ int idpf_send_delete_queues_msg(struct idpf_adapter= *adapter, idpf_convert_reg_to_queue_chunks(eq->chunks.chunks, chunks->queue_chunks, num_chunks); =20 - xn_params.vc_op =3D VIRTCHNL2_OP_DEL_QUEUES; - xn_params.timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC; - xn_params.send_buf.iov_base =3D eq; - xn_params.send_buf.iov_len =3D buf_size; - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); + err =3D idpf_send_mb_msg_kfree(adapter, &xn_params, eq, buf_size); + if (err) + return err; + + libie_ctlq_release_rx_buf(&xn_params.recv_mem); =20 - return reply_sz < 0 ? reply_sz : 0; + return 0; } =20 /** @@ -2626,15 +2174,14 @@ int idpf_send_add_queues_msg(struct idpf_adapter *a= dapter, struct idpf_q_vec_rsrc *rsrc, u32 vport_id) { - struct virtchnl2_add_queues *vc_msg __free(kfree) =3D NULL; - struct idpf_vc_xn_params xn_params =3D {}; + struct libie_ctlq_xn_send_params xn_params =3D { + .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, + .chnl_opcode =3D VIRTCHNL2_OP_ADD_QUEUES, + }; + struct virtchnl2_add_queues *vc_msg; struct virtchnl2_add_queues aq =3D {}; - ssize_t reply_sz; - int size; - - vc_msg =3D kzalloc(IDPF_CTLQ_MAX_BUF_LEN, GFP_KERNEL); - if (!vc_msg) - return -ENOMEM; + size_t size; + int err; =20 aq.vport_id =3D cpu_to_le32(vport_id); aq.num_tx_q =3D cpu_to_le16(rsrc->num_txq); @@ -2642,29 +2189,32 @@ int idpf_send_add_queues_msg(struct idpf_adapter *a= dapter, aq.num_rx_q =3D cpu_to_le16(rsrc->num_rxq); aq.num_rx_bufq =3D cpu_to_le16(rsrc->num_bufq); =20 - xn_params.vc_op =3D VIRTCHNL2_OP_ADD_QUEUES; - xn_params.timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC; - xn_params.send_buf.iov_base =3D &aq; - xn_params.send_buf.iov_len =3D sizeof(aq); - xn_params.recv_buf.iov_base =3D vc_msg; - xn_params.recv_buf.iov_len =3D IDPF_CTLQ_MAX_BUF_LEN; - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); - if (reply_sz < 0) - return reply_sz; + err =3D idpf_send_mb_msg(adapter, &xn_params, &aq, sizeof(aq)); + if (err) + return err; + + vc_msg =3D xn_params.recv_mem.iov_base; =20 /* compare vc_msg num queues with vport num queues */ if (le16_to_cpu(vc_msg->num_tx_q) !=3D rsrc->num_txq || le16_to_cpu(vc_msg->num_rx_q) !=3D rsrc->num_rxq || le16_to_cpu(vc_msg->num_tx_complq) !=3D rsrc->num_complq || - le16_to_cpu(vc_msg->num_rx_bufq) !=3D rsrc->num_bufq) - return -EINVAL; + le16_to_cpu(vc_msg->num_rx_bufq) !=3D rsrc->num_bufq) { + err =3D -EINVAL; + goto free_rx_buf; + } =20 size =3D struct_size(vc_msg, chunks.chunks, le16_to_cpu(vc_msg->chunks.num_chunks)); - if (reply_sz < size) + if (xn_params.recv_mem.iov_len < size) return -EIO; =20 - return idpf_vport_init_queue_reg_chunks(vport_config, &vc_msg->chunks); + err =3D idpf_vport_init_queue_reg_chunks(vport_config, &vc_msg->chunks); + +free_rx_buf: + libie_ctlq_release_rx_buf(&xn_params.recv_mem); + + return err; } =20 /** @@ -2676,49 +2226,47 @@ int idpf_send_add_queues_msg(struct idpf_adapter *a= dapter, */ int idpf_send_alloc_vectors_msg(struct idpf_adapter *adapter, u16 num_vect= ors) { - struct virtchnl2_alloc_vectors *rcvd_vec __free(kfree) =3D NULL; - struct idpf_vc_xn_params xn_params =3D {}; + struct libie_ctlq_xn_send_params xn_params =3D { + .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, + .chnl_opcode =3D VIRTCHNL2_OP_ALLOC_VECTORS, + }; + struct virtchnl2_alloc_vectors *rcvd_vec; struct virtchnl2_alloc_vectors ac =3D {}; - ssize_t reply_sz; u16 num_vchunks; - int size; + int size, err; =20 ac.num_vectors =3D cpu_to_le16(num_vectors); =20 - rcvd_vec =3D kzalloc(IDPF_CTLQ_MAX_BUF_LEN, GFP_KERNEL); - if (!rcvd_vec) - return -ENOMEM; + err =3D idpf_send_mb_msg(adapter, &xn_params, &ac, sizeof(ac)); + if (err) + return err; =20 - xn_params.vc_op =3D VIRTCHNL2_OP_ALLOC_VECTORS; - xn_params.send_buf.iov_base =3D ∾ - xn_params.send_buf.iov_len =3D sizeof(ac); - xn_params.recv_buf.iov_base =3D rcvd_vec; - xn_params.recv_buf.iov_len =3D IDPF_CTLQ_MAX_BUF_LEN; - xn_params.timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC; - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); - if (reply_sz < 0) - return reply_sz; + rcvd_vec =3D xn_params.recv_mem.iov_base; =20 num_vchunks =3D le16_to_cpu(rcvd_vec->vchunks.num_vchunks); size =3D struct_size(rcvd_vec, vchunks.vchunks, num_vchunks); - if (reply_sz < size) - return -EIO; - - if (size > IDPF_CTLQ_MAX_BUF_LEN) - return -EINVAL; + if (xn_params.recv_mem.iov_len < size) { + err =3D -EIO; + goto free_rx_buf; + } =20 kfree(adapter->req_vec_chunks); adapter->req_vec_chunks =3D kmemdup(rcvd_vec, size, GFP_KERNEL); - if (!adapter->req_vec_chunks) - return -ENOMEM; + if (!adapter->req_vec_chunks) { + err =3D -ENOMEM; + goto free_rx_buf; + } =20 if (le16_to_cpu(adapter->req_vec_chunks->num_vectors) < num_vectors) { kfree(adapter->req_vec_chunks); adapter->req_vec_chunks =3D NULL; - return -EINVAL; + err =3D -EINVAL; } =20 - return 0; +free_rx_buf: + libie_ctlq_release_rx_buf(&xn_params.recv_mem); + + return err; } =20 /** @@ -2730,24 +2278,28 @@ int idpf_send_alloc_vectors_msg(struct idpf_adapter= *adapter, u16 num_vectors) int idpf_send_dealloc_vectors_msg(struct idpf_adapter *adapter) { struct virtchnl2_alloc_vectors *ac =3D adapter->req_vec_chunks; - struct virtchnl2_vector_chunks *vcs =3D &ac->vchunks; - struct idpf_vc_xn_params xn_params =3D {}; - ssize_t reply_sz; - int buf_size; + struct libie_ctlq_xn_send_params xn_params =3D { + .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, + .chnl_opcode =3D VIRTCHNL2_OP_DEALLOC_VECTORS, + }; + struct virtchnl2_vector_chunks *vcs; + int buf_size, err; =20 - buf_size =3D struct_size(vcs, vchunks, le16_to_cpu(vcs->num_vchunks)); + buf_size =3D struct_size(&ac->vchunks, vchunks, + le16_to_cpu(ac->vchunks.num_vchunks)); + vcs =3D kmemdup(&ac->vchunks, buf_size, GFP_KERNEL); + if (!vcs) + return -ENOMEM; =20 - xn_params.vc_op =3D VIRTCHNL2_OP_DEALLOC_VECTORS; - xn_params.send_buf.iov_base =3D vcs; - xn_params.send_buf.iov_len =3D buf_size; - xn_params.timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC; - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); - if (reply_sz < 0) - return reply_sz; + err =3D idpf_send_mb_msg_kfree(adapter, &xn_params, vcs, buf_size); + if (err) + return err; =20 kfree(adapter->req_vec_chunks); adapter->req_vec_chunks =3D NULL; =20 + libie_ctlq_release_rx_buf(&xn_params.recv_mem); + return 0; } =20 @@ -2771,18 +2323,22 @@ static int idpf_get_max_vfs(struct idpf_adapter *ad= apter) */ int idpf_send_set_sriov_vfs_msg(struct idpf_adapter *adapter, u16 num_vfs) { + struct libie_ctlq_xn_send_params xn_params =3D { + .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, + .chnl_opcode =3D VIRTCHNL2_OP_SET_SRIOV_VFS, + }; struct virtchnl2_sriov_vfs_info svi =3D {}; - struct idpf_vc_xn_params xn_params =3D {}; - ssize_t reply_sz; + int err; =20 svi.num_vfs =3D cpu_to_le16(num_vfs); - xn_params.vc_op =3D VIRTCHNL2_OP_SET_SRIOV_VFS; - xn_params.timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC; - xn_params.send_buf.iov_base =3D &svi; - xn_params.send_buf.iov_len =3D sizeof(svi); - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); =20 - return reply_sz < 0 ? reply_sz : 0; + err =3D idpf_send_mb_msg(adapter, &xn_params, &svi, sizeof(svi)); + if (err) + return err; + + libie_ctlq_release_rx_buf(&xn_params.recv_mem); + + return 0; } =20 /** @@ -2795,10 +2351,14 @@ int idpf_send_set_sriov_vfs_msg(struct idpf_adapter= *adapter, u16 num_vfs) int idpf_send_get_stats_msg(struct idpf_netdev_priv *np, struct idpf_port_stats *port_stats) { + struct libie_ctlq_xn_send_params xn_params =3D { + .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, + .chnl_opcode =3D VIRTCHNL2_OP_GET_STATS, + }; struct rtnl_link_stats64 *netstats =3D &np->netstats; + struct virtchnl2_vport_stats *stats_recv; struct virtchnl2_vport_stats stats_msg =3D {}; - struct idpf_vc_xn_params xn_params =3D {}; - ssize_t reply_sz; + int err; =20 =20 /* Don't send get_stats message if the link is down */ @@ -2807,37 +2367,40 @@ int idpf_send_get_stats_msg(struct idpf_netdev_priv= *np, =20 stats_msg.vport_id =3D cpu_to_le32(np->vport_id); =20 - xn_params.vc_op =3D VIRTCHNL2_OP_GET_STATS; - xn_params.send_buf.iov_base =3D &stats_msg; - xn_params.send_buf.iov_len =3D sizeof(stats_msg); - xn_params.recv_buf =3D xn_params.send_buf; - xn_params.timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC; + err =3D idpf_send_mb_msg(np->adapter, &xn_params, &stats_msg, + sizeof(stats_msg)); + if (err) + return err; =20 - reply_sz =3D idpf_vc_xn_exec(np->adapter, &xn_params); - if (reply_sz < 0) - return reply_sz; - if (reply_sz < sizeof(stats_msg)) - return -EIO; + if (xn_params.recv_mem.iov_len < sizeof(*stats_recv)) { + err =3D -EIO; + goto free_rx_buf; + } + + stats_recv =3D xn_params.recv_mem.iov_base; =20 spin_lock_bh(&np->stats_lock); =20 - netstats->rx_packets =3D le64_to_cpu(stats_msg.rx_unicast) + - le64_to_cpu(stats_msg.rx_multicast) + - le64_to_cpu(stats_msg.rx_broadcast); - netstats->tx_packets =3D le64_to_cpu(stats_msg.tx_unicast) + - le64_to_cpu(stats_msg.tx_multicast) + - le64_to_cpu(stats_msg.tx_broadcast); - netstats->rx_bytes =3D le64_to_cpu(stats_msg.rx_bytes); - netstats->tx_bytes =3D le64_to_cpu(stats_msg.tx_bytes); - netstats->rx_errors =3D le64_to_cpu(stats_msg.rx_errors); - netstats->tx_errors =3D le64_to_cpu(stats_msg.tx_errors); - netstats->rx_dropped =3D le64_to_cpu(stats_msg.rx_discards); - netstats->tx_dropped =3D le64_to_cpu(stats_msg.tx_discards); - - port_stats->vport_stats =3D stats_msg; + netstats->rx_packets =3D le64_to_cpu(stats_recv->rx_unicast) + + le64_to_cpu(stats_recv->rx_multicast) + + le64_to_cpu(stats_recv->rx_broadcast); + netstats->tx_packets =3D le64_to_cpu(stats_recv->tx_unicast) + + le64_to_cpu(stats_recv->tx_multicast) + + le64_to_cpu(stats_recv->tx_broadcast); + netstats->rx_bytes =3D le64_to_cpu(stats_recv->rx_bytes); + netstats->tx_bytes =3D le64_to_cpu(stats_recv->tx_bytes); + netstats->rx_errors =3D le64_to_cpu(stats_recv->rx_errors); + netstats->tx_errors =3D le64_to_cpu(stats_recv->tx_errors); + netstats->rx_dropped =3D le64_to_cpu(stats_recv->rx_discards); + netstats->tx_dropped =3D le64_to_cpu(stats_recv->tx_discards); + + port_stats->vport_stats =3D *stats_recv; =20 spin_unlock_bh(&np->stats_lock); =20 +free_rx_buf: + libie_ctlq_release_rx_buf(&xn_params.recv_mem); + return 0; } =20 @@ -2854,12 +2417,14 @@ int idpf_send_get_set_rss_lut_msg(struct idpf_adapt= er *adapter, struct idpf_rss_data *rss_data, u32 vport_id, bool get) { - struct virtchnl2_rss_lut *recv_rl __free(kfree) =3D NULL; - struct virtchnl2_rss_lut *rl __free(kfree) =3D NULL; - struct idpf_vc_xn_params xn_params =3D {}; + struct libie_ctlq_xn_send_params xn_params =3D { + .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, + .chnl_opcode =3D get ? VIRTCHNL2_OP_GET_RSS_LUT : + VIRTCHNL2_OP_SET_RSS_LUT, + }; + struct virtchnl2_rss_lut *rl, *recv_rl; int buf_size, lut_buf_size; - ssize_t reply_sz; - int i; + int i, err; =20 buf_size =3D struct_size(rl, lut, rss_data->rss_lut_size); rl =3D kzalloc(buf_size, GFP_KERNEL); @@ -2867,36 +2432,30 @@ int idpf_send_get_set_rss_lut_msg(struct idpf_adapt= er *adapter, return -ENOMEM; =20 rl->vport_id =3D cpu_to_le32(vport_id); - - xn_params.timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC; - xn_params.send_buf.iov_base =3D rl; - xn_params.send_buf.iov_len =3D buf_size; - - if (get) { - recv_rl =3D kzalloc(IDPF_CTLQ_MAX_BUF_LEN, GFP_KERNEL); - if (!recv_rl) - return -ENOMEM; - xn_params.vc_op =3D VIRTCHNL2_OP_GET_RSS_LUT; - xn_params.recv_buf.iov_base =3D recv_rl; - xn_params.recv_buf.iov_len =3D IDPF_CTLQ_MAX_BUF_LEN; - } else { + if (!get) { rl->lut_entries =3D cpu_to_le16(rss_data->rss_lut_size); for (i =3D 0; i < rss_data->rss_lut_size; i++) rl->lut[i] =3D cpu_to_le32(rss_data->rss_lut[i]); - - xn_params.vc_op =3D VIRTCHNL2_OP_SET_RSS_LUT; } - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); - if (reply_sz < 0) - return reply_sz; + + err =3D idpf_send_mb_msg_kfree(adapter, &xn_params, rl, buf_size); + if (err) + return err; + if (!get) - return 0; - if (reply_sz < sizeof(struct virtchnl2_rss_lut)) - return -EIO; + goto free_rx_buf; + if (xn_params.recv_mem.iov_len < sizeof(struct virtchnl2_rss_lut)) { + err =3D -EIO; + goto free_rx_buf; + } + + recv_rl =3D xn_params.recv_mem.iov_base; =20 lut_buf_size =3D le16_to_cpu(recv_rl->lut_entries) * sizeof(u32); - if (reply_sz < lut_buf_size) - return -EIO; + if (xn_params.recv_mem.iov_len < lut_buf_size) { + err =3D -EIO; + goto free_rx_buf; + } =20 /* size didn't change, we can reuse existing lut buf */ if (rss_data->rss_lut_size =3D=3D le16_to_cpu(recv_rl->lut_entries)) @@ -2908,13 +2467,16 @@ int idpf_send_get_set_rss_lut_msg(struct idpf_adapt= er *adapter, rss_data->rss_lut =3D kzalloc(lut_buf_size, GFP_KERNEL); if (!rss_data->rss_lut) { rss_data->rss_lut_size =3D 0; - return -ENOMEM; + err =3D -ENOMEM; + goto free_rx_buf; } =20 do_memcpy: memcpy(rss_data->rss_lut, recv_rl->lut, rss_data->rss_lut_size); +free_rx_buf: + libie_ctlq_release_rx_buf(&xn_params.recv_mem); =20 - return 0; + return err; } =20 /** @@ -2930,12 +2492,14 @@ int idpf_send_get_set_rss_key_msg(struct idpf_adapt= er *adapter, struct idpf_rss_data *rss_data, u32 vport_id, bool get) { - struct virtchnl2_rss_key *recv_rk __free(kfree) =3D NULL; - struct virtchnl2_rss_key *rk __free(kfree) =3D NULL; - struct idpf_vc_xn_params xn_params =3D {}; - ssize_t reply_sz; - int i, buf_size; - u16 key_size; + struct libie_ctlq_xn_send_params xn_params =3D { + .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, + .chnl_opcode =3D get ? VIRTCHNL2_OP_GET_RSS_KEY : + VIRTCHNL2_OP_SET_RSS_KEY, + }; + struct virtchnl2_rss_key *rk, *recv_rk; + u16 key_size, recv_len; + int i, buf_size, err; =20 buf_size =3D struct_size(rk, key_flex, rss_data->rss_key_size); rk =3D kzalloc(buf_size, GFP_KERNEL); @@ -2943,37 +2507,32 @@ int idpf_send_get_set_rss_key_msg(struct idpf_adapt= er *adapter, return -ENOMEM; =20 rk->vport_id =3D cpu_to_le32(vport_id); - xn_params.send_buf.iov_base =3D rk; - xn_params.send_buf.iov_len =3D buf_size; - xn_params.timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC; - if (get) { - recv_rk =3D kzalloc(IDPF_CTLQ_MAX_BUF_LEN, GFP_KERNEL); - if (!recv_rk) - return -ENOMEM; - - xn_params.vc_op =3D VIRTCHNL2_OP_GET_RSS_KEY; - xn_params.recv_buf.iov_base =3D recv_rk; - xn_params.recv_buf.iov_len =3D IDPF_CTLQ_MAX_BUF_LEN; - } else { + if (!get) { rk->key_len =3D cpu_to_le16(rss_data->rss_key_size); for (i =3D 0; i < rss_data->rss_key_size; i++) rk->key_flex[i] =3D rss_data->rss_key[i]; - - xn_params.vc_op =3D VIRTCHNL2_OP_SET_RSS_KEY; } =20 - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); - if (reply_sz < 0) - return reply_sz; + err =3D idpf_send_mb_msg_kfree(adapter, &xn_params, rk, buf_size); + if (err) + return err; + if (!get) - return 0; - if (reply_sz < sizeof(struct virtchnl2_rss_key)) - return -EIO; + goto free_rx_buf; + + recv_len =3D xn_params.recv_mem.iov_len; + if (recv_len < sizeof(struct virtchnl2_rss_key)) { + err =3D -EIO; + goto free_rx_buf; + } =20 + recv_rk =3D xn_params.recv_mem.iov_base; key_size =3D min_t(u16, NETDEV_RSS_KEY_LEN, le16_to_cpu(recv_rk->key_len)); - if (reply_sz < key_size) - return -EIO; + if (recv_len < key_size) { + err =3D -EIO; + goto free_rx_buf; + } =20 /* key len didn't change, reuse existing buf */ if (rss_data->rss_key_size =3D=3D key_size) @@ -2984,13 +2543,16 @@ int idpf_send_get_set_rss_key_msg(struct idpf_adapt= er *adapter, rss_data->rss_key =3D kzalloc(key_size, GFP_KERNEL); if (!rss_data->rss_key) { rss_data->rss_key_size =3D 0; - return -ENOMEM; + err =3D -ENOMEM; + goto free_rx_buf; } =20 do_memcpy: memcpy(rss_data->rss_key, recv_rk->key_flex, rss_data->rss_key_size); +free_rx_buf: + libie_ctlq_release_rx_buf(&xn_params.recv_mem); =20 - return 0; + return err; } =20 /** @@ -3167,15 +2729,19 @@ static void idpf_parse_protocol_ids(struct virtchnl= 2_ptype *ptype, */ static int idpf_send_get_rx_ptype_msg(struct idpf_adapter *adapter) { - struct virtchnl2_get_ptype_info *get_ptype_info __free(kfree) =3D NULL; - struct virtchnl2_get_ptype_info *ptype_info __free(kfree) =3D NULL; struct libeth_rx_pt *singleq_pt_lkup __free(kfree) =3D NULL; struct libeth_rx_pt *splitq_pt_lkup __free(kfree) =3D NULL; - struct idpf_vc_xn_params xn_params =3D {}; + struct libie_ctlq_xn_send_params xn_params =3D { + .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, + .chnl_opcode =3D VIRTCHNL2_OP_GET_PTYPE_INFO, + }; + struct libeth_rx_pt *ptype_lkup __free(kfree) =3D NULL; + struct virtchnl2_get_ptype_info *get_ptype_info; + struct virtchnl2_get_ptype_info *ptype_info; + int err =3D 0, max_ptype =3D IDPF_RX_MAX_PTYPE; + int buf_size =3D sizeof(*get_ptype_info); int ptypes_recvd =3D 0, ptype_offset; - u32 max_ptype =3D IDPF_RX_MAX_PTYPE; u16 next_ptype_id =3D 0; - ssize_t reply_sz; =20 singleq_pt_lkup =3D kcalloc(IDPF_RX_MAX_BASE_PTYPE, sizeof(*singleq_pt_lkup), GFP_KERNEL); @@ -3186,42 +2752,34 @@ static int idpf_send_get_rx_ptype_msg(struct idpf_a= dapter *adapter) if (!splitq_pt_lkup) return -ENOMEM; =20 - get_ptype_info =3D kzalloc(sizeof(*get_ptype_info), GFP_KERNEL); - if (!get_ptype_info) - return -ENOMEM; - - ptype_info =3D kzalloc(IDPF_CTLQ_MAX_BUF_LEN, GFP_KERNEL); - if (!ptype_info) - return -ENOMEM; + while (next_ptype_id < max_ptype) { + u16 num_ptypes; =20 - xn_params.vc_op =3D VIRTCHNL2_OP_GET_PTYPE_INFO; - xn_params.send_buf.iov_base =3D get_ptype_info; - xn_params.send_buf.iov_len =3D sizeof(*get_ptype_info); - xn_params.recv_buf.iov_base =3D ptype_info; - xn_params.recv_buf.iov_len =3D IDPF_CTLQ_MAX_BUF_LEN; - xn_params.timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC; + get_ptype_info =3D kzalloc(buf_size, GFP_KERNEL); + if (!get_ptype_info) + return -ENOMEM; =20 - while (next_ptype_id < max_ptype) { get_ptype_info->start_ptype_id =3D cpu_to_le16(next_ptype_id); =20 if ((next_ptype_id + IDPF_RX_MAX_PTYPES_PER_BUF) > max_ptype) - get_ptype_info->num_ptypes =3D - cpu_to_le16(max_ptype - next_ptype_id); + num_ptypes =3D max_ptype - next_ptype_id; else - get_ptype_info->num_ptypes =3D - cpu_to_le16(IDPF_RX_MAX_PTYPES_PER_BUF); + num_ptypes =3D IDPF_RX_MAX_PTYPES_PER_BUF; =20 - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); - if (reply_sz < 0) - return reply_sz; + get_ptype_info->num_ptypes =3D cpu_to_le16(num_ptypes); + err =3D idpf_send_mb_msg_kfree(adapter, &xn_params, + get_ptype_info, buf_size); + if (err) + return err; =20 + ptype_info =3D xn_params.recv_mem.iov_base; ptypes_recvd +=3D le16_to_cpu(ptype_info->num_ptypes); - if (ptypes_recvd > max_ptype) - return -EINVAL; - - next_ptype_id =3D le16_to_cpu(get_ptype_info->start_ptype_id) + - le16_to_cpu(get_ptype_info->num_ptypes); + if (ptypes_recvd > max_ptype) { + err =3D -EINVAL; + goto free_rx_buf; + } =20 + next_ptype_id =3D next_ptype_id + num_ptypes; ptype_offset =3D IDPF_RX_PTYPE_HDR_SZ; =20 for (u16 i =3D 0; i < le16_to_cpu(ptype_info->num_ptypes); i++) { @@ -3236,8 +2794,10 @@ static int idpf_send_get_rx_ptype_msg(struct idpf_ad= apter *adapter) pt_8 =3D ptype->ptype_id_8; =20 ptype_offset +=3D IDPF_GET_PTYPE_SIZE(ptype); - if (ptype_offset > IDPF_CTLQ_MAX_BUF_LEN) - return -EINVAL; + if (ptype_offset > LIBIE_CTLQ_MAX_BUF_LEN) { + err =3D -EINVAL; + goto free_rx_buf; + } =20 /* 0xFFFF indicates end of ptypes */ if (pt_10 =3D=3D IDPF_INVALID_PTYPE_ID) @@ -3255,13 +2815,18 @@ static int idpf_send_get_rx_ptype_msg(struct idpf_a= dapter *adapter) if (!singleq_pt_lkup[pt_8].outer_ip) singleq_pt_lkup[pt_8] =3D rx_pt; } + + libie_ctlq_release_rx_buf(&xn_params.recv_mem); + xn_params.recv_mem =3D (struct kvec) {}; } =20 out: adapter->splitq_pt_lkup =3D no_free_ptr(splitq_pt_lkup); adapter->singleq_pt_lkup =3D no_free_ptr(singleq_pt_lkup); +free_rx_buf: + libie_ctlq_release_rx_buf(&xn_params.recv_mem); =20 - return 0; + return err; } =20 /** @@ -3289,40 +2854,24 @@ static void idpf_rel_rx_pt_lkup(struct idpf_adapter= *adapter) int idpf_send_ena_dis_loopback_msg(struct idpf_adapter *adapter, u32 vport= _id, bool loopback_ena) { - struct idpf_vc_xn_params xn_params =3D {}; + struct libie_ctlq_xn_send_params xn_params =3D { + .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, + .chnl_opcode =3D VIRTCHNL2_OP_LOOPBACK, + }; struct virtchnl2_loopback loopback; - ssize_t reply_sz; + int err; =20 loopback.vport_id =3D cpu_to_le32(vport_id); loopback.enable =3D loopback_ena; =20 - xn_params.vc_op =3D VIRTCHNL2_OP_LOOPBACK; - xn_params.timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC; - xn_params.send_buf.iov_base =3D &loopback; - xn_params.send_buf.iov_len =3D sizeof(loopback); - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); - - return reply_sz < 0 ? reply_sz : 0; -} - -/** - * idpf_find_ctlq - Given a type and id, find ctlq info - * @hw: hardware struct - * @type: type of ctrlq to find - * @id: ctlq id to find - * - * Returns pointer to found ctlq info struct, NULL otherwise. - */ -static struct idpf_ctlq_info *idpf_find_ctlq(struct idpf_hw *hw, - enum idpf_ctlq_type type, int id) -{ - struct idpf_ctlq_info *cq, *tmp; + err =3D idpf_send_mb_msg(adapter, &xn_params, &loopback, + sizeof(loopback)); + if (err) + return err; =20 - list_for_each_entry_safe(cq, tmp, &hw->cq_list_head, cq_list) - if (cq->q_id =3D=3D id && cq->cq_type =3D=3D type) - return cq; + libie_ctlq_release_rx_buf(&xn_params.recv_mem); =20 - return NULL; + return 0; } =20 /** @@ -3333,40 +2882,43 @@ static struct idpf_ctlq_info *idpf_find_ctlq(struct= idpf_hw *hw, */ int idpf_init_dflt_mbx(struct idpf_adapter *adapter) { - struct idpf_ctlq_create_info ctlq_info[] =3D { + struct libie_ctlq_ctx *ctx =3D &adapter->ctlq_ctx; + struct libie_ctlq_create_info ctlq_info[] =3D { { - .type =3D IDPF_CTLQ_TYPE_MAILBOX_TX, - .id =3D IDPF_DFLT_MBX_ID, + .type =3D LIBIE_CTLQ_TYPE_TX, + .id =3D LIBIE_CTLQ_MBX_ID, .len =3D IDPF_DFLT_MBX_Q_LEN, - .buf_size =3D IDPF_CTLQ_MAX_BUF_LEN }, { - .type =3D IDPF_CTLQ_TYPE_MAILBOX_RX, - .id =3D IDPF_DFLT_MBX_ID, + .type =3D LIBIE_CTLQ_TYPE_RX, + .id =3D LIBIE_CTLQ_MBX_ID, .len =3D IDPF_DFLT_MBX_Q_LEN, - .buf_size =3D IDPF_CTLQ_MAX_BUF_LEN } }; - struct idpf_hw *hw =3D &adapter->hw; + struct libie_ctlq_xn_init_params params =3D { + .num_qs =3D IDPF_NUM_DFLT_MBX_Q, + .cctlq_info =3D ctlq_info, + .ctx =3D ctx, + }; int err; =20 - adapter->dev_ops.reg_ops.ctlq_reg_init(adapter, ctlq_info); + adapter->dev_ops.reg_ops.ctlq_reg_init(&ctx->mmio_info, + params.cctlq_info); =20 - err =3D idpf_ctlq_init(hw, IDPF_NUM_DFLT_MBX_Q, ctlq_info); + err =3D libie_ctlq_xn_init(¶ms); if (err) return err; =20 - hw->asq =3D idpf_find_ctlq(hw, IDPF_CTLQ_TYPE_MAILBOX_TX, - IDPF_DFLT_MBX_ID); - hw->arq =3D idpf_find_ctlq(hw, IDPF_CTLQ_TYPE_MAILBOX_RX, - IDPF_DFLT_MBX_ID); - - if (!hw->asq || !hw->arq) { - idpf_ctlq_deinit(hw); - + adapter->asq =3D libie_find_ctlq(ctx, LIBIE_CTLQ_TYPE_TX, + LIBIE_CTLQ_MBX_ID); + adapter->arq =3D libie_find_ctlq(ctx, LIBIE_CTLQ_TYPE_RX, + LIBIE_CTLQ_MBX_ID); + if (!adapter->asq || !adapter->arq) { + libie_ctlq_xn_deinit(params.xnm, ctx); return -ENOENT; } =20 + adapter->xn_init_params.xnm =3D params.xnm; adapter->state =3D __IDPF_VER_CHECK; =20 return 0; @@ -3378,12 +2930,14 @@ int idpf_init_dflt_mbx(struct idpf_adapter *adapter) */ void idpf_deinit_dflt_mbx(struct idpf_adapter *adapter) { - if (adapter->hw.arq && adapter->hw.asq) { - idpf_mb_clean(adapter, adapter->hw.asq); - idpf_ctlq_deinit(&adapter->hw); + if (adapter->arq && adapter->asq) { + idpf_mb_clean(adapter, adapter->asq); + libie_ctlq_xn_deinit(adapter->xn_init_params.xnm, + &adapter->ctlq_ctx); } - adapter->hw.arq =3D NULL; - adapter->hw.asq =3D NULL; + + adapter->arq =3D NULL; + adapter->asq =3D NULL; } =20 /** @@ -3456,15 +3010,6 @@ int idpf_vc_core_init(struct idpf_adapter *adapter) u16 num_max_vports; int err =3D 0; =20 - if (!adapter->vcxn_mngr) { - adapter->vcxn_mngr =3D kzalloc(sizeof(*adapter->vcxn_mngr), GFP_KERNEL); - if (!adapter->vcxn_mngr) { - err =3D -ENOMEM; - goto init_failed; - } - } - idpf_vc_xn_init(adapter->vcxn_mngr); - while (adapter->state !=3D __IDPF_INIT_SW) { switch (adapter->state) { case __IDPF_VER_CHECK: @@ -3609,8 +3154,7 @@ int idpf_vc_core_init(struct idpf_adapter *adapter) * the mailbox again */ adapter->state =3D __IDPF_VER_CHECK; - if (adapter->vcxn_mngr) - idpf_vc_xn_shutdown(adapter->vcxn_mngr); + idpf_deinit_dflt_mbx(adapter); set_bit(IDPF_HR_DRV_LOAD, adapter->flags); queue_delayed_work(adapter->vc_event_wq, &adapter->vc_event_task, msecs_to_jiffies(task_delay)); @@ -3633,7 +3177,7 @@ void idpf_vc_core_deinit(struct idpf_adapter *adapter) /* Avoid transaction timeouts when called during reset */ remove_in_prog =3D test_bit(IDPF_REMOVE_IN_PROG, adapter->flags); if (!remove_in_prog) - idpf_vc_xn_shutdown(adapter->vcxn_mngr); + idpf_deinit_dflt_mbx(adapter); =20 idpf_ptp_release(adapter); idpf_deinit_task(adapter); @@ -3642,7 +3186,7 @@ void idpf_vc_core_deinit(struct idpf_adapter *adapter) idpf_intr_rel(adapter); =20 if (remove_in_prog) - idpf_vc_xn_shutdown(adapter->vcxn_mngr); + idpf_deinit_dflt_mbx(adapter); =20 cancel_delayed_work_sync(&adapter->serv_task); cancel_delayed_work_sync(&adapter->mbx_task); @@ -4184,9 +3728,9 @@ static void idpf_set_mac_type(const u8 *default_mac_a= ddr, =20 /** * idpf_mac_filter_async_handler - Async callback for mac filters - * @adapter: private data struct - * @xn: transaction for message - * @ctlq_msg: received message + * @ctx: controlq context structure + * @buff: response buffer pointer and size + * @status: async call return value * * In some scenarios driver can't sleep and wait for a reply (e.g.: stack = is * holding rtnl_lock) when adding a new mac filter. It puts us in a diffic= ult @@ -4194,13 +3738,14 @@ static void idpf_set_mac_type(const u8 *default_mac= _addr, * ultimately do is remove it from our list of mac filters and report the * error. */ -static int idpf_mac_filter_async_handler(struct idpf_adapter *adapter, - struct idpf_vc_xn *xn, - const struct idpf_ctlq_msg *ctlq_msg) +static void idpf_mac_filter_async_handler(void *ctx, + struct kvec *buff, + int status) { struct virtchnl2_mac_addr_list *ma_list; struct idpf_vport_config *vport_config; struct virtchnl2_mac_addr *mac_addr; + struct idpf_adapter *adapter =3D ctx; struct idpf_mac_filter *f, *tmp; struct list_head *ma_list_head; struct idpf_vport *vport; @@ -4208,18 +3753,18 @@ static int idpf_mac_filter_async_handler(struct idp= f_adapter *adapter, int i; =20 /* if success we're done, we're only here if something bad happened */ - if (!ctlq_msg->cookie.mbx.chnl_retval) - return 0; + if (!status) + goto free_mem; =20 + ma_list =3D buff->iov_base; /* make sure at least struct is there */ - if (xn->reply_sz < sizeof(*ma_list)) + if (buff->iov_len < sizeof(*ma_list)) goto invalid_payload; =20 - ma_list =3D ctlq_msg->ctx.indirect.payload->va; mac_addr =3D ma_list->mac_addr_list; num_entries =3D le16_to_cpu(ma_list->num_mac_addr); /* we should have received a buffer at least this big */ - if (xn->reply_sz < struct_size(ma_list, mac_addr_list, num_entries)) + if (buff->iov_len < struct_size(ma_list, mac_addr_list, num_entries)) goto invalid_payload; =20 vport =3D idpf_vid_to_vport(adapter, le32_to_cpu(ma_list->vport_id)); @@ -4239,16 +3784,15 @@ static int idpf_mac_filter_async_handler(struct idp= f_adapter *adapter, if (ether_addr_equal(mac_addr[i].addr, f->macaddr)) list_del(&f->list); spin_unlock_bh(&vport_config->mac_filter_list_lock); - dev_err_ratelimited(&adapter->pdev->dev, "Received error sending MAC filt= er request (op %d)\n", - xn->vc_op); - - return 0; + dev_err_ratelimited(&adapter->pdev->dev, "Received error %d on sending MA= C filter request\n", + status); + goto free_mem; =20 invalid_payload: - dev_err_ratelimited(&adapter->pdev->dev, "Received invalid MAC filter pay= load (op %d) (len %zd)\n", - xn->vc_op, xn->reply_sz); - - return -EINVAL; + dev_err_ratelimited(&adapter->pdev->dev, "Received invalid MAC filter pay= load (len %zd)\n", + buff->iov_len); +free_mem: + libie_ctlq_release_rx_buf(buff); } =20 /** @@ -4267,19 +3811,21 @@ int idpf_add_del_mac_filters(struct idpf_adapter *a= dapter, const u8 *default_mac_addr, u32 vport_id, bool add, bool async) { - struct virtchnl2_mac_addr_list *ma_list __free(kfree) =3D NULL; struct virtchnl2_mac_addr *mac_addr __free(kfree) =3D NULL; - struct idpf_vc_xn_params xn_params =3D {}; + struct libie_ctlq_xn_send_params xn_params =3D { + .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, + .chnl_opcode =3D add ? VIRTCHNL2_OP_ADD_MAC_ADDR : + VIRTCHNL2_OP_DEL_MAC_ADDR, + }; + struct virtchnl2_mac_addr_list *ma_list; u32 num_msgs, total_filters =3D 0; struct idpf_mac_filter *f; - ssize_t reply_sz; - int i =3D 0, k; + int i =3D 0; =20 - xn_params.vc_op =3D add ? VIRTCHNL2_OP_ADD_MAC_ADDR : - VIRTCHNL2_OP_DEL_MAC_ADDR; - xn_params.timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC; - xn_params.async =3D async; - xn_params.async_handler =3D idpf_mac_filter_async_handler; + if (async) { + xn_params.resp_cb =3D idpf_mac_filter_async_handler; + xn_params.send_ctx =3D adapter; + } =20 spin_lock_bh(&vport_config->mac_filter_list_lock); =20 @@ -4334,32 +3880,31 @@ int idpf_add_del_mac_filters(struct idpf_adapter *a= dapter, */ num_msgs =3D DIV_ROUND_UP(total_filters, IDPF_NUM_FILTERS_PER_MSG); =20 - for (i =3D 0, k =3D 0; i < num_msgs; i++) { - u32 entries_size, buf_size, num_entries; + for (u32 i =3D 0, k =3D 0; i < num_msgs; i++) { + u32 entries_size, num_entries; + size_t buf_size; + int err; =20 num_entries =3D min_t(u32, total_filters, IDPF_NUM_FILTERS_PER_MSG); entries_size =3D sizeof(struct virtchnl2_mac_addr) * num_entries; buf_size =3D struct_size(ma_list, mac_addr_list, num_entries); =20 - if (!ma_list || num_entries !=3D IDPF_NUM_FILTERS_PER_MSG) { - kfree(ma_list); - ma_list =3D kzalloc(buf_size, GFP_ATOMIC); - if (!ma_list) - return -ENOMEM; - } else { - memset(ma_list, 0, buf_size); - } + ma_list =3D kzalloc(buf_size, GFP_KERNEL); + if (!ma_list) + return -ENOMEM; =20 ma_list->vport_id =3D cpu_to_le32(vport_id); ma_list->num_mac_addr =3D cpu_to_le16(num_entries); memcpy(ma_list->mac_addr_list, &mac_addr[k], entries_size); =20 - xn_params.send_buf.iov_base =3D ma_list; - xn_params.send_buf.iov_len =3D buf_size; - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); - if (reply_sz < 0) - return reply_sz; + err =3D idpf_send_mb_msg_kfree(adapter, &xn_params, ma_list, + buf_size); + if (err) + return err; + + if (!async) + libie_ctlq_release_rx_buf(&xn_params.recv_mem); =20 k +=3D num_entries; total_filters -=3D num_entries; @@ -4368,6 +3913,28 @@ int idpf_add_del_mac_filters(struct idpf_adapter *ad= apter, return 0; } =20 +/** + * idpf_promiscuous_async_handler - async callback for promiscuous mode + * @ctx: controlq context structure + * @buff: response buffer pointer and size + * @status: async call return value + * + * Nobody is waiting for the promiscuous virtchnl message response. Print + * an error message if something went wrong and return. + */ +static void idpf_promiscuous_async_handler(void *ctx, + struct kvec *buff, + int status) +{ + struct idpf_adapter *adapter =3D ctx; + + if (status) + dev_err_ratelimited(&adapter->pdev->dev, "Failed to set promiscuous mode= : %d\n", + status); + + libie_ctlq_release_rx_buf(buff); +} + /** * idpf_set_promiscuous - set promiscuous and send message to mailbox * @adapter: Driver specific private structure @@ -4382,9 +3949,13 @@ int idpf_set_promiscuous(struct idpf_adapter *adapte= r, struct idpf_vport_user_config_data *config_data, u32 vport_id) { - struct idpf_vc_xn_params xn_params =3D {}; + struct libie_ctlq_xn_send_params xn_params =3D { + .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, + .chnl_opcode =3D VIRTCHNL2_OP_CONFIG_PROMISCUOUS_MODE, + .resp_cb =3D idpf_promiscuous_async_handler, + .send_ctx =3D adapter, + }; struct virtchnl2_promisc_info vpi; - ssize_t reply_sz; u16 flags =3D 0; =20 if (test_bit(__IDPF_PROMISC_UC, config_data->user_flags)) @@ -4395,15 +3966,7 @@ int idpf_set_promiscuous(struct idpf_adapter *adapte= r, vpi.vport_id =3D cpu_to_le32(vport_id); vpi.flags =3D cpu_to_le16(flags); =20 - xn_params.vc_op =3D VIRTCHNL2_OP_CONFIG_PROMISCUOUS_MODE; - xn_params.timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC; - xn_params.send_buf.iov_base =3D &vpi; - xn_params.send_buf.iov_len =3D sizeof(vpi); - /* setting promiscuous is only ever done asynchronously */ - xn_params.async =3D true; - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); - - return reply_sz < 0 ? reply_sz : 0; + return idpf_send_mb_msg(adapter, &xn_params, &vpi, sizeof(vpi)); } =20 /** @@ -4421,26 +3984,39 @@ int idpf_idc_rdma_vc_send_sync(struct iidc_rdma_cor= e_dev_info *cdev_info, u8 *recv_msg, u16 *recv_len) { struct idpf_adapter *adapter =3D pci_get_drvdata(cdev_info->pdev); - struct idpf_vc_xn_params xn_params =3D { }; - ssize_t reply_sz; - u16 recv_size; + struct libie_ctlq_xn_send_params xn_params =3D { + .chnl_opcode =3D VIRTCHNL2_OP_RDMA, + .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, + }; + u8 on_stack_buf[LIBIE_CP_TX_COPYBREAK]; + void *send_buf; + int err; =20 - if (!recv_msg || !recv_len || msg_size > IDPF_CTLQ_MAX_BUF_LEN) + if (!recv_msg || !recv_len || msg_size > LIBIE_CTLQ_MAX_BUF_LEN) return -EINVAL; =20 - recv_size =3D min_t(u16, *recv_len, IDPF_CTLQ_MAX_BUF_LEN); - *recv_len =3D 0; - xn_params.vc_op =3D VIRTCHNL2_OP_RDMA; - xn_params.timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC; - xn_params.send_buf.iov_base =3D send_msg; - xn_params.send_buf.iov_len =3D msg_size; - xn_params.recv_buf.iov_base =3D recv_msg; - xn_params.recv_buf.iov_len =3D recv_size; - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); - if (reply_sz < 0) - return reply_sz; - *recv_len =3D reply_sz; + if (!libie_cp_can_send_onstack(msg_size)) { + send_buf =3D kzalloc(msg_size, GFP_KERNEL); + if (!send_buf) + return -ENOMEM; + } else { + send_buf =3D on_stack_buf; + } =20 - return 0; + memcpy(send_buf, send_msg, msg_size); + err =3D idpf_send_mb_msg(adapter, &xn_params, send_buf, msg_size); + if (err) + return err; + + if (xn_params.recv_mem.iov_len > *recv_len) { + err =3D -EINVAL; + goto rel_buf; + } + + *recv_len =3D xn_params.recv_mem.iov_len; + memcpy(recv_msg, xn_params.recv_mem.iov_base, *recv_len); +rel_buf: + libie_ctlq_release_rx_buf(&xn_params.recv_mem); + return err; } EXPORT_SYMBOL_GPL(idpf_idc_rdma_vc_send_sync); diff --git a/drivers/net/ethernet/intel/idpf/idpf_virtchnl.h b/drivers/net/= ethernet/intel/idpf/idpf_virtchnl.h index 762b477e019c..be3fe8fa7327 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_virtchnl.h +++ b/drivers/net/ethernet/intel/idpf/idpf_virtchnl.h @@ -7,85 +7,6 @@ #include =20 #define IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC (60 * 1000) -#define IDPF_VC_XN_IDX_M GENMASK(7, 0) -#define IDPF_VC_XN_SALT_M GENMASK(15, 8) -#define IDPF_VC_XN_RING_LEN U8_MAX - -/** - * enum idpf_vc_xn_state - Virtchnl transaction status - * @IDPF_VC_XN_IDLE: not expecting a reply, ready to be used - * @IDPF_VC_XN_WAITING: expecting a reply, not yet received - * @IDPF_VC_XN_COMPLETED_SUCCESS: a reply was expected and received, buffer - * updated - * @IDPF_VC_XN_COMPLETED_FAILED: a reply was expected and received, but th= ere - * was an error, buffer not updated - * @IDPF_VC_XN_SHUTDOWN: transaction object cannot be used, VC torn down - * @IDPF_VC_XN_ASYNC: transaction sent asynchronously and doesn't have the - * return context; a callback may be provided to handle - * return - */ -enum idpf_vc_xn_state { - IDPF_VC_XN_IDLE =3D 1, - IDPF_VC_XN_WAITING, - IDPF_VC_XN_COMPLETED_SUCCESS, - IDPF_VC_XN_COMPLETED_FAILED, - IDPF_VC_XN_SHUTDOWN, - IDPF_VC_XN_ASYNC, -}; - -struct idpf_vc_xn; -/* Callback for asynchronous messages */ -typedef int (*async_vc_cb) (struct idpf_adapter *, struct idpf_vc_xn *, - const struct idpf_ctlq_msg *); - -/** - * struct idpf_vc_xn - Data structure representing virtchnl transactions - * @completed: virtchnl event loop uses that to signal when a reply is - * available, uses kernel completion API - * @state: virtchnl event loop stores the data below, protected by the - * completion's lock. - * @reply_sz: Original size of reply, may be > reply_buf.iov_len; it will = be - * truncated on its way to the receiver thread according to - * reply_buf.iov_len. - * @reply: Reference to the buffer(s) where the reply data should be writt= en - * to. May be 0-length (then NULL address permitted) if the reply data - * should be ignored. - * @async_handler: if sent asynchronously, a callback can be provided to h= andle - * the reply when it's received - * @vc_op: corresponding opcode sent with this transaction - * @idx: index used as retrieval on reply receive, used for cookie - * @salt: changed every message to make unique, used for cookie - */ -struct idpf_vc_xn { - struct completion completed; - enum idpf_vc_xn_state state; - size_t reply_sz; - struct kvec reply; - async_vc_cb async_handler; - u32 vc_op; - u8 idx; - u8 salt; -}; - -/** - * struct idpf_vc_xn_params - Parameters for executing transaction - * @send_buf: kvec for send buffer - * @recv_buf: kvec for recv buffer, may be NULL, must then have zero length - * @timeout_ms: timeout to wait for reply - * @async: send message asynchronously, will not wait on completion - * @async_handler: If sent asynchronously, optional callback handler. The = user - * must be careful when using async handlers as the memory for - * the recv_buf _cannot_ be on stack if this is async. - * @vc_op: virtchnl op to send - */ -struct idpf_vc_xn_params { - struct kvec send_buf; - struct kvec recv_buf; - int timeout_ms; - bool async; - async_vc_cb async_handler; - u32 vc_op; -}; =20 struct idpf_adapter; struct idpf_netdev_priv; @@ -95,8 +16,6 @@ struct idpf_vport_max_q; struct idpf_vport_config; struct idpf_vport_user_config_data; =20 -ssize_t idpf_vc_xn_exec(struct idpf_adapter *adapter, - const struct idpf_vc_xn_params *params); int idpf_init_dflt_mbx(struct idpf_adapter *adapter); void idpf_deinit_dflt_mbx(struct idpf_adapter *adapter); int idpf_vc_core_init(struct idpf_adapter *adapter); @@ -123,9 +42,11 @@ bool idpf_sideband_action_ena(struct idpf_vport *vport, struct ethtool_rx_flow_spec *fsp); unsigned int idpf_fsteer_max_rules(struct idpf_vport *vport); =20 -int idpf_recv_mb_msg(struct idpf_adapter *adapter, struct idpf_ctlq_info *= arq); -int idpf_send_mb_msg(struct idpf_adapter *adapter, struct idpf_ctlq_info *= asq, - u32 op, u16 msg_size, u8 *msg, u16 cookie); +void idpf_recv_event_msg(struct libie_ctlq_ctx *ctx, + struct libie_ctlq_msg *ctlq_msg); +int idpf_send_mb_msg(struct idpf_adapter *adapter, + struct libie_ctlq_xn_send_params *xn_params, + void *send_buf, size_t send_buf_size); =20 struct idpf_queue_ptr { enum virtchnl2_queue_type type; @@ -213,7 +134,6 @@ int idpf_send_get_set_rss_key_msg(struct idpf_adapter *= adapter, int idpf_send_get_set_rss_lut_msg(struct idpf_adapter *adapter, struct idpf_rss_data *rss_data, u32 vport_id, bool get); -void idpf_vc_xn_shutdown(struct idpf_vc_xn_manager *vcxn_mngr); int idpf_idc_rdma_vc_send_sync(struct iidc_rdma_core_dev_info *cdev_info, u8 *send_msg, u16 msg_size, u8 *recv_msg, u16 *recv_len); diff --git a/drivers/net/ethernet/intel/idpf/idpf_virtchnl_ptp.c b/drivers/= net/ethernet/intel/idpf/idpf_virtchnl_ptp.c index 82f26fc7bc08..a6cadba28905 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_virtchnl_ptp.c +++ b/drivers/net/ethernet/intel/idpf/idpf_virtchnl_ptp.c @@ -15,7 +15,6 @@ */ int idpf_ptp_get_caps(struct idpf_adapter *adapter) { - struct virtchnl2_ptp_get_caps *recv_ptp_caps_msg __free(kfree) =3D NULL; struct virtchnl2_ptp_get_caps send_ptp_caps_msg =3D { .caps =3D cpu_to_le32(VIRTCHNL2_CAP_PTP_GET_DEVICE_CLK_TIME | VIRTCHNL2_CAP_PTP_GET_DEVICE_CLK_TIME_MB | @@ -24,35 +23,34 @@ int idpf_ptp_get_caps(struct idpf_adapter *adapter) VIRTCHNL2_CAP_PTP_ADJ_DEVICE_CLK_MB | VIRTCHNL2_CAP_PTP_TX_TSTAMPS_MB) }; - struct idpf_vc_xn_params xn_params =3D { - .vc_op =3D VIRTCHNL2_OP_PTP_GET_CAPS, - .send_buf.iov_base =3D &send_ptp_caps_msg, - .send_buf.iov_len =3D sizeof(send_ptp_caps_msg), + struct libie_ctlq_xn_send_params xn_params =3D { + .chnl_opcode =3D VIRTCHNL2_OP_PTP_GET_CAPS, .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, }; struct virtchnl2_ptp_cross_time_reg_offsets cross_tstamp_offsets; struct libie_mmio_info *mmio =3D &adapter->ctlq_ctx.mmio_info; struct virtchnl2_ptp_clk_adj_reg_offsets clk_adj_offsets; struct virtchnl2_ptp_clk_reg_offsets clock_offsets; + struct virtchnl2_ptp_get_caps *recv_ptp_caps_msg; struct idpf_ptp_secondary_mbx *scnd_mbx; struct idpf_ptp *ptp =3D adapter->ptp; enum idpf_ptp_access access_type; u32 temp_offset; - int reply_sz; + size_t reply_sz; + int err; =20 - recv_ptp_caps_msg =3D kzalloc(sizeof(struct virtchnl2_ptp_get_caps), - GFP_KERNEL); - if (!recv_ptp_caps_msg) - return -ENOMEM; + err =3D idpf_send_mb_msg(adapter, &xn_params, &send_ptp_caps_msg, + sizeof(send_ptp_caps_msg)); + if (err) + return err; =20 - xn_params.recv_buf.iov_base =3D recv_ptp_caps_msg; - xn_params.recv_buf.iov_len =3D sizeof(*recv_ptp_caps_msg); + reply_sz =3D xn_params.recv_mem.iov_len; + if (reply_sz !=3D sizeof(*recv_ptp_caps_msg)) { + err =3D -EIO; + goto free_resp; + } =20 - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); - if (reply_sz < 0) - return reply_sz; - else if (reply_sz !=3D sizeof(*recv_ptp_caps_msg)) - return -EIO; + recv_ptp_caps_msg =3D xn_params.recv_mem.iov_base; =20 ptp->caps =3D le32_to_cpu(recv_ptp_caps_msg->caps); ptp->base_incval =3D le64_to_cpu(recv_ptp_caps_msg->base_incval); @@ -113,7 +111,7 @@ int idpf_ptp_get_caps(struct idpf_adapter *adapter) discipline_clock: access_type =3D ptp->adj_dev_clk_time_access; if (access_type !=3D IDPF_PTP_DIRECT) - return 0; + goto free_resp; =20 clk_adj_offsets =3D recv_ptp_caps_msg->clk_adj_offsets; =20 @@ -146,7 +144,9 @@ int idpf_ptp_get_caps(struct idpf_adapter *adapter) ptp->dev_clk_regs.phy_shadj_h =3D libie_pci_get_mmio_addr(mmio, temp_offset); =20 - return 0; +free_resp: + libie_ctlq_release_rx_buf(&xn_params.recv_mem); + return err; } =20 /** @@ -161,28 +161,34 @@ int idpf_ptp_get_caps(struct idpf_adapter *adapter) int idpf_ptp_get_dev_clk_time(struct idpf_adapter *adapter, struct idpf_ptp_dev_timers *dev_clk_time) { + struct virtchnl2_ptp_get_dev_clk_time *get_dev_clk_time_resp; struct virtchnl2_ptp_get_dev_clk_time get_dev_clk_time_msg; - struct idpf_vc_xn_params xn_params =3D { - .vc_op =3D VIRTCHNL2_OP_PTP_GET_DEV_CLK_TIME, - .send_buf.iov_base =3D &get_dev_clk_time_msg, - .send_buf.iov_len =3D sizeof(get_dev_clk_time_msg), - .recv_buf.iov_base =3D &get_dev_clk_time_msg, - .recv_buf.iov_len =3D sizeof(get_dev_clk_time_msg), + struct libie_ctlq_xn_send_params xn_params =3D { + .chnl_opcode =3D VIRTCHNL2_OP_PTP_GET_DEV_CLK_TIME, .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, }; - int reply_sz; + size_t reply_sz; u64 dev_time; + int err; =20 - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); - if (reply_sz < 0) - return reply_sz; - if (reply_sz !=3D sizeof(get_dev_clk_time_msg)) - return -EIO; + err =3D idpf_send_mb_msg(adapter, &xn_params, &get_dev_clk_time_msg, + sizeof(get_dev_clk_time_msg)); + if (err) + return err; =20 - dev_time =3D le64_to_cpu(get_dev_clk_time_msg.dev_time_ns); + reply_sz =3D xn_params.recv_mem.iov_len; + if (reply_sz !=3D sizeof(*get_dev_clk_time_resp)) { + err =3D -EIO; + goto free_resp; + } + + get_dev_clk_time_resp =3D xn_params.recv_mem.iov_base; + dev_time =3D le64_to_cpu(get_dev_clk_time_resp->dev_time_ns); dev_clk_time->dev_clk_time_ns =3D dev_time; =20 - return 0; +free_resp: + libie_ctlq_release_rx_buf(&xn_params.recv_mem); + return err; } =20 /** @@ -198,27 +204,30 @@ int idpf_ptp_get_dev_clk_time(struct idpf_adapter *ad= apter, int idpf_ptp_get_cross_time(struct idpf_adapter *adapter, struct idpf_ptp_dev_timers *cross_time) { - struct virtchnl2_ptp_get_cross_time cross_time_msg; - struct idpf_vc_xn_params xn_params =3D { - .vc_op =3D VIRTCHNL2_OP_PTP_GET_CROSS_TIME, - .send_buf.iov_base =3D &cross_time_msg, - .send_buf.iov_len =3D sizeof(cross_time_msg), - .recv_buf.iov_base =3D &cross_time_msg, - .recv_buf.iov_len =3D sizeof(cross_time_msg), + struct virtchnl2_ptp_get_cross_time cross_time_send, *cross_time_recv; + struct libie_ctlq_xn_send_params xn_params =3D { + .chnl_opcode =3D VIRTCHNL2_OP_PTP_GET_CROSS_TIME, .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, }; - int reply_sz; + int err =3D 0; =20 - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); - if (reply_sz < 0) - return reply_sz; - if (reply_sz !=3D sizeof(cross_time_msg)) - return -EIO; + err =3D idpf_send_mb_msg(adapter, &xn_params, &cross_time_send, + sizeof(cross_time_send)); + if (err) + return err; + + if (xn_params.recv_mem.iov_len !=3D sizeof(*cross_time_recv)) { + err =3D -EIO; + goto free_resp; + } =20 - cross_time->dev_clk_time_ns =3D le64_to_cpu(cross_time_msg.dev_time_ns); - cross_time->sys_time_ns =3D le64_to_cpu(cross_time_msg.sys_time_ns); + cross_time_recv =3D xn_params.recv_mem.iov_base; + cross_time->dev_clk_time_ns =3D le64_to_cpu(cross_time_recv->dev_time_ns); + cross_time->sys_time_ns =3D le64_to_cpu(cross_time_recv->sys_time_ns); =20 - return 0; +free_resp: + libie_ctlq_release_rx_buf(&xn_params.recv_mem); + return err; } =20 /** @@ -235,23 +244,18 @@ int idpf_ptp_set_dev_clk_time(struct idpf_adapter *ad= apter, u64 time) struct virtchnl2_ptp_set_dev_clk_time set_dev_clk_time_msg =3D { .dev_time_ns =3D cpu_to_le64(time), }; - struct idpf_vc_xn_params xn_params =3D { - .vc_op =3D VIRTCHNL2_OP_PTP_SET_DEV_CLK_TIME, - .send_buf.iov_base =3D &set_dev_clk_time_msg, - .send_buf.iov_len =3D sizeof(set_dev_clk_time_msg), - .recv_buf.iov_base =3D &set_dev_clk_time_msg, - .recv_buf.iov_len =3D sizeof(set_dev_clk_time_msg), + struct libie_ctlq_xn_send_params xn_params =3D { + .chnl_opcode =3D VIRTCHNL2_OP_PTP_SET_DEV_CLK_TIME, .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, }; - int reply_sz; + int err; =20 - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); - if (reply_sz < 0) - return reply_sz; - if (reply_sz !=3D sizeof(set_dev_clk_time_msg)) - return -EIO; + err =3D idpf_send_mb_msg(adapter, &xn_params, &set_dev_clk_time_msg, + sizeof(set_dev_clk_time_msg)); + if (!err) + libie_ctlq_release_rx_buf(&xn_params.recv_mem); =20 - return 0; + return err; } =20 /** @@ -268,23 +272,18 @@ int idpf_ptp_adj_dev_clk_time(struct idpf_adapter *ad= apter, s64 delta) struct virtchnl2_ptp_adj_dev_clk_time adj_dev_clk_time_msg =3D { .delta =3D cpu_to_le64(delta), }; - struct idpf_vc_xn_params xn_params =3D { - .vc_op =3D VIRTCHNL2_OP_PTP_ADJ_DEV_CLK_TIME, - .send_buf.iov_base =3D &adj_dev_clk_time_msg, - .send_buf.iov_len =3D sizeof(adj_dev_clk_time_msg), - .recv_buf.iov_base =3D &adj_dev_clk_time_msg, - .recv_buf.iov_len =3D sizeof(adj_dev_clk_time_msg), + struct libie_ctlq_xn_send_params xn_params =3D { + .chnl_opcode =3D VIRTCHNL2_OP_PTP_ADJ_DEV_CLK_TIME, .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, }; - int reply_sz; + int err; =20 - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); - if (reply_sz < 0) - return reply_sz; - if (reply_sz !=3D sizeof(adj_dev_clk_time_msg)) - return -EIO; + err =3D idpf_send_mb_msg(adapter, &xn_params, &adj_dev_clk_time_msg, + sizeof(adj_dev_clk_time_msg)); + if (!err) + libie_ctlq_release_rx_buf(&xn_params.recv_mem); =20 - return 0; + return err; } =20 /** @@ -302,23 +301,18 @@ int idpf_ptp_adj_dev_clk_fine(struct idpf_adapter *ad= apter, u64 incval) struct virtchnl2_ptp_adj_dev_clk_fine adj_dev_clk_fine_msg =3D { .incval =3D cpu_to_le64(incval), }; - struct idpf_vc_xn_params xn_params =3D { - .vc_op =3D VIRTCHNL2_OP_PTP_ADJ_DEV_CLK_FINE, - .send_buf.iov_base =3D &adj_dev_clk_fine_msg, - .send_buf.iov_len =3D sizeof(adj_dev_clk_fine_msg), - .recv_buf.iov_base =3D &adj_dev_clk_fine_msg, - .recv_buf.iov_len =3D sizeof(adj_dev_clk_fine_msg), + struct libie_ctlq_xn_send_params xn_params =3D { + .chnl_opcode =3D VIRTCHNL2_OP_PTP_ADJ_DEV_CLK_FINE, .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, }; - int reply_sz; + int err; =20 - reply_sz =3D idpf_vc_xn_exec(adapter, &xn_params); - if (reply_sz < 0) - return reply_sz; - if (reply_sz !=3D sizeof(adj_dev_clk_fine_msg)) - return -EIO; + err =3D idpf_send_mb_msg(adapter, &xn_params, &adj_dev_clk_fine_msg, + sizeof(adj_dev_clk_fine_msg)); + if (!err) + libie_ctlq_release_rx_buf(&xn_params.recv_mem); =20 - return 0; + return err; } =20 /** @@ -337,18 +331,16 @@ int idpf_ptp_get_vport_tstamps_caps(struct idpf_vport= *vport) struct virtchnl2_ptp_tx_tstamp_latch_caps tx_tstamp_latch_caps; struct idpf_ptp_vport_tx_tstamp_caps *tstamp_caps; struct idpf_ptp_tx_tstamp *ptp_tx_tstamp, *tmp; - struct idpf_vc_xn_params xn_params =3D { - .vc_op =3D VIRTCHNL2_OP_PTP_GET_VPORT_TX_TSTAMP_CAPS, - .send_buf.iov_base =3D &send_tx_tstamp_caps, - .send_buf.iov_len =3D sizeof(send_tx_tstamp_caps), - .recv_buf.iov_len =3D IDPF_CTLQ_MAX_BUF_LEN, + struct libie_ctlq_xn_send_params xn_params =3D { + .chnl_opcode =3D VIRTCHNL2_OP_PTP_GET_VPORT_TX_TSTAMP_CAPS, .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, }; enum idpf_ptp_access tstamp_access, get_dev_clk_access; struct idpf_ptp *ptp =3D vport->adapter->ptp; struct list_head *head; - int err =3D 0, reply_sz; + size_t reply_sz; u16 num_latches; + int err =3D 0; u32 size; =20 if (!ptp) @@ -360,19 +352,15 @@ int idpf_ptp_get_vport_tstamps_caps(struct idpf_vport= *vport) get_dev_clk_access =3D=3D IDPF_PTP_NONE) return -EOPNOTSUPP; =20 - rcv_tx_tstamp_caps =3D kzalloc(IDPF_CTLQ_MAX_BUF_LEN, GFP_KERNEL); - if (!rcv_tx_tstamp_caps) - return -ENOMEM; - send_tx_tstamp_caps.vport_id =3D cpu_to_le32(vport->vport_id); - xn_params.recv_buf.iov_base =3D rcv_tx_tstamp_caps; =20 - reply_sz =3D idpf_vc_xn_exec(vport->adapter, &xn_params); - if (reply_sz < 0) { - err =3D reply_sz; - goto get_tstamp_caps_out; - } + err =3D idpf_send_mb_msg(vport->adapter, &xn_params, &send_tx_tstamp_caps, + sizeof(send_tx_tstamp_caps)); + if (err) + return err; =20 + rcv_tx_tstamp_caps =3D xn_params.recv_mem.iov_base; + reply_sz =3D xn_params.recv_mem.iov_len; num_latches =3D le16_to_cpu(rcv_tx_tstamp_caps->num_latches); size =3D struct_size(rcv_tx_tstamp_caps, tstamp_latches, num_latches); if (reply_sz !=3D size) { @@ -427,7 +415,7 @@ int idpf_ptp_get_vport_tstamps_caps(struct idpf_vport *= vport) } =20 vport->tx_tstamp_caps =3D tstamp_caps; - kfree(rcv_tx_tstamp_caps); + libie_ctlq_release_rx_buf(&xn_params.recv_mem); =20 return 0; =20 @@ -440,7 +428,7 @@ int idpf_ptp_get_vport_tstamps_caps(struct idpf_vport *= vport) =20 kfree(tstamp_caps); get_tstamp_caps_out: - kfree(rcv_tx_tstamp_caps); + libie_ctlq_release_rx_buf(&xn_params.recv_mem); =20 return err; } @@ -537,9 +525,9 @@ idpf_ptp_get_tstamp_value(struct idpf_vport *vport, =20 /** * idpf_ptp_get_tx_tstamp_async_handler - Async callback for getting Tx ts= tamps - * @adapter: Driver specific private structure - * @xn: transaction for message - * @ctlq_msg: received message + * @ctx: adapter pointer + * @mem: address and size of the response + * @status: return value of the request * * Read the tstamps Tx tstamp values from a received message and put them * directly to the skb. The number of timestamps to read is specified by @@ -547,22 +535,21 @@ idpf_ptp_get_tstamp_value(struct idpf_vport *vport, * * Return: 0 on success, -errno otherwise. */ -static int -idpf_ptp_get_tx_tstamp_async_handler(struct idpf_adapter *adapter, - struct idpf_vc_xn *xn, - const struct idpf_ctlq_msg *ctlq_msg) +static void +idpf_ptp_get_tx_tstamp_async_handler(void *ctx, struct kvec *mem, int stat= us) { struct virtchnl2_ptp_get_vport_tx_tstamp_latches *recv_tx_tstamp_msg; struct idpf_ptp_vport_tx_tstamp_caps *tx_tstamp_caps; struct virtchnl2_ptp_tx_tstamp_latch tstamp_latch; struct idpf_ptp_tx_tstamp *tx_tstamp, *tmp; struct idpf_vport *tstamp_vport =3D NULL; + struct idpf_adapter *adapter =3D ctx; struct list_head *head; u16 num_latches; u32 vport_id; int err =3D 0; =20 - recv_tx_tstamp_msg =3D ctlq_msg->ctx.indirect.payload->va; + recv_tx_tstamp_msg =3D mem->iov_base; vport_id =3D le32_to_cpu(recv_tx_tstamp_msg->vport_id); =20 idpf_for_each_vport(adapter, vport) { @@ -576,7 +563,7 @@ idpf_ptp_get_tx_tstamp_async_handler(struct idpf_adapte= r *adapter, } =20 if (!tstamp_vport || !tstamp_vport->tx_tstamp_caps) - return -EINVAL; + goto free_resp; =20 tx_tstamp_caps =3D tstamp_vport->tx_tstamp_caps; num_latches =3D le16_to_cpu(recv_tx_tstamp_msg->num_latches); @@ -611,8 +598,8 @@ idpf_ptp_get_tx_tstamp_async_handler(struct idpf_adapte= r *adapter, =20 unlock: spin_unlock_bh(&tx_tstamp_caps->latches_lock); - - return err; +free_resp: + libie_ctlq_release_rx_buf(mem); } =20 /** @@ -628,15 +615,15 @@ int idpf_ptp_get_tx_tstamp(struct idpf_vport *vport) { struct virtchnl2_ptp_get_vport_tx_tstamp_latches *send_tx_tstamp_msg; struct idpf_ptp_vport_tx_tstamp_caps *tx_tstamp_caps; - struct idpf_vc_xn_params xn_params =3D { - .vc_op =3D VIRTCHNL2_OP_PTP_GET_VPORT_TX_TSTAMP, + struct libie_ctlq_xn_send_params xn_params =3D { + .chnl_opcode =3D VIRTCHNL2_OP_PTP_GET_VPORT_TX_TSTAMP, .timeout_ms =3D IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC, - .async =3D true, - .async_handler =3D idpf_ptp_get_tx_tstamp_async_handler, + .resp_cb =3D idpf_ptp_get_tx_tstamp_async_handler, + .send_ctx =3D vport->adapter, }; struct idpf_ptp_tx_tstamp *ptp_tx_tstamp; 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a="76846143" X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="76846143" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Nov 2025 05:49:38 -0800 X-CSE-ConnectionGUID: LtfNC6LtQmGH0+DBY8JSQw== X-CSE-MsgGUID: qgFF5fAWQlq0dDQ584hcDA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="190115729" Received: from irvmail002.ir.intel.com ([10.43.11.120]) by fmviesa007.fm.intel.com with ESMTP; 17 Nov 2025 05:49:33 -0800 Received: from mglak.igk.intel.com (mglak.igk.intel.com [10.237.112.146]) by irvmail002.ir.intel.com (Postfix) with ESMTP id 4653237E27; Mon, 17 Nov 2025 13:49:31 +0000 (GMT) From: Larysa Zaremba To: intel-wired-lan@lists.osuosl.org, Tony Nguyen Cc: aleksander.lobakin@intel.com, sridhar.samudrala@intel.com, "Singhai, Anjali" , Michal Swiatkowski , Larysa Zaremba , "Fijalkowski, Maciej" , Emil Tantilov , Madhu Chittim , Josh Hay , "Keller, Jacob E" , jayaprakash.shanmugam@intel.com, natalia.wochtman@intel.com, Jiri Pirko , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Simon Horman , Jonathan Corbet , Richard Cochran , Przemek Kitszel , Andrew Lunn , netdev@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH iwl-next v5 10/15] idpf: make mbx_task queueing and cancelling more consistent Date: Mon, 17 Nov 2025 14:48:50 +0100 Message-ID: <20251117134912.18566-11-larysa.zaremba@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20251117134912.18566-1-larysa.zaremba@intel.com> References: <20251117134912.18566-1-larysa.zaremba@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" As a consequence of refactoring idpf code to use libeth APIs, idpf_vc_xn_shutdown was merged with and replaced by idpf_deinit_dflt_mbx. This does not affect the Tx path, as it checked for a presence of an xn manager anyway. Rx processing is handled by the mbx_task that is not always cancelled before calling the new consolidated mailbox deinit function. Moreover, in the reset path idpf_intr_rel() reschedules it after the deinit is done. This leads to mbx_task referencing the freed mailbox and causing KASAN warnings. To remedy this, in the init path, do the first queueing of mbx_task in idpf_init_dflt_mbx(), in deinit and reset, always cancel the task in idpf_deinit_dflt_mbx() and in every flow first call idpf_mb_intr_rel_irq(). Reviewed-by: Emil Tantilov Reviewed-by: Michal Kubiak Signed-off-by: Larysa Zaremba --- drivers/net/ethernet/intel/idpf/idpf.h | 1 + drivers/net/ethernet/intel/idpf/idpf_lib.c | 9 ++++----- drivers/net/ethernet/intel/idpf/idpf_virtchnl.c | 6 +++++- 3 files changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/intel/idpf/idpf.h b/drivers/net/ethernet/= intel/idpf/idpf.h index 0594f4a30f23..c9c681a7f4b9 100644 --- a/drivers/net/ethernet/intel/idpf/idpf.h +++ b/drivers/net/ethernet/intel/idpf/idpf.h @@ -984,6 +984,7 @@ void idpf_vc_event_task(struct work_struct *work); void idpf_dev_ops_init(struct idpf_adapter *adapter); void idpf_vf_dev_ops_init(struct idpf_adapter *adapter); int idpf_intr_req(struct idpf_adapter *adapter); +void idpf_mb_intr_rel_irq(struct idpf_adapter *adapter); void idpf_intr_rel(struct idpf_adapter *adapter); u16 idpf_get_max_tx_hdr_size(struct idpf_adapter *adapter); int idpf_initiate_soft_reset(struct idpf_vport *vport, diff --git a/drivers/net/ethernet/intel/idpf/idpf_lib.c b/drivers/net/ether= net/intel/idpf/idpf_lib.c index 7751a81fc29d..69eb72ed6b99 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_lib.c +++ b/drivers/net/ethernet/intel/idpf/idpf_lib.c @@ -68,9 +68,11 @@ static void idpf_deinit_vector_stack(struct idpf_adapter= *adapter) * This will also disable interrupt mode and queue up mailbox task. Mailbox * task will reschedule itself if not in interrupt mode. */ -static void idpf_mb_intr_rel_irq(struct idpf_adapter *adapter) +void idpf_mb_intr_rel_irq(struct idpf_adapter *adapter) { - clear_bit(IDPF_MB_INTR_MODE, adapter->flags); + if (!test_and_clear_bit(IDPF_MB_INTR_MODE, adapter->flags)) + return; + kfree(free_irq(adapter->msix_entries[0].vector, adapter)); queue_delayed_work(adapter->mbx_wq, &adapter->mbx_task, 0); } @@ -1936,14 +1938,11 @@ static void idpf_init_hard_reset(struct idpf_adapte= r *adapter) goto unlock_mutex; } =20 - queue_delayed_work(adapter->mbx_wq, &adapter->mbx_task, 0); - /* Initialize the state machine, also allocate memory and request * resources */ err =3D idpf_vc_core_init(adapter); if (err) { - cancel_delayed_work_sync(&adapter->mbx_task); idpf_deinit_dflt_mbx(adapter); goto unlock_mutex; } diff --git a/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c b/drivers/net/= ethernet/intel/idpf/idpf_virtchnl.c index 132bbe5b9d7d..1099a44314ea 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c +++ b/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c @@ -2921,6 +2921,8 @@ int idpf_init_dflt_mbx(struct idpf_adapter *adapter) adapter->xn_init_params.xnm =3D params.xnm; adapter->state =3D __IDPF_VER_CHECK; =20 + queue_delayed_work(adapter->mbx_wq, &adapter->mbx_task, 0); + return 0; } =20 @@ -2930,6 +2932,9 @@ int idpf_init_dflt_mbx(struct idpf_adapter *adapter) */ void idpf_deinit_dflt_mbx(struct idpf_adapter *adapter) { + idpf_mb_intr_rel_irq(adapter); + cancel_delayed_work_sync(&adapter->mbx_task); + if (adapter->arq && adapter->asq) { idpf_mb_clean(adapter, adapter->asq); libie_ctlq_xn_deinit(adapter->xn_init_params.xnm, @@ -3189,7 +3194,6 @@ void idpf_vc_core_deinit(struct idpf_adapter *adapter) idpf_deinit_dflt_mbx(adapter); =20 cancel_delayed_work_sync(&adapter->serv_task); - cancel_delayed_work_sync(&adapter->mbx_task); =20 idpf_vport_params_buf_rel(adapter); =20 --=20 2.47.0 From nobody Tue Dec 2 02:51:45 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E117338907; 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a="76846156" X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="76846156" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Nov 2025 05:49:40 -0800 X-CSE-ConnectionGUID: nNUeO9DSRfSbTgvX+Fmxqw== X-CSE-MsgGUID: rL64JX27TOyEVVuVAUgoVA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="190115733" Received: from irvmail002.ir.intel.com ([10.43.11.120]) by fmviesa007.fm.intel.com with ESMTP; 17 Nov 2025 05:49:35 -0800 Received: from mglak.igk.intel.com (mglak.igk.intel.com [10.237.112.146]) by irvmail002.ir.intel.com (Postfix) with ESMTP id E347737E39; Mon, 17 Nov 2025 13:49:32 +0000 (GMT) From: Larysa Zaremba To: intel-wired-lan@lists.osuosl.org, Tony Nguyen Cc: aleksander.lobakin@intel.com, sridhar.samudrala@intel.com, "Singhai, Anjali" , Michal Swiatkowski , Larysa Zaremba , "Fijalkowski, Maciej" , Emil Tantilov , Madhu Chittim , Josh Hay , "Keller, Jacob E" , jayaprakash.shanmugam@intel.com, natalia.wochtman@intel.com, Jiri Pirko , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Simon Horman , Jonathan Corbet , Richard Cochran , Przemek Kitszel , Andrew Lunn , netdev@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Aleksandr Loktionov Subject: [PATCH iwl-next v5 11/15] idpf: print a debug message and bail in case of non-event ctlq message Date: Mon, 17 Nov 2025 14:48:51 +0100 Message-ID: <20251117134912.18566-12-larysa.zaremba@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20251117134912.18566-1-larysa.zaremba@intel.com> References: <20251117134912.18566-1-larysa.zaremba@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Unlike previous internal idpf ctlq implementation, idpf calls the default message handler for all received messages that do not have a matching xn transaction, not only for VIRTCHNL2_OP_EVENT. This leads to many error messages printing garbage, because the parsing expected a valid event message, but got e.g. a delayed response for a timed-out transaction. The information about timed-out transactions and otherwise unhandleable messages can still be valuable for developers, so print the information with dynamic debug and exit the function, so the following functions can parse valid events in peace. Reviewed-by: Aleksandr Loktionov Reviewed-by: Michal Kubiak Signed-off-by: Larysa Zaremba --- drivers/net/ethernet/intel/idpf/idpf_virtchnl.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c b/drivers/net/= ethernet/intel/idpf/idpf_virtchnl.c index 1099a44314ea..521d90d80e1f 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c +++ b/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c @@ -84,6 +84,13 @@ void idpf_recv_event_msg(struct libie_ctlq_ctx *ctx, u32 event; =20 adapter =3D container_of(ctx, struct idpf_adapter, ctlq_ctx); + if (ctlq_msg->chnl_opcode !=3D VIRTCHNL2_OP_EVENT) { + dev_dbg(&adapter->pdev->dev, + "Unhandled message with opcode %u from CP\n", + ctlq_msg->chnl_opcode); + goto free_rx_buf; + } + if (payload_size < sizeof(*v2e)) { dev_err_ratelimited(&adapter->pdev->dev, "Failed to receive valid payloa= d for event msg (op %d len %d)\n", ctlq_msg->chnl_opcode, --=20 2.47.0 From nobody Tue Dec 2 02:51:45 2025 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DCFC2339710; Mon, 17 Nov 2025 13:49:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763387384; cv=none; b=SGOhcZMp90hTstzQ9PT6JpB21GRayv7Ri9nM+gMIhJp2K1RDZXHB+M17ajIyI4zjgv7bnn/dTXvHEEPhctj8iGXoJsksT3EmUDM4Lm0VtG68dJN8m0G1D0NTfeKNLe7J9MU5tWorXKKpolvfHzKWUAYjMT8m0KAbATG2P0kyJYI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763387384; c=relaxed/simple; bh=5NxpeFPem5dupZlDkmIECYWVmennFW8ehDMdfCoCnRY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=gSomRkgXzyJLKnqOfZd28Oi1lBvnPMFcFCNf4yJzBsiFLTJNXMDjGLYzr1wBDqks1UJUOLwRMb/gu/zu9UyfTBTsGdJL+XvM3mKHwkowJ+BFuf++H4fK8jGe3Agn2uYn3BMsvjD8TVntRn89T6iecUykMQWEpcwRDA3G6d5esHI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=DUARZsiJ; arc=none smtp.client-ip=198.175.65.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="DUARZsiJ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1763387382; x=1794923382; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5NxpeFPem5dupZlDkmIECYWVmennFW8ehDMdfCoCnRY=; b=DUARZsiJHbJAbE3aDQ/V6d50EToCnWliqn85H0W9dLHxYmC3PKbiBJox DjRGGGjFKjop4ElXIRdHvWKv/q2eTp4Ybabhw3t+RAwK3JqOQTc0z06gH qW+GsidcLgGkE3CPx3nT9I8mQfqyaFn3UbXRwy7WVH1lECMluqxA7aUMd a3LN0dw1pbdBBjPNlSdnZDxkqLEJ40sEHj1+Q0tPBtlANnlli+L8Krzr3 6sHLjMpMZlak4RNZj6FA255PNuWN9r3G1GcB9VD6n1zBPXv+ybMNfFaGT rzlAMVtMJS58vZuXDrAay4A4d7gLWuNxG883Z0lFdos1NEpGjA0ANGpBN g==; X-CSE-ConnectionGUID: eaKq/nggSKaPsgkqWymwUg== X-CSE-MsgGUID: rXwfAEwuQYKBb+Gptn//bg== X-IronPort-AV: E=McAfee;i="6800,10657,11616"; a="76846172" X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="76846172" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Nov 2025 05:49:41 -0800 X-CSE-ConnectionGUID: dmdgqO60S1qDlum9FZPHjA== X-CSE-MsgGUID: O7/sGkhOTymG03Ker6nccw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="190115737" Received: from irvmail002.ir.intel.com ([10.43.11.120]) by fmviesa007.fm.intel.com with ESMTP; 17 Nov 2025 05:49:36 -0800 Received: from mglak.igk.intel.com (mglak.igk.intel.com [10.237.112.146]) by irvmail002.ir.intel.com (Postfix) with ESMTP id 98E3837E3D; Mon, 17 Nov 2025 13:49:34 +0000 (GMT) From: Larysa Zaremba To: intel-wired-lan@lists.osuosl.org, Tony Nguyen Cc: aleksander.lobakin@intel.com, sridhar.samudrala@intel.com, "Singhai, Anjali" , Michal Swiatkowski , Larysa Zaremba , "Fijalkowski, Maciej" , Emil Tantilov , Madhu Chittim , Josh Hay , "Keller, Jacob E" , jayaprakash.shanmugam@intel.com, natalia.wochtman@intel.com, Jiri Pirko , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Simon Horman , Jonathan Corbet , Richard Cochran , Przemek Kitszel , Andrew Lunn , netdev@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH iwl-next v5 12/15] ixd: add basic driver framework for Intel(R) Control Plane Function Date: Mon, 17 Nov 2025 14:48:52 +0100 Message-ID: <20251117134912.18566-13-larysa.zaremba@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20251117134912.18566-1-larysa.zaremba@intel.com> References: <20251117134912.18566-1-larysa.zaremba@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add module register and probe functionality. Add the required support to register IXD PCI driver, as well as probe and remove call backs. Enable the PCI device and request the kernel to reserve the memory resources that will be used by the driver. Finally map the BAR0 address space. For now, use devm_alloc() to allocate adapter, as it requires the least amount of code. In a later commit, it will be replaced with a devlink alternative. Co-developed-by: Amritha Nambiar Signed-off-by: Amritha Nambiar Reviewed-by: Maciej Fijalkowski Signed-off-by: Larysa Zaremba --- .../device_drivers/ethernet/index.rst | 1 + .../device_drivers/ethernet/intel/ixd.rst | 39 ++++++ drivers/net/ethernet/intel/Kconfig | 2 + drivers/net/ethernet/intel/Makefile | 1 + drivers/net/ethernet/intel/ixd/Kconfig | 13 ++ drivers/net/ethernet/intel/ixd/Makefile | 8 ++ drivers/net/ethernet/intel/ixd/ixd.h | 28 +++++ drivers/net/ethernet/intel/ixd/ixd_lan_regs.h | 28 +++++ drivers/net/ethernet/intel/ixd/ixd_main.c | 112 ++++++++++++++++++ 9 files changed, 232 insertions(+) create mode 100644 Documentation/networking/device_drivers/ethernet/intel/= ixd.rst create mode 100644 drivers/net/ethernet/intel/ixd/Kconfig create mode 100644 drivers/net/ethernet/intel/ixd/Makefile create mode 100644 drivers/net/ethernet/intel/ixd/ixd.h create mode 100644 drivers/net/ethernet/intel/ixd/ixd_lan_regs.h create mode 100644 drivers/net/ethernet/intel/ixd/ixd_main.c diff --git a/Documentation/networking/device_drivers/ethernet/index.rst b/D= ocumentation/networking/device_drivers/ethernet/index.rst index bcc02355f828..b73d13a2f748 100644 --- a/Documentation/networking/device_drivers/ethernet/index.rst +++ b/Documentation/networking/device_drivers/ethernet/index.rst @@ -38,6 +38,7 @@ Contents: intel/igbvf intel/ixgbe intel/ixgbevf + intel/ixd intel/i40e intel/iavf intel/ice diff --git a/Documentation/networking/device_drivers/ethernet/intel/ixd.rst= b/Documentation/networking/device_drivers/ethernet/intel/ixd.rst new file mode 100644 index 000000000000..1387626e5d20 --- /dev/null +++ b/Documentation/networking/device_drivers/ethernet/intel/ixd.rst @@ -0,0 +1,39 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D +iXD Linux* Base Driver for the Intel(R) Control Plane Function +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +Intel iXD Linux driver. +Copyright(C) 2025 Intel Corporation. + +.. contents:: + +For questions related to hardware requirements, refer to the documentation +supplied with your Intel adapter. All hardware requirements listed apply t= o use +with Linux. + + +Identifying Your Adapter +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D +For information on how to identify your adapter, and for the latest Intel +network drivers, refer to the Intel Support website: +http://www.intel.com/support + + +Support +=3D=3D=3D=3D=3D=3D=3D +For general information, go to the Intel support website at: +http://www.intel.com/support/ + +If an issue is identified with the released source code on a supported ker= nel +with a supported adapter, email the specific information related to the is= sue +to intel-wired-lan@lists.osuosl.org. + + +Trademarks +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D +Intel is a trademark or registered trademark of Intel Corporation or its +subsidiaries in the United States and/or other countries. + +* Other names and brands may be claimed as the property of others. diff --git a/drivers/net/ethernet/intel/Kconfig b/drivers/net/ethernet/inte= l/Kconfig index 288fa8ce53af..780f113986ea 100644 --- a/drivers/net/ethernet/intel/Kconfig +++ b/drivers/net/ethernet/intel/Kconfig @@ -398,4 +398,6 @@ config IGC_LEDS =20 source "drivers/net/ethernet/intel/idpf/Kconfig" =20 +source "drivers/net/ethernet/intel/ixd/Kconfig" + endif # NET_VENDOR_INTEL diff --git a/drivers/net/ethernet/intel/Makefile b/drivers/net/ethernet/int= el/Makefile index 9a37dc76aef0..08b29f3b6801 100644 --- a/drivers/net/ethernet/intel/Makefile +++ b/drivers/net/ethernet/intel/Makefile @@ -19,3 +19,4 @@ obj-$(CONFIG_IAVF) +=3D iavf/ obj-$(CONFIG_FM10K) +=3D fm10k/ obj-$(CONFIG_ICE) +=3D ice/ obj-$(CONFIG_IDPF) +=3D idpf/ +obj-$(CONFIG_IXD) +=3D ixd/ diff --git a/drivers/net/ethernet/intel/ixd/Kconfig b/drivers/net/ethernet/= intel/ixd/Kconfig new file mode 100644 index 000000000000..f5594efe292c --- /dev/null +++ b/drivers/net/ethernet/intel/ixd/Kconfig @@ -0,0 +1,13 @@ +# SPDX-License-Identifier: GPL-2.0-only +# Copyright (C) 2025 Intel Corporation + +config IXD + tristate "Intel(R) Control Plane Function Support" + depends on PCI_MSI + select LIBETH + select LIBIE_PCI + help + This driver supports Intel(R) Control Plane PCI Function + of Intel E2100 and later IPUs and FNICs. + It facilitates a centralized control over multiple IDPF PFs/VFs/SFs + exposed by the same card. diff --git a/drivers/net/ethernet/intel/ixd/Makefile b/drivers/net/ethernet= /intel/ixd/Makefile new file mode 100644 index 000000000000..3849bc240600 --- /dev/null +++ b/drivers/net/ethernet/intel/ixd/Makefile @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0-only +# Copyright (C) 2025 Intel Corporation + +# Intel(R) Control Plane Function Linux Driver + +obj-$(CONFIG_IXD) +=3D ixd.o + +ixd-y :=3D ixd_main.o diff --git a/drivers/net/ethernet/intel/ixd/ixd.h b/drivers/net/ethernet/in= tel/ixd/ixd.h new file mode 100644 index 000000000000..d813c27941a5 --- /dev/null +++ b/drivers/net/ethernet/intel/ixd/ixd.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2025 Intel Corporation */ + +#ifndef _IXD_H_ +#define _IXD_H_ + +#include + +/** + * struct ixd_adapter - Data structure representing a CPF + * @hw: Device access data + */ +struct ixd_adapter { + struct libie_mmio_info hw; +}; + +/** + * ixd_to_dev - Get the corresponding device struct from an adapter + * @adapter: PCI device driver-specific private data + * + * Return: struct device corresponding to the given adapter + */ +static inline struct device *ixd_to_dev(struct ixd_adapter *adapter) +{ + return &adapter->hw.pdev->dev; +} + +#endif /* _IXD_H_ */ diff --git a/drivers/net/ethernet/intel/ixd/ixd_lan_regs.h b/drivers/net/et= hernet/intel/ixd/ixd_lan_regs.h new file mode 100644 index 000000000000..a991eaa8a2aa --- /dev/null +++ b/drivers/net/ethernet/intel/ixd/ixd_lan_regs.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2025 Intel Corporation */ + +#ifndef _IXD_LAN_REGS_H_ +#define _IXD_LAN_REGS_H_ + +/* Control Plane Function PCI ID */ +#define IXD_DEV_ID_CPF 0x1453 + +/* Control Queue (Mailbox) */ +#define PF_FW_MBX_REG_LEN 4096 +#define PF_FW_MBX 0x08400000 + +/* Reset registers */ +#define PFGEN_RTRIG_REG_LEN 2048 +#define PFGEN_RTRIG 0x08407000 /* Device resets */ + +/** + * struct ixd_bar_region - BAR region description + * @offset: BAR region offset + * @size: BAR region size + */ +struct ixd_bar_region { + resource_size_t offset; + resource_size_t size; +}; + +#endif /* _IXD_LAN_REGS_H_ */ diff --git a/drivers/net/ethernet/intel/ixd/ixd_main.c b/drivers/net/ethern= et/intel/ixd/ixd_main.c new file mode 100644 index 000000000000..75ee53152e61 --- /dev/null +++ b/drivers/net/ethernet/intel/ixd/ixd_main.c @@ -0,0 +1,112 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (C) 2025 Intel Corporation */ + +#include "ixd.h" +#include "ixd_lan_regs.h" + +MODULE_DESCRIPTION("Intel(R) Control Plane Function Device Driver"); +MODULE_IMPORT_NS("LIBIE_PCI"); +MODULE_LICENSE("GPL"); + +/** + * ixd_remove - remove a CPF PCI device + * @pdev: PCI device being removed + */ +static void ixd_remove(struct pci_dev *pdev) +{ + struct ixd_adapter *adapter =3D pci_get_drvdata(pdev); + + libie_pci_unmap_all_mmio_regions(&adapter->hw); +} + +/** + * ixd_shutdown - shut down a CPF PCI device + * @pdev: PCI device being shut down + */ +static void ixd_shutdown(struct pci_dev *pdev) +{ + ixd_remove(pdev); + + if (system_state =3D=3D SYSTEM_POWER_OFF) + pci_set_power_state(pdev, PCI_D3hot); +} + +/** + * ixd_iomap_regions - iomap PCI BARs + * @adapter: adapter to map memory regions for + * + * Returns: %0 on success, negative on failure + */ +static int ixd_iomap_regions(struct ixd_adapter *adapter) +{ + const struct ixd_bar_region regions[] =3D { + { + .offset =3D PFGEN_RTRIG, + .size =3D PFGEN_RTRIG_REG_LEN, + }, + { + .offset =3D PF_FW_MBX, + .size =3D PF_FW_MBX_REG_LEN, + }, + }; + + for (int i =3D 0; i < ARRAY_SIZE(regions); i++) { + struct libie_mmio_info *mmio_info =3D &adapter->hw; + bool map_ok; + + map_ok =3D libie_pci_map_mmio_region(mmio_info, + regions[i].offset, + regions[i].size); + if (!map_ok) { + dev_err(ixd_to_dev(adapter), + "Failed to map PCI device MMIO region\n"); + + libie_pci_unmap_all_mmio_regions(mmio_info); + return -EIO; + } + } + + return 0; +} + +/** + * ixd_probe - probe a CPF PCI device + * @pdev: corresponding PCI device + * @ent: entry in ixd_pci_tbl + * + * Returns: %0 on success, negative errno code on failure + */ +static int ixd_probe(struct pci_dev *pdev, const struct pci_device_id *ent) +{ + struct ixd_adapter *adapter; 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a="76846195" X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="76846195" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Nov 2025 05:49:44 -0800 X-CSE-ConnectionGUID: 0TDJOshGS+O7Uc45j0xqgA== X-CSE-MsgGUID: soAGFZ9iROiTaJXF1vBwWQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="190115774" Received: from irvmail002.ir.intel.com ([10.43.11.120]) by fmviesa007.fm.intel.com with ESMTP; 17 Nov 2025 05:49:38 -0800 Received: from mglak.igk.intel.com (mglak.igk.intel.com [10.237.112.146]) by irvmail002.ir.intel.com (Postfix) with ESMTP id 4F25337E3A; Mon, 17 Nov 2025 13:49:36 +0000 (GMT) From: Larysa Zaremba To: intel-wired-lan@lists.osuosl.org, Tony Nguyen Cc: aleksander.lobakin@intel.com, sridhar.samudrala@intel.com, "Singhai, Anjali" , Michal Swiatkowski , Larysa Zaremba , "Fijalkowski, Maciej" , Emil Tantilov , Madhu Chittim , Josh Hay , "Keller, Jacob E" , jayaprakash.shanmugam@intel.com, natalia.wochtman@intel.com, Jiri Pirko , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Simon Horman , Jonathan Corbet , Richard Cochran , Przemek Kitszel , Andrew Lunn , netdev@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH iwl-next v5 13/15] ixd: add reset checks and initialize the mailbox Date: Mon, 17 Nov 2025 14:48:53 +0100 Message-ID: <20251117134912.18566-14-larysa.zaremba@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20251117134912.18566-1-larysa.zaremba@intel.com> References: <20251117134912.18566-1-larysa.zaremba@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" At the end of the probe, trigger hard reset, initialize and schedule the after-reset task. If the reset is complete in a pre-determined time, initialize the default mailbox, through which other resources will be negotiated. Co-developed-by: Amritha Nambiar Signed-off-by: Amritha Nambiar Reviewed-by: Maciej Fijalkowski Signed-off-by: Larysa Zaremba --- drivers/net/ethernet/intel/ixd/Kconfig | 1 + drivers/net/ethernet/intel/ixd/Makefile | 2 + drivers/net/ethernet/intel/ixd/ixd.h | 28 +++- drivers/net/ethernet/intel/ixd/ixd_dev.c | 89 +++++++++++ drivers/net/ethernet/intel/ixd/ixd_lan_regs.h | 40 +++++ drivers/net/ethernet/intel/ixd/ixd_lib.c | 143 ++++++++++++++++++ drivers/net/ethernet/intel/ixd/ixd_main.c | 32 +++- 7 files changed, 326 insertions(+), 9 deletions(-) create mode 100644 drivers/net/ethernet/intel/ixd/ixd_dev.c create mode 100644 drivers/net/ethernet/intel/ixd/ixd_lib.c diff --git a/drivers/net/ethernet/intel/ixd/Kconfig b/drivers/net/ethernet/= intel/ixd/Kconfig index f5594efe292c..24510c50070e 100644 --- a/drivers/net/ethernet/intel/ixd/Kconfig +++ b/drivers/net/ethernet/intel/ixd/Kconfig @@ -5,6 +5,7 @@ config IXD tristate "Intel(R) Control Plane Function Support" depends on PCI_MSI select LIBETH + select LIBIE_CP select LIBIE_PCI help This driver supports Intel(R) Control Plane PCI Function diff --git a/drivers/net/ethernet/intel/ixd/Makefile b/drivers/net/ethernet= /intel/ixd/Makefile index 3849bc240600..164b2c86952f 100644 --- a/drivers/net/ethernet/intel/ixd/Makefile +++ b/drivers/net/ethernet/intel/ixd/Makefile @@ -6,3 +6,5 @@ obj-$(CONFIG_IXD) +=3D ixd.o =20 ixd-y :=3D ixd_main.o +ixd-y +=3D ixd_dev.o +ixd-y +=3D ixd_lib.o diff --git a/drivers/net/ethernet/intel/ixd/ixd.h b/drivers/net/ethernet/in= tel/ixd/ixd.h index d813c27941a5..99c44f2aa659 100644 --- a/drivers/net/ethernet/intel/ixd/ixd.h +++ b/drivers/net/ethernet/intel/ixd/ixd.h @@ -4,14 +4,25 @@ #ifndef _IXD_H_ #define _IXD_H_ =20 -#include +#include =20 /** * struct ixd_adapter - Data structure representing a CPF - * @hw: Device access data + * @cp_ctx: Control plane communication context + * @init_task: Delayed initialization after reset + * @xnm: virtchnl transaction manager + * @asq: Send control queue info + * @arq: Receive control queue info */ struct ixd_adapter { - struct libie_mmio_info hw; + struct libie_ctlq_ctx cp_ctx; + struct { + struct delayed_work init_work; + u8 reset_retries; + } init_task; + struct libie_ctlq_xn_manager *xnm; + struct libie_ctlq_info *asq; + struct libie_ctlq_info *arq; }; =20 /** @@ -22,7 +33,16 @@ struct ixd_adapter { */ static inline struct device *ixd_to_dev(struct ixd_adapter *adapter) { - return &adapter->hw.pdev->dev; + return &adapter->cp_ctx.mmio_info.pdev->dev; } =20 +void ixd_ctlq_reg_init(struct ixd_adapter *adapter, + struct libie_ctlq_reg *ctlq_reg_tx, + struct libie_ctlq_reg *ctlq_reg_rx); +void ixd_trigger_reset(struct ixd_adapter *adapter); +bool ixd_check_reset_complete(struct ixd_adapter *adapter); +void ixd_init_task(struct work_struct *work); +int ixd_init_dflt_mbx(struct ixd_adapter *adapter); +void ixd_deinit_dflt_mbx(struct ixd_adapter *adapter); + #endif /* _IXD_H_ */ diff --git a/drivers/net/ethernet/intel/ixd/ixd_dev.c b/drivers/net/etherne= t/intel/ixd/ixd_dev.c new file mode 100644 index 000000000000..6c41a820eecc --- /dev/null +++ b/drivers/net/ethernet/intel/ixd/ixd_dev.c @@ -0,0 +1,89 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (C) 2025 Intel Corporation */ + +#include "ixd.h" +#include "ixd_lan_regs.h" + +/** + * ixd_ctlq_reg_init - Initialize default mailbox registers + * @adapter: PCI device driver-specific private data + * @ctlq_reg_tx: Transmit queue registers info to be filled + * @ctlq_reg_rx: Receive queue registers info to be filled + */ +void ixd_ctlq_reg_init(struct ixd_adapter *adapter, + struct libie_ctlq_reg *ctlq_reg_tx, + struct libie_ctlq_reg *ctlq_reg_rx) +{ + struct libie_mmio_info *mmio_info =3D &adapter->cp_ctx.mmio_info; + *ctlq_reg_tx =3D (struct libie_ctlq_reg) { + .head =3D libie_pci_get_mmio_addr(mmio_info, PF_FW_ATQH), + .tail =3D libie_pci_get_mmio_addr(mmio_info, PF_FW_ATQT), + .len =3D libie_pci_get_mmio_addr(mmio_info, PF_FW_ATQLEN), + .addr_high =3D libie_pci_get_mmio_addr(mmio_info, PF_FW_ATQBAH), + .addr_low =3D libie_pci_get_mmio_addr(mmio_info, PF_FW_ATQBAL), + .len_mask =3D PF_FW_ATQLEN_ATQLEN_M, + .len_ena_mask =3D PF_FW_ATQLEN_ATQENABLE_M, + .head_mask =3D PF_FW_ATQH_ATQH_M, + }; + + *ctlq_reg_rx =3D (struct libie_ctlq_reg) { + .head =3D libie_pci_get_mmio_addr(mmio_info, PF_FW_ARQH), + .tail =3D libie_pci_get_mmio_addr(mmio_info, PF_FW_ARQT), + .len =3D libie_pci_get_mmio_addr(mmio_info, PF_FW_ARQLEN), + .addr_high =3D libie_pci_get_mmio_addr(mmio_info, PF_FW_ARQBAH), + .addr_low =3D libie_pci_get_mmio_addr(mmio_info, PF_FW_ARQBAL), + .len_mask =3D PF_FW_ARQLEN_ARQLEN_M, + .len_ena_mask =3D PF_FW_ARQLEN_ARQENABLE_M, + .head_mask =3D PF_FW_ARQH_ARQH_M, + }; +} + +static const struct ixd_reset_reg ixd_reset_reg =3D { + .rstat =3D PFGEN_RSTAT, + .rstat_m =3D PFGEN_RSTAT_PFR_STATE_M, + .rstat_ok_v =3D 0b01, + .rtrigger =3D PFGEN_CTRL, + .rtrigger_m =3D PFGEN_CTRL_PFSWR, +}; + +/** + * ixd_trigger_reset - Trigger PFR reset + * @adapter: the device with mapped reset register + */ +void ixd_trigger_reset(struct ixd_adapter *adapter) +{ + void __iomem *addr; + u32 reg_val; + + addr =3D libie_pci_get_mmio_addr(&adapter->cp_ctx.mmio_info, + ixd_reset_reg.rtrigger); + reg_val =3D readl(addr); + writel(reg_val | ixd_reset_reg.rtrigger_m, addr); +} + +/** + * ixd_check_reset_complete - Check if the PFR reset is completed + * @adapter: CPF being reset + * + * Return: %true if the register read indicates reset has been finished, + * %false otherwise + */ +bool ixd_check_reset_complete(struct ixd_adapter *adapter) +{ + u32 reg_val, reset_status; + void __iomem *addr; + + addr =3D libie_pci_get_mmio_addr(&adapter->cp_ctx.mmio_info, + ixd_reset_reg.rstat); + reg_val =3D readl(addr); + reset_status =3D reg_val & ixd_reset_reg.rstat_m; + + /* 0xFFFFFFFF might be read if the other side hasn't cleared + * the register for us yet. + */ + if (reg_val !=3D 0xFFFFFFFF && + reset_status =3D=3D ixd_reset_reg.rstat_ok_v) + return true; + + return false; +} diff --git a/drivers/net/ethernet/intel/ixd/ixd_lan_regs.h b/drivers/net/et= hernet/intel/ixd/ixd_lan_regs.h index a991eaa8a2aa..26b1e3cfcf20 100644 --- a/drivers/net/ethernet/intel/ixd/ixd_lan_regs.h +++ b/drivers/net/ethernet/intel/ixd/ixd_lan_regs.h @@ -11,9 +11,33 @@ #define PF_FW_MBX_REG_LEN 4096 #define PF_FW_MBX 0x08400000 =20 +#define PF_FW_ARQBAL (PF_FW_MBX) +#define PF_FW_ARQBAH (PF_FW_MBX + 0x4) +#define PF_FW_ARQLEN (PF_FW_MBX + 0x8) +#define PF_FW_ARQLEN_ARQLEN_M GENMASK(12, 0) +#define PF_FW_ARQLEN_ARQENABLE_S 31 +#define PF_FW_ARQLEN_ARQENABLE_M BIT(PF_FW_ARQLEN_ARQENABLE_S) +#define PF_FW_ARQH_ARQH_M GENMASK(12, 0) +#define PF_FW_ARQH (PF_FW_MBX + 0xC) +#define PF_FW_ARQT (PF_FW_MBX + 0x10) + +#define PF_FW_ATQBAL (PF_FW_MBX + 0x14) +#define PF_FW_ATQBAH (PF_FW_MBX + 0x18) +#define PF_FW_ATQLEN (PF_FW_MBX + 0x1C) +#define PF_FW_ATQLEN_ATQLEN_M GENMASK(9, 0) +#define PF_FW_ATQLEN_ATQENABLE_S 31 +#define PF_FW_ATQLEN_ATQENABLE_M BIT(PF_FW_ATQLEN_ATQENABLE_S) +#define PF_FW_ATQH_ATQH_M GENMASK(9, 0) +#define PF_FW_ATQH (PF_FW_MBX + 0x20) +#define PF_FW_ATQT (PF_FW_MBX + 0x24) + /* Reset registers */ #define PFGEN_RTRIG_REG_LEN 2048 #define PFGEN_RTRIG 0x08407000 /* Device resets */ +#define PFGEN_RSTAT 0x08407008 /* PFR status */ +#define PFGEN_RSTAT_PFR_STATE_M GENMASK(1, 0) +#define PFGEN_CTRL 0x0840700C /* PFR trigger */ +#define PFGEN_CTRL_PFSWR BIT(0) =20 /** * struct ixd_bar_region - BAR region description @@ -25,4 +49,20 @@ struct ixd_bar_region { resource_size_t size; }; =20 +/** + * struct ixd_reset_reg - structure for reset registers + * @rstat: offset of status in register + * @rstat_m: status mask + * @rstat_ok_v: value that indicates PFR completed status + * @rtrigger: offset of reset trigger in register + * @rtrigger_m: reset trigger mask + */ +struct ixd_reset_reg { + u32 rstat; + u32 rstat_m; + u32 rstat_ok_v; + u32 rtrigger; + u32 rtrigger_m; +}; + #endif /* _IXD_LAN_REGS_H_ */ diff --git a/drivers/net/ethernet/intel/ixd/ixd_lib.c b/drivers/net/etherne= t/intel/ixd/ixd_lib.c new file mode 100644 index 000000000000..b8dd5c4de7b2 --- /dev/null +++ b/drivers/net/ethernet/intel/ixd/ixd_lib.c @@ -0,0 +1,143 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (C) 2025 Intel Corporation */ + +#include "ixd.h" + +#define IXD_DFLT_MBX_Q_LEN 64 + +/** + * ixd_init_ctlq_create_info - Initialize control queue info for creation + * @info: destination + * @type: type of the queue to create + * @ctlq_reg: register assigned to the control queue + */ +static void ixd_init_ctlq_create_info(struct libie_ctlq_create_info *info, + enum virtchnl2_queue_type type, + const struct libie_ctlq_reg *ctlq_reg) +{ + *info =3D (struct libie_ctlq_create_info) { + .type =3D type, + .id =3D -1, + .reg =3D *ctlq_reg, + .len =3D IXD_DFLT_MBX_Q_LEN, + }; +} + +/** + * ixd_init_libie_xn_params - Initialize xn transaction manager creation i= nfo + * @params: destination + * @adapter: adapter info struct + * @ctlqs: list of the managed queues to create + * @num_queues: length of the queue list + */ +static void ixd_init_libie_xn_params(struct libie_ctlq_xn_init_params *par= ams, + struct ixd_adapter *adapter, + struct libie_ctlq_create_info *ctlqs, + uint num_queues) +{ + *params =3D (struct libie_ctlq_xn_init_params){ + .cctlq_info =3D ctlqs, + .ctx =3D &adapter->cp_ctx, + .num_qs =3D num_queues, + }; +} + +/** + * ixd_adapter_fill_dflt_ctlqs - Find default control queues and store them + * @adapter: adapter info struct + */ +static void ixd_adapter_fill_dflt_ctlqs(struct ixd_adapter *adapter) +{ + guard(spinlock)(&adapter->cp_ctx.ctlqs_lock); + struct libie_ctlq_info *cq; + + list_for_each_entry(cq, &adapter->cp_ctx.ctlqs, list) { + if (cq->qid !=3D -1) + continue; + if (cq->type =3D=3D VIRTCHNL2_QUEUE_TYPE_RX) + adapter->arq =3D cq; + else if (cq->type =3D=3D VIRTCHNL2_QUEUE_TYPE_TX) + adapter->asq =3D cq; + } +} + +/** + * ixd_init_dflt_mbx - Setup default mailbox parameters and make request + * @adapter: adapter info struct + * + * Return: %0 on success, negative errno code on failure + */ +int ixd_init_dflt_mbx(struct ixd_adapter *adapter) +{ + struct libie_ctlq_create_info ctlqs_info[2]; + struct libie_ctlq_xn_init_params xn_params; + struct libie_ctlq_reg ctlq_reg_tx; + struct libie_ctlq_reg ctlq_reg_rx; + int err; + + ixd_ctlq_reg_init(adapter, &ctlq_reg_tx, &ctlq_reg_rx); + ixd_init_ctlq_create_info(&ctlqs_info[0], VIRTCHNL2_QUEUE_TYPE_TX, + &ctlq_reg_tx); + ixd_init_ctlq_create_info(&ctlqs_info[1], VIRTCHNL2_QUEUE_TYPE_RX, + &ctlq_reg_rx); + ixd_init_libie_xn_params(&xn_params, adapter, ctlqs_info, + ARRAY_SIZE(ctlqs_info)); + err =3D libie_ctlq_xn_init(&xn_params); + if (err) + return err; + adapter->xnm =3D xn_params.xnm; + + ixd_adapter_fill_dflt_ctlqs(adapter); + + if (!adapter->asq || !adapter->arq) { + libie_ctlq_xn_deinit(adapter->xnm, &adapter->cp_ctx); + return -ENOENT; + } + + return 0; +} + +/** + * ixd_deinit_dflt_mbx - Deinitialize default mailbox + * @adapter: adapter info struct + */ +void ixd_deinit_dflt_mbx(struct ixd_adapter *adapter) +{ + if (adapter->arq || adapter->asq) + libie_ctlq_xn_deinit(adapter->xnm, &adapter->cp_ctx); + + adapter->arq =3D NULL; + adapter->asq =3D NULL; + adapter->xnm =3D NULL; +} + +/** + * ixd_init_task - Initialize after reset + * @work: init work struct + */ +void ixd_init_task(struct work_struct *work) +{ + struct ixd_adapter *adapter; + int err; + + adapter =3D container_of(work, struct ixd_adapter, + init_task.init_work.work); + + if (!ixd_check_reset_complete(adapter)) { + if (++adapter->init_task.reset_retries < 10) + queue_delayed_work(system_unbound_wq, + &adapter->init_task.init_work, + msecs_to_jiffies(500)); + else + dev_err(ixd_to_dev(adapter), + "Device reset failed. The driver was unable to contact the device's fi= rmware. Check that the FW is running.\n"); + return; + } + + adapter->init_task.reset_retries =3D 0; + err =3D ixd_init_dflt_mbx(adapter); + if (err) + dev_err(ixd_to_dev(adapter), + "Failed to initialize the default mailbox: %pe\n", + ERR_PTR(err)); +} diff --git a/drivers/net/ethernet/intel/ixd/ixd_main.c b/drivers/net/ethern= et/intel/ixd/ixd_main.c index 75ee53152e61..b4d4000b63ed 100644 --- a/drivers/net/ethernet/intel/ixd/ixd_main.c +++ b/drivers/net/ethernet/intel/ixd/ixd_main.c @@ -5,6 +5,7 @@ #include "ixd_lan_regs.h" =20 MODULE_DESCRIPTION("Intel(R) Control Plane Function Device Driver"); +MODULE_IMPORT_NS("LIBIE_CP"); MODULE_IMPORT_NS("LIBIE_PCI"); MODULE_LICENSE("GPL"); =20 @@ -16,7 +17,13 @@ static void ixd_remove(struct pci_dev *pdev) { struct ixd_adapter *adapter =3D pci_get_drvdata(pdev); =20 - libie_pci_unmap_all_mmio_regions(&adapter->hw); + /* Do not mix removal with (re)initialization */ + cancel_delayed_work_sync(&adapter->init_task.init_work); + /* Leave the device clean on exit */ + ixd_trigger_reset(adapter); + ixd_deinit_dflt_mbx(adapter); + + libie_pci_unmap_all_mmio_regions(&adapter->cp_ctx.mmio_info); } =20 /** @@ -51,7 +58,7 @@ static int ixd_iomap_regions(struct ixd_adapter *adapter) }; =20 for (int i =3D 0; i < ARRAY_SIZE(regions); i++) { - struct libie_mmio_info *mmio_info =3D &adapter->hw; + struct libie_mmio_info *mmio_info =3D &adapter->cp_ctx.mmio_info; bool map_ok; =20 map_ok =3D libie_pci_map_mmio_region(mmio_info, @@ -81,11 +88,15 @@ static int ixd_probe(struct pci_dev *pdev, const struct= pci_device_id *ent) struct ixd_adapter *adapter; int err; =20 + if (WARN_ON(ent->device !=3D IXD_DEV_ID_CPF)) + return -EINVAL; + adapter =3D devm_kzalloc(&pdev->dev, sizeof(*adapter), GFP_KERNEL); if (!adapter) return -ENOMEM; - adapter->hw.pdev =3D pdev; - INIT_LIST_HEAD(&adapter->hw.mmio_list); + + adapter->cp_ctx.mmio_info.pdev =3D pdev; + INIT_LIST_HEAD(&adapter->cp_ctx.mmio_info.mmio_list); =20 err =3D libie_pci_init_dev(pdev); if (err) @@ -93,7 +104,18 @@ static int ixd_probe(struct pci_dev *pdev, const struct= pci_device_id *ent) =20 pci_set_drvdata(pdev, adapter); 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d="scan'208";a="190115777" Received: from irvmail002.ir.intel.com ([10.43.11.120]) by fmviesa007.fm.intel.com with ESMTP; 17 Nov 2025 05:49:40 -0800 Received: from mglak.igk.intel.com (mglak.igk.intel.com [10.237.112.146]) by irvmail002.ir.intel.com (Postfix) with ESMTP id 11B4A37E3F; Mon, 17 Nov 2025 13:49:38 +0000 (GMT) From: Larysa Zaremba To: intel-wired-lan@lists.osuosl.org, Tony Nguyen Cc: aleksander.lobakin@intel.com, sridhar.samudrala@intel.com, "Singhai, Anjali" , Michal Swiatkowski , Larysa Zaremba , "Fijalkowski, Maciej" , Emil Tantilov , Madhu Chittim , Josh Hay , "Keller, Jacob E" , jayaprakash.shanmugam@intel.com, natalia.wochtman@intel.com, Jiri Pirko , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Simon Horman , Jonathan Corbet , Richard Cochran , Przemek Kitszel , Andrew Lunn , netdev@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH iwl-next v5 14/15] ixd: add the core initialization Date: Mon, 17 Nov 2025 14:48:54 +0100 Message-ID: <20251117134912.18566-15-larysa.zaremba@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20251117134912.18566-1-larysa.zaremba@intel.com> References: <20251117134912.18566-1-larysa.zaremba@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" As the mailbox is setup, initialize the core. This makes use of the send and receive mailbox message framework for virtchnl communication between the driver and device Control Plane (CP). To start with, driver confirms the virtchnl version with the CP. Once that is done, it requests and gets the required capabilities and resources needed such as max vectors, queues, vports etc. Use a unified way of handling the virtchnl messages, where a single function handles all related memory management and the caller only provides the callbacks to fill the send buffer and to handle the response. Place generic control queue message handling separately to facilitate the addition of protocols other than virtchannel in the future. Co-developed-by: Amritha Nambiar Signed-off-by: Amritha Nambiar Reviewed-by: Maciej Fijalkowski Signed-off-by: Larysa Zaremba --- drivers/net/ethernet/intel/ixd/Makefile | 2 + drivers/net/ethernet/intel/ixd/ixd.h | 10 + drivers/net/ethernet/intel/ixd/ixd_ctlq.c | 149 +++++++++++++++ drivers/net/ethernet/intel/ixd/ixd_ctlq.h | 33 ++++ drivers/net/ethernet/intel/ixd/ixd_lib.c | 25 ++- drivers/net/ethernet/intel/ixd/ixd_main.c | 3 + drivers/net/ethernet/intel/ixd/ixd_virtchnl.c | 178 ++++++++++++++++++ drivers/net/ethernet/intel/ixd/ixd_virtchnl.h | 12 ++ 8 files changed, 411 insertions(+), 1 deletion(-) create mode 100644 drivers/net/ethernet/intel/ixd/ixd_ctlq.c create mode 100644 drivers/net/ethernet/intel/ixd/ixd_ctlq.h create mode 100644 drivers/net/ethernet/intel/ixd/ixd_virtchnl.c create mode 100644 drivers/net/ethernet/intel/ixd/ixd_virtchnl.h diff --git a/drivers/net/ethernet/intel/ixd/Makefile b/drivers/net/ethernet= /intel/ixd/Makefile index 164b2c86952f..90abf231fb16 100644 --- a/drivers/net/ethernet/intel/ixd/Makefile +++ b/drivers/net/ethernet/intel/ixd/Makefile @@ -6,5 +6,7 @@ obj-$(CONFIG_IXD) +=3D ixd.o =20 ixd-y :=3D ixd_main.o +ixd-y +=3D ixd_ctlq.o ixd-y +=3D ixd_dev.o ixd-y +=3D ixd_lib.o +ixd-y +=3D ixd_virtchnl.o diff --git a/drivers/net/ethernet/intel/ixd/ixd.h b/drivers/net/ethernet/in= tel/ixd/ixd.h index 99c44f2aa659..98d1f22534b5 100644 --- a/drivers/net/ethernet/intel/ixd/ixd.h +++ b/drivers/net/ethernet/intel/ixd/ixd.h @@ -10,19 +10,29 @@ * struct ixd_adapter - Data structure representing a CPF * @cp_ctx: Control plane communication context * @init_task: Delayed initialization after reset + * @mbx_task: Control queue Rx handling * @xnm: virtchnl transaction manager * @asq: Send control queue info * @arq: Receive control queue info + * @vc_ver: Negotiated virtchnl version + * @caps: Negotiated virtchnl capabilities */ struct ixd_adapter { struct libie_ctlq_ctx cp_ctx; struct { struct delayed_work init_work; u8 reset_retries; + u8 vc_retries; } init_task; + struct delayed_work mbx_task; struct libie_ctlq_xn_manager *xnm; struct libie_ctlq_info *asq; struct libie_ctlq_info *arq; + struct { + u32 major; + u32 minor; + } vc_ver; + struct virtchnl2_get_capabilities caps; }; =20 /** diff --git a/drivers/net/ethernet/intel/ixd/ixd_ctlq.c b/drivers/net/ethern= et/intel/ixd/ixd_ctlq.c new file mode 100644 index 000000000000..c6ec5d6c291b --- /dev/null +++ b/drivers/net/ethernet/intel/ixd/ixd_ctlq.c @@ -0,0 +1,149 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (C) 2025 Intel Corporation */ + +#include "ixd.h" +#include "ixd_ctlq.h" +#include "ixd_virtchnl.h" + +/** + * ixd_ctlq_clean_sq - Clean the send control queue after sending the mess= age + * @adapter: The adapter that sent the messages + * @num_sent: Number of sent messages to be released + * + * Free the libie send resources after sending the message and handling + * the response. + */ +static void ixd_ctlq_clean_sq(struct ixd_adapter *adapter, u16 num_sent) +{ + if (!num_sent) + return; + + struct libie_ctlq_xn_clean_params params =3D { + .ctlq =3D adapter->asq, + .ctx =3D &adapter->cp_ctx, + .num_msgs =3D num_sent, + .rel_tx_buf =3D kfree, + }; + + libie_ctlq_xn_send_clean(¶ms); +} + +/** + * ixd_ctlq_init_sparams - Initialize control queue send parameters + * @adapter: The adapter with initialized mailbox + * @sparams: Parameters to initialize + * @msg_buf: DMA-mappable pointer to the message being sent + * @msg_size: Message size + */ +static void ixd_ctlq_init_sparams(struct ixd_adapter *adapter, + struct libie_ctlq_xn_send_params *sparams, + void *msg_buf, size_t msg_size) +{ + *sparams =3D (struct libie_ctlq_xn_send_params) { + .rel_tx_buf =3D kfree, + .xnm =3D adapter->xnm, + .ctlq =3D adapter->asq, + .timeout_ms =3D IXD_CTLQ_TIMEOUT, + .send_buf =3D (struct kvec) { + .iov_base =3D msg_buf, + .iov_len =3D msg_size, + }, + }; +} + +/** + * ixd_ctlq_do_req - Perform a standard virtchnl request + * @adapter: The adapter with initialized mailbox + * @req: virtchnl request description + * + * Return: %0 if a message was sent and received a response + * that was successfully handled by the custom callback, + * negative error otherwise. + */ +int ixd_ctlq_do_req(struct ixd_adapter *adapter, const struct ixd_ctlq_req= *req) +{ + struct libie_ctlq_xn_send_params send_params =3D {}; + u8 onstack_send_buff[LIBIE_CP_TX_COPYBREAK]; + struct kvec *recv_mem; + void *send_buff; + int err; + + send_buff =3D libie_cp_can_send_onstack(req->send_size) ? + &onstack_send_buff : kzalloc(req->send_size, GFP_KERNEL); + if (!send_buff) + return -ENOMEM; + + ixd_ctlq_init_sparams(adapter, &send_params, send_buff, + req->send_size); + + send_params.chnl_opcode =3D req->opcode; + + if (req->send_buff_init) + req->send_buff_init(adapter, send_buff, req->ctx); + + err =3D libie_ctlq_xn_send(&send_params); + if (err) + return err; + + recv_mem =3D &send_params.recv_mem; + if (req->recv_process) + err =3D req->recv_process(adapter, recv_mem->iov_base, + recv_mem->iov_len, req->ctx); + + ixd_ctlq_clean_sq(adapter, 1); + libie_ctlq_release_rx_buf(recv_mem); + + return err; +} + +/** + * ixd_ctlq_handle_msg - Default control queue message handler + * @ctx: Control plane communication context + * @msg: Message received + */ +static void ixd_ctlq_handle_msg(struct libie_ctlq_ctx *ctx, + struct libie_ctlq_msg *msg) +{ + struct ixd_adapter *adapter =3D pci_get_drvdata(ctx->mmio_info.pdev); + + if (ixd_vc_can_handle_msg(msg)) + ixd_vc_recv_event_msg(adapter, msg); + else + dev_dbg_ratelimited(ixd_to_dev(adapter), + "Received an unsupported opcode 0x%x from the CP\n", + msg->chnl_opcode); + + libie_ctlq_release_rx_buf(&msg->recv_mem); +} + +/** + * ixd_ctlq_recv_mb_msg - Receive a potential message over mailbox periodi= cally + * @adapter: The adapter with initialized mailbox + */ +static void ixd_ctlq_recv_mb_msg(struct ixd_adapter *adapter) +{ + struct libie_ctlq_xn_recv_params xn_params =3D { + .xnm =3D adapter->xnm, + .ctlq =3D adapter->arq, + .ctlq_msg_handler =3D ixd_ctlq_handle_msg, + .budget =3D LIBIE_CTLQ_MAX_XN_ENTRIES, + }; + + libie_ctlq_xn_recv(&xn_params); +} + +/** + * ixd_ctlq_rx_task - Periodically check for mailbox responses and events + * @work: work handle + */ +void ixd_ctlq_rx_task(struct work_struct *work) +{ + struct ixd_adapter *adapter; + + adapter =3D container_of(work, struct ixd_adapter, mbx_task.work); + + queue_delayed_work(system_unbound_wq, &adapter->mbx_task, + msecs_to_jiffies(300)); + + ixd_ctlq_recv_mb_msg(adapter); +} diff --git a/drivers/net/ethernet/intel/ixd/ixd_ctlq.h b/drivers/net/ethern= et/intel/ixd/ixd_ctlq.h new file mode 100644 index 000000000000..f450a3a0828f --- /dev/null +++ b/drivers/net/ethernet/intel/ixd/ixd_ctlq.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2025 Intel Corporation */ + +#ifndef _IXD_CTLQ_H_ +#define _IXD_CTLQ_H_ + +#include "linux/intel/virtchnl2.h" + +#define IXD_CTLQ_TIMEOUT 2000 + +/** + * struct ixd_ctlq_req - Standard virtchnl request description + * @opcode: protocol opcode, only virtchnl2 is needed for now + * @send_size: required length of the send buffer + * @send_buff_init: function to initialize the allocated send buffer + * @recv_process: function to handle the CP response + * @ctx: additional context for callbacks + */ +struct ixd_ctlq_req { + enum virtchnl2_op opcode; + size_t send_size; + void (*send_buff_init)(struct ixd_adapter *adapter, void *send_buff, + void *ctx); + int (*recv_process)(struct ixd_adapter *adapter, void *recv_buff, + size_t recv_size, void *ctx); + void *ctx; +}; + +int ixd_ctlq_do_req(struct ixd_adapter *adapter, + const struct ixd_ctlq_req *req); +void ixd_ctlq_rx_task(struct work_struct *work); + +#endif /* _IXD_CTLQ_H_ */ diff --git a/drivers/net/ethernet/intel/ixd/ixd_lib.c b/drivers/net/etherne= t/intel/ixd/ixd_lib.c index b8dd5c4de7b2..34ba987866b1 100644 --- a/drivers/net/ethernet/intel/ixd/ixd_lib.c +++ b/drivers/net/ethernet/intel/ixd/ixd_lib.c @@ -2,6 +2,7 @@ /* Copyright (C) 2025 Intel Corporation */ =20 #include "ixd.h" +#include "ixd_virtchnl.h" =20 #define IXD_DFLT_MBX_Q_LEN 64 =20 @@ -94,6 +95,8 @@ int ixd_init_dflt_mbx(struct ixd_adapter *adapter) return -ENOENT; } =20 + queue_delayed_work(system_unbound_wq, &adapter->mbx_task, 0); + return 0; } =20 @@ -103,6 +106,8 @@ int ixd_init_dflt_mbx(struct ixd_adapter *adapter) */ void ixd_deinit_dflt_mbx(struct ixd_adapter *adapter) { + cancel_delayed_work_sync(&adapter->mbx_task); + if (adapter->arq || adapter->asq) libie_ctlq_xn_deinit(adapter->xnm, &adapter->cp_ctx); =20 @@ -136,8 +141,26 @@ void ixd_init_task(struct work_struct *work) =20 adapter->init_task.reset_retries =3D 0; err =3D ixd_init_dflt_mbx(adapter); - if (err) + if (err) { dev_err(ixd_to_dev(adapter), "Failed to initialize the default mailbox: %pe\n", ERR_PTR(err)); + return; + } + + if (!ixd_vc_dev_init(adapter)) { + adapter->init_task.vc_retries =3D 0; + return; + } + + ixd_deinit_dflt_mbx(adapter); + if (++adapter->init_task.vc_retries > 5) { + dev_err(ixd_to_dev(adapter), + "Failed to establish mailbox communications with the hardware\n"); + return; + } + + ixd_trigger_reset(adapter); + queue_delayed_work(system_unbound_wq, &adapter->init_task.init_work, + msecs_to_jiffies(500)); } diff --git a/drivers/net/ethernet/intel/ixd/ixd_main.c b/drivers/net/ethern= et/intel/ixd/ixd_main.c index b4d4000b63ed..6d5e6aca77df 100644 --- a/drivers/net/ethernet/intel/ixd/ixd_main.c +++ b/drivers/net/ethernet/intel/ixd/ixd_main.c @@ -2,6 +2,7 @@ /* Copyright (C) 2025 Intel Corporation */ =20 #include "ixd.h" +#include "ixd_ctlq.h" #include "ixd_lan_regs.h" =20 MODULE_DESCRIPTION("Intel(R) Control Plane Function Device Driver"); @@ -19,6 +20,7 @@ static void ixd_remove(struct pci_dev *pdev) =20 /* Do not mix removal with (re)initialization */ cancel_delayed_work_sync(&adapter->init_task.init_work); + /* Leave the device clean on exit */ ixd_trigger_reset(adapter); ixd_deinit_dflt_mbx(adapter); @@ -110,6 +112,7 @@ static int ixd_probe(struct pci_dev *pdev, const struct= pci_device_id *ent) =20 INIT_DELAYED_WORK(&adapter->init_task.init_work, ixd_init_task); + INIT_DELAYED_WORK(&adapter->mbx_task, ixd_ctlq_rx_task); =20 ixd_trigger_reset(adapter); queue_delayed_work(system_unbound_wq, &adapter->init_task.init_work, diff --git a/drivers/net/ethernet/intel/ixd/ixd_virtchnl.c b/drivers/net/et= hernet/intel/ixd/ixd_virtchnl.c new file mode 100644 index 000000000000..66049d1b1d15 --- /dev/null +++ b/drivers/net/ethernet/intel/ixd/ixd_virtchnl.c @@ -0,0 +1,178 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* Copyright (C) 2025 Intel Corporation */ + +#include "ixd.h" +#include "ixd_ctlq.h" +#include "ixd_virtchnl.h" + +/** + * ixd_vc_recv_event_msg - Handle virtchnl event message + * @adapter: The adapter handling the message + * @ctlq_msg: Message received + */ +void ixd_vc_recv_event_msg(struct ixd_adapter *adapter, + struct libie_ctlq_msg *ctlq_msg) +{ + int payload_size =3D ctlq_msg->data_len; + struct virtchnl2_event *v2e; + + if (payload_size < sizeof(*v2e)) { + dev_warn_ratelimited(ixd_to_dev(adapter), + "Failed to receive valid payload for event msg (op 0x%X len %u)\n= ", + ctlq_msg->chnl_opcode, + payload_size); + return; + } + + v2e =3D (struct virtchnl2_event *)ctlq_msg->recv_mem.iov_base; + + dev_dbg(ixd_to_dev(adapter), "Got event 0x%X from the CP\n", + le32_to_cpu(v2e->event)); +} + +/** + * ixd_vc_can_handle_msg - Decide if an event has to be handled by virtchn= l code + * @ctlq_msg: Message received + * + * Return: %true if virtchnl code can handle the event, %false otherwise + */ +bool ixd_vc_can_handle_msg(struct libie_ctlq_msg *ctlq_msg) +{ + return ctlq_msg->chnl_opcode =3D=3D VIRTCHNL2_OP_EVENT; +} + +/** + * ixd_handle_caps - Handle VIRTCHNL2_OP_GET_CAPS response + * @adapter: The adapter for which the capabilities are being updated + * @recv_buff: Buffer containing the response + * @recv_size: Response buffer size + * @ctx: unused + * + * Return: %0 if the response format is correct and was handled as expecte= d, + * negative error otherwise. + */ +static int ixd_handle_caps(struct ixd_adapter *adapter, void *recv_buff, + size_t recv_size, void *ctx) +{ + if (recv_size < sizeof(adapter->caps)) + return -EBADMSG; + + adapter->caps =3D *(typeof(adapter->caps) *)recv_buff; + + return 0; +} + +/** + * ixd_req_vc_caps - Request and save device capability + * @adapter: The adapter to get the capabilities for + * + * Return: success or error if sending the get capability message fails + */ +static int ixd_req_vc_caps(struct ixd_adapter *adapter) +{ + const struct ixd_ctlq_req req =3D { + .opcode =3D VIRTCHNL2_OP_GET_CAPS, + .send_size =3D sizeof(struct virtchnl2_get_capabilities), + .ctx =3D NULL, + .send_buff_init =3D NULL, + .recv_process =3D ixd_handle_caps, + }; + + return ixd_ctlq_do_req(adapter, &req); +} + +/** + * ixd_get_vc_ver - Get version info from adapter + * + * Return: filled in virtchannel2 version info, ready for sending + */ +static struct virtchnl2_version_info ixd_get_vc_ver(void) +{ + return (struct virtchnl2_version_info) { + .major =3D cpu_to_le32(VIRTCHNL2_VERSION_MAJOR_2), + .minor =3D cpu_to_le32(VIRTCHNL2_VERSION_MINOR_0), + }; +} + +static void ixd_fill_vc_ver(struct ixd_adapter *adapter, void *send_buff, + void *ctx) +{ + *(struct virtchnl2_version_info *)send_buff =3D ixd_get_vc_ver(); +} + +/** + * ixd_handle_vc_ver - Handle VIRTCHNL2_OP_VERSION response + * @adapter: The adapter for which the version is being updated + * @recv_buff: Buffer containing the response + * @recv_size: Response buffer size + * @ctx: Unused + * + * Return: %0 if the response format is correct and was handled as expecte= d, + * negative error otherwise. + */ +static int ixd_handle_vc_ver(struct ixd_adapter *adapter, void *recv_buff, + size_t recv_size, void *ctx) +{ + struct virtchnl2_version_info need_ver =3D ixd_get_vc_ver(); + struct virtchnl2_version_info *recv_ver; + + if (recv_size < sizeof(need_ver)) + return -EBADMSG; + + recv_ver =3D recv_buff; + if (le32_to_cpu(need_ver.major) > le32_to_cpu(recv_ver->major)) + return -EOPNOTSUPP; + + adapter->vc_ver.major =3D le32_to_cpu(recv_ver->major); + adapter->vc_ver.minor =3D le32_to_cpu(recv_ver->minor); + + return 0; +} + +/** + * ixd_req_vc_version - Request and save Virtchannel2 version + * @adapter: The adapter to get the version for + * + * Return: success or error if sending fails or the response was not as ex= pected + */ +static int ixd_req_vc_version(struct ixd_adapter *adapter) +{ + const struct ixd_ctlq_req req =3D { + .opcode =3D VIRTCHNL2_OP_VERSION, + .send_size =3D sizeof(struct virtchnl2_version_info), + .ctx =3D NULL, + .send_buff_init =3D ixd_fill_vc_ver, + .recv_process =3D ixd_handle_vc_ver, + }; + + return ixd_ctlq_do_req(adapter, &req); +} + +/** + * ixd_vc_dev_init - virtchnl device core initialization + * @adapter: device information + * + * Return: %0 on success or error if any step of the initialization fails + */ +int ixd_vc_dev_init(struct ixd_adapter *adapter) +{ + int err; + + err =3D ixd_req_vc_version(adapter); + if (err) { + dev_warn(ixd_to_dev(adapter), + "Getting virtchnl version failed, error=3D%pe\n", + ERR_PTR(err)); + return err; + } + + err =3D ixd_req_vc_caps(adapter); + if (err) { + dev_warn(ixd_to_dev(adapter), + "Getting virtchnl capabilities failed, error=3D%pe\n", + ERR_PTR(err)); + return err; + } + + return err; +} diff --git a/drivers/net/ethernet/intel/ixd/ixd_virtchnl.h b/drivers/net/et= hernet/intel/ixd/ixd_virtchnl.h new file mode 100644 index 000000000000..1a53da8b545c --- /dev/null +++ b/drivers/net/ethernet/intel/ixd/ixd_virtchnl.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* Copyright (C) 2025 Intel Corporation */ + +#ifndef _IXD_VIRTCHNL_H_ +#define _IXD_VIRTCHNL_H_ + +int ixd_vc_dev_init(struct ixd_adapter *adapter); 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17 Nov 2025 05:49:41 -0800 Received: from mglak.igk.intel.com (mglak.igk.intel.com [10.237.112.146]) by irvmail002.ir.intel.com (Postfix) with ESMTP id C7D5A37E27; Mon, 17 Nov 2025 13:49:39 +0000 (GMT) From: Larysa Zaremba To: intel-wired-lan@lists.osuosl.org, Tony Nguyen Cc: aleksander.lobakin@intel.com, sridhar.samudrala@intel.com, "Singhai, Anjali" , Michal Swiatkowski , Larysa Zaremba , "Fijalkowski, Maciej" , Emil Tantilov , Madhu Chittim , Josh Hay , "Keller, Jacob E" , jayaprakash.shanmugam@intel.com, natalia.wochtman@intel.com, Jiri Pirko , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Simon Horman , Jonathan Corbet , Richard Cochran , Przemek Kitszel , Andrew Lunn , netdev@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH iwl-next v5 15/15] ixd: add devlink support Date: Mon, 17 Nov 2025 14:48:55 +0100 Message-ID: <20251117134912.18566-16-larysa.zaremba@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20251117134912.18566-1-larysa.zaremba@intel.com> References: <20251117134912.18566-1-larysa.zaremba@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Amritha Nambiar Enable initial support for the devlink interface with the ixd driver. The ixd hardware is a single function PCIe device. So, the PCIe adapter gets its own devlink instance to manage device-wide resources or configuration. $ devlink dev show pci/0000:83:00.6 $ devlink dev info pci/0000:83:00.6 pci/0000:83:00.6: driver ixd serial_number 00-a0-c9-ff-ff-23-45-67 versions: fixed: device.type MEV running: cp 0.0 virtchnl 2.0 Signed-off-by: Amritha Nambiar Reviewed-by: Michal Swiatkowski Reviewed-by: Maciej Fijalkowski Reviewed-by: Przemek Kitszel Signed-off-by: Larysa Zaremba --- Documentation/networking/devlink/index.rst | 1 + Documentation/networking/devlink/ixd.rst | 35 +++++++ drivers/net/ethernet/intel/ixd/Kconfig | 1 + drivers/net/ethernet/intel/ixd/Makefile | 1 + drivers/net/ethernet/intel/ixd/ixd_devlink.c | 105 +++++++++++++++++++ drivers/net/ethernet/intel/ixd/ixd_devlink.h | 44 ++++++++ drivers/net/ethernet/intel/ixd/ixd_main.c | 16 ++- 7 files changed, 200 insertions(+), 3 deletions(-) create mode 100644 Documentation/networking/devlink/ixd.rst create mode 100644 drivers/net/ethernet/intel/ixd/ixd_devlink.c create mode 100644 drivers/net/ethernet/intel/ixd/ixd_devlink.h diff --git a/Documentation/networking/devlink/index.rst b/Documentation/net= working/devlink/index.rst index 35b12a2bfeba..efd138d8e7d3 100644 --- a/Documentation/networking/devlink/index.rst +++ b/Documentation/networking/devlink/index.rst @@ -87,6 +87,7 @@ parameters, info versions, and other features it supports. ionic iosm ixgbe + ixd kvaser_pciefd kvaser_usb mlx4 diff --git a/Documentation/networking/devlink/ixd.rst b/Documentation/netwo= rking/devlink/ixd.rst new file mode 100644 index 000000000000..81b28ffb00f6 --- /dev/null +++ b/Documentation/networking/devlink/ixd.rst @@ -0,0 +1,35 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D +ixd devlink support +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +This document describes the devlink features implemented by the ``ixd`` +device driver. + +Info versions +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +The ``ixd`` driver reports the following versions + +.. list-table:: devlink info versions implemented + :widths: 5 5 5 90 + + * - Name + - Type + - Example + - Description + * - ``device.type`` + - fixed + - MEV + - The hardware type for this device + * - ``cp`` + - running + - 0.0 + - Version number (major.minor) of the Control Plane software + running on the device. + * - ``virtchnl`` + - running + - 2.0 + - 2-digit version number (major.minor) of the communication channel + (virtchnl) used by the device. diff --git a/drivers/net/ethernet/intel/ixd/Kconfig b/drivers/net/ethernet/= intel/ixd/Kconfig index 24510c50070e..34181c59dcdc 100644 --- a/drivers/net/ethernet/intel/ixd/Kconfig +++ b/drivers/net/ethernet/intel/ixd/Kconfig @@ -7,6 +7,7 @@ config IXD select LIBETH select LIBIE_CP select LIBIE_PCI + select NET_DEVLINK help This driver supports Intel(R) Control Plane PCI Function of Intel E2100 and later IPUs and FNICs. diff --git a/drivers/net/ethernet/intel/ixd/Makefile b/drivers/net/ethernet= /intel/ixd/Makefile index 90abf231fb16..03760a2580b9 100644 --- a/drivers/net/ethernet/intel/ixd/Makefile +++ b/drivers/net/ethernet/intel/ixd/Makefile @@ -8,5 +8,6 @@ obj-$(CONFIG_IXD) +=3D ixd.o ixd-y :=3D ixd_main.o ixd-y +=3D ixd_ctlq.o ixd-y +=3D ixd_dev.o +ixd-y +=3D ixd_devlink.o ixd-y +=3D ixd_lib.o ixd-y +=3D ixd_virtchnl.o diff --git a/drivers/net/ethernet/intel/ixd/ixd_devlink.c b/drivers/net/eth= ernet/intel/ixd/ixd_devlink.c new file mode 100644 index 000000000000..6f60cfe4fab2 --- /dev/null +++ b/drivers/net/ethernet/intel/ixd/ixd_devlink.c @@ -0,0 +1,105 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright (c) 2025, Intel Corporation. */ + +#include "ixd.h" +#include "ixd_devlink.h" + +#define IXD_DEVLINK_INFO_LEN 128 + +/** + * ixd_fill_dsn - Get the serial number for the ixd device + * @adapter: adapter to query + * @buf: storage buffer for the info request + */ +static void ixd_fill_dsn(struct ixd_adapter *adapter, char *buf) +{ + u8 dsn[8]; + + /* Copy the DSN into an array in Big Endian format */ + put_unaligned_be64(pci_get_dsn(adapter->cp_ctx.mmio_info.pdev), dsn); + + snprintf(buf, IXD_DEVLINK_INFO_LEN, "%8phD", dsn); +} + +/** + * ixd_fill_device_name - Get the name of the underlying hardware + * @adapter: adapter to query + * @buf: storage buffer for the info request + * @buf_size: size of the storage buffer + */ +static void ixd_fill_device_name(struct ixd_adapter *adapter, char *buf, + size_t buf_size) +{ + if (adapter->caps.device_type =3D=3D VIRTCHNL2_MEV_DEVICE) + snprintf(buf, buf_size, "%s", "MEV"); + else + snprintf(buf, buf_size, "%s", "UNKNOWN"); +} + +/** + * ixd_devlink_info_get - .info_get devlink handler + * @devlink: devlink instance structure + * @req: the devlink info request + * @extack: extended netdev ack structure + * + * Callback for the devlink .info_get operation. Reports information about= the + * device. + * + * Return: zero on success or an error code on failure. + */ +static int ixd_devlink_info_get(struct devlink *devlink, + struct devlink_info_req *req, + struct netlink_ext_ack *extack) +{ + struct ixd_adapter *adapter =3D devlink_priv(devlink); + char buf[IXD_DEVLINK_INFO_LEN]; + int err; + + ixd_fill_dsn(adapter, buf); + err =3D devlink_info_serial_number_put(req, buf); + if (err) + return err; + + ixd_fill_device_name(adapter, buf, IXD_DEVLINK_INFO_LEN); + err =3D devlink_info_version_fixed_put(req, "device.type", buf); + if (err) + return err; + + snprintf(buf, sizeof(buf), "%u.%u", + le16_to_cpu(adapter->caps.cp_ver_major), + le16_to_cpu(adapter->caps.cp_ver_minor)); + + err =3D devlink_info_version_running_put(req, "cp", buf); + if (err) + return err; + + snprintf(buf, sizeof(buf), "%u.%u", + adapter->vc_ver.major, adapter->vc_ver.minor); + + return devlink_info_version_running_put(req, "virtchnl", buf); +} + +static const struct devlink_ops ixd_devlink_ops =3D { + .info_get =3D ixd_devlink_info_get, +}; + +/** + * ixd_adapter_alloc - Allocate devlink and return adapter pointer + * @dev: the device to allocate for + * + * Allocate a devlink instance for this device and return the private area= as + * the adapter structure. + * + * Return: adapter structure on success, NULL on failure + */ +struct ixd_adapter *ixd_adapter_alloc(struct device *dev) +{ + struct devlink *devlink; + + devlink =3D devlink_alloc(&ixd_devlink_ops, sizeof(struct ixd_adapter), + dev); + if (!devlink) + return NULL; + + return devlink_priv(devlink); +} diff --git a/drivers/net/ethernet/intel/ixd/ixd_devlink.h b/drivers/net/eth= ernet/intel/ixd/ixd_devlink.h new file mode 100644 index 000000000000..c43ce0655de2 --- /dev/null +++ b/drivers/net/ethernet/intel/ixd/ixd_devlink.h @@ -0,0 +1,44 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (c) 2025, Intel Corporation. */ + +#ifndef _IXD_DEVLINK_H_ +#define _IXD_DEVLINK_H_ +#include + +struct ixd_adapter *ixd_adapter_alloc(struct device *dev); + +/** + * ixd_devlink_free - teardown the devlink + * @adapter: the adapter structure to free + * + */ +static inline void ixd_devlink_free(struct ixd_adapter *adapter) +{ + struct devlink *devlink =3D priv_to_devlink(adapter); + + devlink_free(devlink); +} + +/** + * ixd_devlink_unregister - Unregister devlink resources for this adapter. + * @adapter: the adapter structure to cleanup + * + * Releases resources used by devlink and cleans up associated memory. + */ +static inline void ixd_devlink_unregister(struct ixd_adapter *adapter) +{ + devlink_unregister(priv_to_devlink(adapter)); +} + +/** + * ixd_devlink_register - Register devlink interface for this adapter + * @adapter: pointer to ixd adapter structure to be associated with devlink + * + * Register the devlink instance associated with this adapter + */ +static inline void ixd_devlink_register(struct ixd_adapter *adapter) +{ + devlink_register(priv_to_devlink(adapter)); +} + +#endif /* _IXD_DEVLINK_H_ */ diff --git a/drivers/net/ethernet/intel/ixd/ixd_main.c b/drivers/net/ethern= et/intel/ixd/ixd_main.c index 6d5e6aca77df..ea6aa793a6a7 100644 --- a/drivers/net/ethernet/intel/ixd/ixd_main.c +++ b/drivers/net/ethernet/intel/ixd/ixd_main.c @@ -4,6 +4,7 @@ #include "ixd.h" #include "ixd_ctlq.h" #include "ixd_lan_regs.h" +#include "ixd_devlink.h" =20 MODULE_DESCRIPTION("Intel(R) Control Plane Function Device Driver"); MODULE_IMPORT_NS("LIBIE_CP"); @@ -21,11 +22,14 @@ static void ixd_remove(struct pci_dev *pdev) /* Do not mix removal with (re)initialization */ cancel_delayed_work_sync(&adapter->init_task.init_work); =20 + ixd_devlink_unregister(adapter); + /* Leave the device clean on exit */ ixd_trigger_reset(adapter); ixd_deinit_dflt_mbx(adapter); =20 libie_pci_unmap_all_mmio_regions(&adapter->cp_ctx.mmio_info); + ixd_devlink_free(adapter); } =20 /** @@ -93,7 +97,7 @@ static int ixd_probe(struct pci_dev *pdev, const struct p= ci_device_id *ent) if (WARN_ON(ent->device !=3D IXD_DEV_ID_CPF)) return -EINVAL; =20 - adapter =3D devm_kzalloc(&pdev->dev, sizeof(*adapter), GFP_KERNEL); + adapter =3D ixd_adapter_alloc(&pdev->dev); if (!adapter) return -ENOMEM; =20 @@ -102,13 +106,13 @@ static int ixd_probe(struct pci_dev *pdev, const stru= ct pci_device_id *ent) =20 err =3D libie_pci_init_dev(pdev); if (err) - return err; + goto free_adapter; =20 pci_set_drvdata(pdev, adapter); =20 err =3D ixd_iomap_regions(adapter); if (err) - return err; + goto free_adapter; =20 INIT_DELAYED_WORK(&adapter->init_task.init_work, ixd_init_task); @@ -118,7 +122,13 @@ static int ixd_probe(struct pci_dev *pdev, const struc= t pci_device_id *ent) queue_delayed_work(system_unbound_wq, &adapter->init_task.init_work, msecs_to_jiffies(500)); =20 + ixd_devlink_register(adapter); + return 0; + +free_adapter: + ixd_devlink_free(adapter); + return err; } =20 static const struct pci_device_id ixd_pci_tbl[] =3D { --=20 2.47.0