From nobody Tue Dec 2 02:59:11 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BC84F337111; Mon, 17 Nov 2025 15:02:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763391720; cv=none; b=pjX/bbjPn2z4UN9PVYSvsiJOYmOJUMlz+Ijl3N1kTDgdw2Xo7GpaaJE7Bd0cIFQQfd9B6q9KQlBLu1qTJ/3v/goiuriNsV8a6BxOF/0b+684CNK9KOi1iW3u7PpSox0X/lYkm3QNLwuW/4cOe3zbOwomPnKtze4OrFuQDQ94Uro= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763391720; c=relaxed/simple; bh=minQr+a6cRWeN6PsUMqyWVvwNc6hgJRB6yCB23gZlKE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Nb1mec0HZ90+9OT4hSTfLrq37ljXNziUhGHGmO74WjQuSz64DNVlS8lZl2md3en6T2xYIvm1j8SvP9C07bN+Mean/+kVtPeo77S7mykq6zXhDN1bSQFDFX1Kc8/VZZqnEbUcrmn3fyJ/GSOfJqWOksdrcoZeDFEDjs9h8EJjhM8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=JaLUG54X; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="JaLUG54X" Received: by smtp.kernel.org (Postfix) with ESMTPS id 10DC3C2BC87; Mon, 17 Nov 2025 15:02:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1763391720; bh=minQr+a6cRWeN6PsUMqyWVvwNc6hgJRB6yCB23gZlKE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=JaLUG54XBd6ZwNYAF+XAZnRm7DlYXvOcehA06YSzG4//3zK5wq3P/r3DQu6Vn3whE 9+bCwbY+wsaKd5hUKQD62pNKNKVMIBj5kvhsjbtRWkHKpPzA1UfA+y1rPIbNOFO3NQ 3SfCnvcRqwF5AxN331Sn/WOqf8xbM4C26IUsHX/+SDDkijJGom8BvhVFX83lW7cO3q ICXa/ym3KTj207R+h2J8OnuYIDka1ufT4psPf5taXJwI5Os8wOGa6gTupH7sqMQ+GE 7jxV7S9Bt5hJnz/xNeDzYEDwTfl1001pkEQVg8tQ4MoDHOIoehzk9lsqqKNphNrLAQ +0HjVQZM3fPNQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id F00F3CEBF97; Mon, 17 Nov 2025 15:01:59 +0000 (UTC) From: Maud Spierings via B4 Relay Date: Mon, 17 Nov 2025 16:01:30 +0100 Subject: [PATCH v4 5/5] arm64: dts: freescale: Add the GOcontroll Moduline Mini Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251117-mini_iv-v4-5-5aa63832f51a@gocontroll.com> References: <20251117-mini_iv-v4-0-5aa63832f51a@gocontroll.com> In-Reply-To: <20251117-mini_iv-v4-0-5aa63832f51a@gocontroll.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Matti Vaittinen , Liam Girdwood , Mark Brown Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Maud Spierings X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1763391718; l=18227; i=maudspierings@gocontroll.com; s=20250214; h=from:subject:message-id; bh=r0U8BUTwC6StzcNp0ud7M872gxBPkaELFjtrjKncykY=; b=3+KVD57go0+Bh9D5RF1V5acq9D134EU98Weq19qmpZ7UwX6OlG7zKygF3CfUBVpqAJmvuc0Zq x/ZunqpX/52B54GHbVJs60OJBUWlEA9khOu0D0pV8D0avzwk/bkmCR/ X-Developer-Key: i=maudspierings@gocontroll.com; a=ed25519; pk=7chUb8XpaTQDvWhzTdHC0YPMkTDloELEC7q94tOUyPg= X-Endpoint-Received: by B4 Relay for maudspierings@gocontroll.com/20250214 with auth_id=341 X-Original-From: Maud Spierings Reply-To: maudspierings@gocontroll.com From: Maud Spierings The Moduline Mini is a part of the wider GOcontroll Moduline ecosystem. The= se are embedded controllers that focus on modularity with their swappable IO modules. Features: - up to 4 Moduline IO modules - 2 CAN busses - 1 Ethernet - 4 RGB leds - 1 3D accelerometer - optional Wi-Fi/Bluetooth - optional 4G/GPS Signed-off-by: Maud Spierings --- arch/arm64/boot/dts/freescale/Makefile | 1 + .../imx8mm-tx8m-1610-moduline-mini-111.dts | 688 +++++++++++++++++= ++++ 2 files changed, 689 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/f= reescale/Makefile index b2fef44e0a37..0a84c7dc89e3 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -125,6 +125,7 @@ imx8mm-evkb-pcie-ep-dtbs +=3D imx8mm-evkb.dtb imx-pcie0= -ep.dtbo dtb-$(CONFIG_ARCH_MXC) +=3D imx8mm-evk-pcie-ep.dtb imx8mm-evkb-pcie-ep.dtb =20 dtb-$(CONFIG_ARCH_MXC) +=3D imx8mm-tx8m-1610-moduline-iv-306-d.dtb +dtb-$(CONFIG_ARCH_MXC) +=3D imx8mm-tx8m-1610-moduline-mini-111.dtb =20 dtb-$(CONFIG_ARCH_MXC) +=3D imx8mm-icore-mx8mm-ctouch2.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx8mm-icore-mx8mm-edimm2.2.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8mm-tx8m-1610-moduline-mini-1= 11.dts b/arch/arm64/boot/dts/freescale/imx8mm-tx8m-1610-moduline-mini-111.d= ts new file mode 100644 index 000000000000..0091196a27d2 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-tx8m-1610-moduline-mini-111.dts @@ -0,0 +1,688 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2025 Maud Spierings + */ + +/dts-v1/; + +#include "imx8mm-tx8m-1610.dtsi" +#include + +/ { + chassis-type =3D "embedded"; + compatible =3D "gocontroll,moduline-mini-111", "karo,imx8mm-tx8m-1610", "= fsl,imx8mm"; + hardware =3D "Moduline Mini V1.11"; + model =3D "GOcontroll Moduline Mini"; + + aliases { + usb-host =3D &usbotg2; + usbotg =3D &usbotg1; + spi0 =3D &ecspi2; /* spidev number compatibility */ + spi1 =3D &ecspi3; /* spidev number compatibility */ + spi2 =3D &ecspi1; /* spidev number compatibility */ + }; + + chosen { + stdout-path =3D "serial2:115200n8"; + }; + + mcp_clock: mcp-clock { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <20000000>; + }; + + reg_3v3_comm: regulator-3v3-communication { + compatible =3D "regulator-fixed"; + enable-active-high; + gpio =3D <&gpio1 11 GPIO_ACTIVE_HIGH>; + pinctrl-0 =3D <&pinctrl_reg_comm>; + pinctrl-names =3D "default"; + power-supply =3D <®_6v4>; + /* also powers the cellular modem which can't vote on the regulator */ + regulator-always-on; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <3300000>; + regulator-name =3D "3v3_comm"; + }; + + reg_5v0: regulator-5v0 { + compatible =3D "regulator-fixed"; + power-supply =3D <®_6v4>; + regulator-always-on; + regulator-max-microvolt =3D <5000000>; + regulator-min-microvolt =3D <5000000>; + regulator-name =3D "5v0"; + }; + + reg_6v4: regulator-6v4 { + compatible =3D "regulator-fixed"; + regulator-always-on; + regulator-max-microvolt =3D <6400000>; + regulator-min-microvolt =3D <6400000>; + regulator-name =3D "6v4"; + }; + + reg_can1_stby: regulator-can1-stby { + compatible =3D "regulator-fixed"; + gpio =3D <&gpio2 12 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&pinctrl_can1_reg>; + pinctrl-names =3D "default"; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <3300000>; + regulator-name =3D "can1-stby"; + }; + + reg_can2_stby: regulator-can2-stby { + compatible =3D "regulator-fixed"; + gpio =3D <&gpio3 15 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&pinctrl_can2_reg>; + pinctrl-names =3D "default"; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <3300000>; + regulator-name =3D "can2-stby"; + }; + + wifi_pwrseq: wifi-pwrseq { + compatible =3D "mmc-pwrseq-simple"; + pinctrl-0 =3D <&pinctrl_wl_reg>; + pinctrl-names =3D "default"; + post-power-on-delay-ms =3D <100>; + power-off-delay-us =3D <500000>; + reset-gpios =3D <&gpio5 28 GPIO_ACTIVE_LOW>; + }; +}; + +&ecspi1 { + cs-gpios =3D <&gpio4 27 GPIO_ACTIVE_LOW>, + <&gpio3 23 GPIO_ACTIVE_LOW>, + <&gpio3 1 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&pinctrl_ecspi1>; + pinctrl-names =3D "default"; + status =3D "okay"; + + connector@0 { + compatible =3D "gocontroll,moduline-module-slot"; + reg =3D <0>; + i2c-bus =3D <&i2c2>; + interrupt-parent =3D <&gpio4>; + interrupts =3D <26 IRQ_TYPE_EDGE_FALLING>; + reset-gpios =3D <&gpio4 28 GPIO_ACTIVE_LOW>; + slot-number =3D <3>; + spi-max-frequency =3D <54000000>; + sync-gpios =3D <&gpio3 7 GPIO_ACTIVE_HIGH>; + vddhpp-supply =3D <®_6v4>; + vddp-supply =3D <®_5v0>; + vdd-supply =3D <®_vdd_3v3>; + }; + + connector@1 { + compatible =3D "gocontroll,moduline-module-slot"; + reg =3D <1>; + i2c-bus =3D <&i2c2>; + interrupt-parent =3D <&gpio3>; + interrupts =3D <19 IRQ_TYPE_EDGE_FALLING>; + reset-gpios =3D <&gpio3 21 GPIO_ACTIVE_LOW>; + slot-number =3D <4>; + spi-max-frequency =3D <54000000>; + sync-gpios =3D <&gpio3 7 GPIO_ACTIVE_HIGH>; + vddhpp-supply =3D <®_6v4>; + vddp-supply =3D <®_5v0>; + vdd-supply =3D <®_vdd_3v3>; + }; + + adc@2 { + compatible =3D "microchip,mcp3004"; + reg =3D <2>; + spi-max-frequency =3D <2300000>; + vref-supply =3D <®_vdd_3v3>; + }; +}; + +&ecspi2 { + cs-gpios =3D <&gpio3 24 GPIO_ACTIVE_LOW>, + <&gpio3 9 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&pinctrl_ecspi2>; + pinctrl-names =3D "default"; + status =3D "okay"; + + can@0 { + compatible =3D "microchip,mcp25625"; + reg =3D <0>; + clocks =3D <&mcp_clock>; + interrupt-parent =3D <&gpio3>; + interrupts =3D <22 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 =3D <&pinctrl_can1>; + pinctrl-names =3D "default"; + spi-max-frequency =3D <10000000>; + vdd-supply =3D <®_vdd_3v3>; + xceiver-supply =3D <®_can1_stby>; + }; + + can@1 { + compatible =3D "microchip,mcp25625"; + reg =3D <1>; + clocks =3D <&mcp_clock>; + interrupt-parent =3D <&gpio3>; + interrupts =3D <6 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 =3D <&pinctrl_can2>; + pinctrl-names =3D "default"; + spi-max-frequency =3D <10000000>; + vdd-supply =3D <®_vdd_3v3>; + xceiver-supply =3D <®_can2_stby>; + }; +}; + +&ecspi3 { + cs-gpios =3D <&gpio1 9 GPIO_ACTIVE_LOW>, + <&gpio1 2 GPIO_ACTIVE_LOW>; + pinctrl-0 =3D <&pinctrl_ecspi3>; + pinctrl-names =3D "default"; + status =3D "okay"; + + connector@0 { + compatible =3D "gocontroll,moduline-module-slot"; + reg =3D <0>; + i2c-bus =3D <&i2c2>; + interrupt-parent =3D <&gpio1>; + interrupts =3D <10 IRQ_TYPE_EDGE_FALLING>; + reset-gpios =3D <&gpio1 7 GPIO_ACTIVE_LOW>; + slot-number =3D <1>; + spi-max-frequency =3D <54000000>; + sync-gpios =3D <&gpio3 7 GPIO_ACTIVE_HIGH>; + vddhpp-supply =3D <®_6v4>; + vddp-supply =3D <®_5v0>; + vdd-supply =3D <®_vdd_3v3>; + }; + + connector@1 { + compatible =3D "gocontroll,moduline-module-slot"; + reg =3D <1>; + i2c-bus =3D <&i2c2>; + interrupt-parent =3D <&gpio1>; + interrupts =3D <5 IRQ_TYPE_EDGE_FALLING>; + reset-gpios =3D <&gpio5 21 GPIO_ACTIVE_LOW>; + slot-number =3D <2>; + spi-max-frequency =3D <54000000>; + sync-gpios =3D <&gpio3 7 GPIO_ACTIVE_HIGH>; + vddhpp-supply =3D <®_6v4>; + vddp-supply =3D <®_5v0>; + vdd-supply =3D <®_vdd_3v3>; + }; +}; + +&gpu_2d { + status =3D "disabled"; +}; + +&gpu_3d { + status =3D "disabled"; +}; + +&i2c2 { + clock-frequency =3D <400000>; + pinctrl-0 =3D <&pinctrl_i2c2>; + pinctrl-1 =3D <&pinctrl_i2c2_gpio>; + pinctrl-names =3D "default", "gpio"; + scl-gpios =3D <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios =3D <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status =3D "okay"; +}; + +&i2c3 { + clock-frequency =3D <400000>; + pinctrl-0 =3D <&pinctrl_i2c3>; + pinctrl-1 =3D <&pinctrl_i2c3_gpio>; + pinctrl-names =3D "default", "gpio"; + scl-gpios =3D <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios =3D <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status =3D "okay"; + + lp5012@14 { + compatible =3D "ti,lp5012"; + reg =3D <0x14>; + vled-supply =3D <®_6v4>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + multi-led@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + color =3D ; + label =3D "case-led1"; + + led@0 { + reg =3D <0>; + color =3D ; + }; + + led@1 { + reg =3D <1>; + color =3D ; + }; + + led@2 { + reg =3D <2>; + color =3D ; + }; + }; + + multi-led@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; + color =3D ; + label =3D "case-led2"; + + led@0 { + reg =3D <0>; + color =3D ; + }; + + led@1 { + reg =3D <1>; + color =3D ; + }; + + led@2 { + reg =3D <2>; + color =3D ; + }; + }; + + multi-led@2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <2>; + color =3D ; + label =3D "case-led3"; + + led@0 { + reg =3D <0>; + color =3D ; + }; + + led@1 { + reg =3D <1>; + color =3D ; + }; + + led@2 { + reg =3D <2>; + color =3D ; + }; + }; + + multi-led@3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <3>; + color =3D ; + label =3D "case-led4"; + + led@0 { + reg =3D <0>; + color =3D ; + }; + + led@1 { + reg =3D <1>; + color =3D ; + }; + + led@2 { + reg =3D <2>; + color =3D ; + }; + }; + }; + + accelerometer@18 { + compatible =3D "st,lis2dw12"; + reg =3D <0x18>; + interrupt-parent =3D <&gpio5>; + interrupts =3D <3 IRQ_TYPE_EDGE_RISING>, <5 IRQ_TYPE_EDGE_RISING>; + pinctrl-0 =3D <&pinctrl_lis_int>; + pinctrl-names =3D "default"; + vddio-supply =3D <®_vdd_3v3>; + vdd-supply =3D <®_vdd_3v3>; + }; + + humidity-sensor@5f { + compatible =3D "st,hts221"; + reg =3D <0x5f>; + interrupt-parent =3D <&gpio3>; + interrupts =3D <10 IRQ_TYPE_EDGE_RISING>; + pinctrl-0 =3D <&pinctrl_hts_int>; + pinctrl-names =3D "default"; + vdd-supply =3D <®_vdd_3v3>; + }; +}; + +&iomuxc { + pinctrl_bt: btgrp { + fsl,pins =3D < + MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 + MX8MM_DSE_X1 + MX8MM_IOMUXC_SAI5_MCLK_GPIO3_IO25 + (MX8MM_PULL_UP | MX8MM_PULL_ENABLE | MX8MM_HYS_SCHMITT) + MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 + MX8MM_DSE_X1 + >; + }; + + pinctrl_can1: can1grp { + fsl,pins =3D < + MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25 + (MX8MM_PULL_UP | MX8MM_PULL_ENABLE) + MX8MM_IOMUXC_SAI5_RXD1_GPIO3_IO22 + (MX8MM_PULL_UP | MX8MM_PULL_ENABLE | MX8MM_HYS_SCHMITT) + >; + }; + + pinctrl_can1_reg: can1reggrp { + fsl,pins =3D < + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 + (MX8MM_DSE_X2 | MX8MM_FSEL_FAST | MX8MM_PULL_UP | MX8MM_PULL_ENABLE) + >; + }; + + pinctrl_can2: can2grp { + fsl,pins =3D < + MX8MM_IOMUXC_NAND_CLE_GPIO3_IO5 + (MX8MM_PULL_UP | MX8MM_PULL_ENABLE) + MX8MM_IOMUXC_NAND_DATA00_GPIO3_IO6 + (MX8MM_PULL_UP | MX8MM_PULL_ENABLE | MX8MM_HYS_SCHMITT) + >; + }; + + pinctrl_can2_reg: can2reggrp { + fsl,pins =3D < + MX8MM_IOMUXC_NAND_RE_B_GPIO3_IO15 + (MX8MM_DSE_X2 | MX8MM_FSEL_FAST | MX8MM_PULL_UP | MX8MM_PULL_ENABLE) + >; + }; + + pinctrl_ecspi1: ecspi1grp { + fsl,pins =3D < + MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI + MX8MM_DSE_X4 + MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO + (MX8MM_DSE_X4 | MX8MM_HYS_SCHMITT) + MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK + MX8MM_DSE_X4 + MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27 + MX8MM_DSE_X1 + MX8MM_IOMUXC_SAI5_RXD2_GPIO3_IO23 + MX8MM_DSE_X1 + MX8MM_IOMUXC_NAND_CE0_B_GPIO3_IO1 + MX8MM_DSE_X1 + >; + }; + + pinctrl_ecspi2: ecspi2grp { + fsl,pins =3D < + MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI + MX8MM_DSE_X4 + MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO + (MX8MM_DSE_X4 | MX8MM_HYS_SCHMITT) + MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK + MX8MM_DSE_X4 + MX8MM_IOMUXC_SAI5_RXD3_GPIO3_IO24 + MX8MM_DSE_X1 + MX8MM_IOMUXC_NAND_DATA03_GPIO3_IO9 + MX8MM_DSE_X1 + >; + }; + + pinctrl_ecspi3: ecspi3grp { + fsl,pins =3D < + MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI + MX8MM_DSE_X4 + MX8MM_IOMUXC_UART2_RXD_ECSPI3_MISO + (MX8MM_DSE_X4 | MX8MM_HYS_SCHMITT) + MX8MM_IOMUXC_UART1_RXD_ECSPI3_SCLK + MX8MM_DSE_X4 + MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 + MX8MM_DSE_X1 + MX8MM_IOMUXC_GPIO1_IO02_GPIO1_IO2 + MX8MM_DSE_X1 + >; + }; + + pinctrl_hts_int: htsintgrp { + fsl,pins =3D < + MX8MM_IOMUXC_NAND_DATA04_GPIO3_IO10 + (MX8MM_PULL_ENABLE | MX8MM_HYS_SCHMITT) + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins =3D < + MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL + MX8MM_I2C_DEFAULT + MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA + MX8MM_I2C_DEFAULT + >; + }; + + pinctrl_i2c2_gpio: i2c2-gpiogrp { + fsl,pins =3D < + MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16 + MX8MM_I2C_DEFAULT + MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17 + MX8MM_I2C_DEFAULT + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins =3D < + MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL + MX8MM_I2C_DEFAULT + MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA + MX8MM_I2C_DEFAULT + >; + }; + + pinctrl_i2c3_gpio: i2c3-gpiogrp { + fsl,pins =3D < + MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18 + MX8MM_I2C_DEFAULT + MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19 + MX8MM_I2C_DEFAULT + >; + }; + + pinctrl_lis_int: lisintgrp { + fsl,pins =3D < + MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3 + (MX8MM_PULL_ENABLE | MX8MM_HYS_SCHMITT) + MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 + (MX8MM_PULL_ENABLE | MX8MM_HYS_SCHMITT) + >; + }; + + pinctrl_reg_comm: reg_commgrp { + fsl,pins =3D < + MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 + MX8MM_DSE_X1 + >; + }; + + pinctrl_sysfs_gpios: sysfsgpiogrp { + fsl,pins =3D < + MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 + MX8MM_DSE_X1 + MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21 + MX8MM_DSE_X1 + MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 + MX8MM_DSE_X1 + MX8MM_IOMUXC_SAI5_RXD0_GPIO3_IO21 + MX8MM_DSE_X1 + MX8MM_IOMUXC_SD2_WP_GPIO2_IO20 + MX8MM_DSE_X1 + MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 + MX8MM_DSE_X1 + MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4 + MX8MM_DSE_X1 + MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 + MX8MM_DSE_X1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins =3D < + MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX + (MX8MM_PULL_UP | MX8MM_PULL_ENABLE) + MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX + (MX8MM_PULL_UP | MX8MM_PULL_ENABLE) + MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B + (MX8MM_PULL_UP | MX8MM_PULL_ENABLE) + MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B + (MX8MM_PULL_UP | MX8MM_PULL_ENABLE) + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins =3D < + MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX + (MX8MM_PULL_UP | MX8MM_PULL_ENABLE) + MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX + (MX8MM_PULL_UP | MX8MM_PULL_ENABLE) + MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B + (MX8MM_PULL_UP | MX8MM_PULL_ENABLE) + MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B + (MX8MM_PULL_UP | MX8MM_PULL_ENABLE) + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins =3D < + MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX + (MX8MM_PULL_UP | MX8MM_PULL_ENABLE) + MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX + (MX8MM_PULL_UP | MX8MM_PULL_ENABLE) + >; + }; + + pinctrl_usdhc2: pinctrlusdhc2grp { + fsl,pins =3D < + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK + (MX8MM_DSE_X2 | MX8MM_FSEL_FAST | MX8MM_PULL_ENABLE) + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD + (MX8MM_DSE_X2 | MX8MM_USDHC_DATA_DEFAULT) + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 + (MX8MM_DSE_X2 | MX8MM_USDHC_DATA_DEFAULT) + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 + (MX8MM_DSE_X2 | MX8MM_USDHC_DATA_DEFAULT) + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 + (MX8MM_DSE_X2 | MX8MM_USDHC_DATA_DEFAULT) + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 + (MX8MM_DSE_X2 | MX8MM_USDHC_DATA_DEFAULT) + >; + }; + + pinctrl_wl_int: wlintgrp { + fsl,pins =3D < + MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 + (MX8MM_PULL_UP | MX8MM_HYS_SCHMITT | MX8MM_PULL_ENABLE) + >; + }; + + pinctrl_wl_reg: wlreggrp { + fsl,pins =3D < + MX8MM_IOMUXC_UART4_RXD_GPIO5_IO28 + MX8MM_DSE_X1 + >; + }; +}; + +&uart1 { + pinctrl-0 =3D <&pinctrl_uart1>; + pinctrl-names =3D "default"; + uart-has-rtscts; + status =3D "okay"; + + bluetooth { + compatible =3D "infineon,cyw43439-bt", "brcm,bcm4329-bt"; + device-wakeup-gpios =3D <&gpio5 13 GPIO_ACTIVE_HIGH>; + interrupt-names =3D "host-wakeup"; + interrupt-parent =3D <&gpio3>; + interrupts =3D <25 IRQ_TYPE_EDGE_FALLING>; + max-speed =3D <921600>; + pinctrl-0 =3D <&pinctrl_bt>; + pinctrl-names =3D "default"; + shutdown-gpios =3D <&gpio1 1 GPIO_ACTIVE_HIGH>; + vbat-supply =3D <®_3v3_comm>; + vddio-supply =3D <®_3v3_comm>; + }; +}; + +&uart2 { + pinctrl-0 =3D <&pinctrl_uart2>; + pinctrl-names =3D "default"; + uart-has-rtscts; + status =3D "okay"; +}; + +&uart3 { + pinctrl-0 =3D <&pinctrl_uart3>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + +&usbotg1 { + disable-over-current; + dr_mode =3D "peripheral"; + status =3D "okay"; +}; + +&usbotg2 { + disable-over-current; + dr_mode =3D "host"; + vbus-supply =3D <®_5v0>; + status =3D "okay"; +}; + +&usdhc2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + cap-power-off-card; + keep-power-in-suspend; + max-frequency =3D <50000000>; + mmc-pwrseq =3D <&wifi_pwrseq>; + non-removable; + pinctrl-0 =3D <&pinctrl_usdhc2>; + pinctrl-names =3D "default"; + sd-uhs-sdr25; + vmmc-supply =3D <®_3v3_comm>; + status =3D "okay"; + + wifi@1 { + compatible =3D "infineon,cyw43439-fmac", "brcm,bcm4329-fmac"; + reg =3D <1>; + pinctrl-0 =3D <&pinctrl_wl_int>; + pinctrl-names =3D "default"; + interrupt-names =3D "host-wake"; + interrupt-parent =3D <&gpio3>; + interrupts =3D <20 IRQ_TYPE_LEVEL_LOW>; + brcm,board-type =3D "GOcontroll,moduline"; + }; +}; + +&vpu_blk_ctrl { + status =3D "disabled"; +}; + +&vpu_g1 { + status =3D "disabled"; +}; + +&vpu_g2 { + status =3D "disabled"; +}; + +&wdog1 { + status =3D "okay"; +}; --=20 2.51.2