From nobody Tue Dec 2 02:52:28 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 03D7233373D; Mon, 17 Nov 2025 14:21:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763389296; cv=none; b=NFVDyNUF2tra7eOSk+sEMqqJdmHQxN4oS+0wC3oiJ/N9M6K109d8FByNRXuB0GopFx/04W0aKBs2/5+Xt9d6vvpFRvxqAVmv/pW7kce+YsfxP2pQKp9tHYanebORg9n+cbABb4cSO3w82jYdyljuNn3Kf9uvVPKTK6DgUuWUgqA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763389296; c=relaxed/simple; bh=VMkhzVdFF718xxI3R8myeRKPldhaPCNukn2Dr7NViNk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=LHZ90r+dJlkij3qvGcxrWzVakz8onpKefANsazSB4ox2y5iSeTkXy7+qghSMDX4Bf/WB2xPyw/pL+zs52aW6TPtRMmRNhyMm37GML7r25FnrTWlS86N0WsiCFy7LwYh4YSm60BBuO1C+bZHIKsjE8gub35FJ9pDK8YMxykQIoMM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Mj79QdGc; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Mj79QdGc" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C8D5FC4CEF1; Mon, 17 Nov 2025 14:21:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1763389295; bh=VMkhzVdFF718xxI3R8myeRKPldhaPCNukn2Dr7NViNk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Mj79QdGcCMslu9I0Lj53jxL8YNXYsTHzsbexR+87t9n4CoRE1NqjvYXIaKKfhrA6Q mLr6oPtrV+PELHftah0sUEaq8QC8fwwqSiLtXX492jp/kTjkabwMEjDZwNAvuhtVgI An11iV1m/4FqyCdkw86872P8gpxFCU6VCLjJ4jhiHlHWO3QYKFEmDPWN+fL33swTAo D9+EL91KIzHBoDTfaqMKU3E2DL8uwqkAuy8C4ajhDsOhcHkrwILm+q+ykL26sZXxKJ KZOUR93TrFe50u7k7fGweKzyXNuOcVrRw5mcyp4LvW5t73cEYZYLR4bDTu9hxL6mwQ AG8JQO1ElMZXg== From: Conor Dooley To: linux-kernel@vger.kernel.org Cc: conor@kernel.org, Conor Dooley , Rob Herring , Krzysztof Kozlowski , Daire McNamara , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v1 1/3] dt-bindings: soc: microchip: add compatible for the mss-top-sysreg on pic64gx Date: Mon, 17 Nov 2025 14:21:20 +0000 Message-ID: <20251117-reversion-distaste-986c81a33f20@spud> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251117-mashing-cursor-6e965a77ce6a@spud> References: <20251117-mashing-cursor-6e965a77ce6a@spud> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1213; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=9r0jELMzsNrhXXub+HN5urN9Eek071kdQwUXmSVqQ60=; b=owGbwMvMwCVWscWwfUFT0iXG02pJDJnS+rE63PXr+A4o3N4cPmtvXMrP/+u+mu561dfbZfVei b9uv4NQRykLgxgXg6yYIkvi7b4WqfV/XHY497yFmcPKBDKEgYtTACYSxs/wz2hC4nehJYVHjv4q 4BXJeHWy64mN2/TvmeLaa35InP2zUoHhf+W97cdZLnkebbTnUOp7vGOGhNuBJ95/D2qVLW9JFOw QYQYA X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Conor Dooley pic64gx has an identical sysreg syscon to mpfs, add it using a fallback. Signed-off-by: Conor Dooley Acked-by: Rob Herring (Arm) --- .../microchip/microchip,mpfs-mss-top-sysreg.yaml | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs= -mss-top-sysreg.yaml b/Documentation/devicetree/bindings/soc/microchip/micr= ochip,mpfs-mss-top-sysreg.yaml index 44e4a50c3155..2c1efcdf59b7 100644 --- a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-mss-to= p-sysreg.yaml +++ b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-mss-to= p-sysreg.yaml @@ -15,10 +15,16 @@ description: =20 properties: compatible: - items: - - const: microchip,mpfs-mss-top-sysreg - - const: syscon - - const: simple-mfd + oneOf: + - items: + - const: microchip,mpfs-mss-top-sysreg + - const: syscon + - const: simple-mfd + - items: + - const: microchip,pic64gx-mss-top-sysreg + - const: microchip,mpfs-mss-top-sysreg + - const: syscon + - const: simple-mfd =20 reg: maxItems: 1 --=20 2.51.0 From nobody Tue Dec 2 02:52:28 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6F4D9334367; Mon, 17 Nov 2025 14:21:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763389298; cv=none; b=oTiLBm1x6F8EaicOK241wPLL6kYEDZ+Svcb6lqHhldaJnhRl+0uhMWyX7euYS0Q+UpffsBoUOekUk/RFQhEWJfQkcS06Us47GSS/J8InqxA1Cq4CPg6eCCflkeKz1XKco1+NToyjlCI4C2EbGDRjEs/VlJRMkxqV890E8eDF+zo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763389298; c=relaxed/simple; bh=4Mi+LgMXubEexFptn3rownVulQBg1tOQnyFmAt9y8i0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=LCFx/2rdlROew027wZVnQtZIHEJTo8mDON25F1z1XeikcWuGXnvHSEKtgH7hHABehQx9b4DZCsfPfvlWe3hl08C7H/ZT5UYsPWvVya1CuAiehvzzMf9zv6ZNleM93aMsKPb60qSUyPbhH4tGNJP2Lj8Lf8Byyuctb6UCC1EBInU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=IkAariby; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="IkAariby" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 065FAC4AF09; Mon, 17 Nov 2025 14:21:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1763389298; bh=4Mi+LgMXubEexFptn3rownVulQBg1tOQnyFmAt9y8i0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IkAaribyinSaMIZyProghQx0volGag6ODmeAGY6kwEI/CZgMGuhZ7IntFfu/9tXYY TifCFkka+wMw3MQ+Cpk7s5yLPQGStdJkkqrdEXpM+p6sQ5z6nE6yguYLl2dKt7C0o8 4SzDJd97uM2dfyNZVDQf+dzpVlAkE2iR+ZMiXLLhMEQUWbEM9V8ZJq7IOecPtSjHdd FMu8erZXIMZF/I6BeOg3EM3QOTMzbQWG0kZwz/4FUUGGAd3Vm8Dz1UTBDTblveb1j4 5vQtxWDc6S6umkbHxKMhiE6Qahxy/iaIAR7ehNZCmF5gUBD4581Mz9OgoYNA0RgqmJ Ux6UIyTSjbg9g== From: Conor Dooley To: linux-kernel@vger.kernel.org Cc: conor@kernel.org, Conor Dooley , Rob Herring , Krzysztof Kozlowski , Daire McNamara , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Pierre-Henry Moussay Subject: [PATCH v1 2/3] dt-bindings: soc: microchip: mpfs-sys-controller: Add pic64gx compatibility Date: Mon, 17 Nov 2025 14:21:21 +0000 Message-ID: <20251117-enrich-tricycle-aad89e430b0c@spud> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251117-mashing-cursor-6e965a77ce6a@spud> References: <20251117-mashing-cursor-6e965a77ce6a@spud> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1153; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=VsLhTgDg3A12xD5nur7r374Z89j1K8foRtnpWti1HhM=; b=owGbwMvMwCVWscWwfUFT0iXG02pJDJnS+nEdOofm1erYW9u2XT6oczPzNf+x3qZbMRy8BRZRa XcuzH3RUcrCIMbFICumyJJ4u69Fav0flx3OPW9h5rAygQxh4OIUgIks82VkWB5mpBA8iWtf5f1H MQJPdjXcirvbsm3NuXsnei41btyUeZbhf9qLWeYn5vyd3XjtI+PLzlen9yxYeVFinu+TljWLvsz z8+EHAA== X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Pierre-Henry Moussay pic64gx is not compatible with mpfs because due to the lack of FPGA functionality some features are disabled. Notably, anything to do with FPGA fabric contents is not supported. Signed-off-by: Pierre-Henry Moussay Signed-off-by: Conor Dooley Acked-by: Rob Herring (Arm) --- .../bindings/soc/microchip/microchip,mpfs-sys-controller.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs= -sys-controller.yaml b/Documentation/devicetree/bindings/soc/microchip/micr= ochip,mpfs-sys-controller.yaml index a3fa04f3a1bd..6cebc19db4f5 100644 --- a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-co= ntroller.yaml +++ b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-co= ntroller.yaml @@ -24,7 +24,9 @@ properties: maxItems: 1 =20 compatible: - const: microchip,mpfs-sys-controller + enum: + - microchip,mpfs-sys-controller + - microchip,pic64gx-sys-controller =20 microchip,bitstream-flash: $ref: /schemas/types.yaml#/definitions/phandle --=20 2.51.0 From nobody Tue Dec 2 02:52:28 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C49D7334C1A; Mon, 17 Nov 2025 14:21:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763389300; cv=none; b=QibSdfXEkAE8NJRKRtY656qTRd3jGYwAhtDm3HcfuGjz1Tc+bBuPXBOdmaduPV2LxcROLVZfK7fOtCEFz6touAQmrh7uTeJ16wtYi9gVyXT5NebssI9Ziw7dDW9AWCoTMcxEVOgX5Y8xK1lYutnp7GlWzsMITewP49RAafoXxm8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763389300; c=relaxed/simple; bh=E5fXTu2ulGjFwJu91VzOdzL+58gav1X0Zx4tNynBJCE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=QTNd9CF8Yji6xh+lYIVwjXXBU4/y2tRPnFsfdhbQQ7MmSDhH2t4JOFhI+b4c8e6mecvMM1oh3UFIh1AXpAzbDU/tTxOexUp1wpBv1D2nvKrD4QyGHbi7fbilXfWywqX3OwEgG3kFp75ZFd/KuHIecX79b8riXf7votFIOWIMHG0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Fe2WSCuq; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Fe2WSCuq" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 689EDC4CEFB; Mon, 17 Nov 2025 14:21:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1763389300; bh=E5fXTu2ulGjFwJu91VzOdzL+58gav1X0Zx4tNynBJCE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Fe2WSCuqOTlP1MOTMRlS8hJ1LNSjzLqDQaSXo6fJNnQsDiTnKtEGqkQw4zTY3r3h1 QPJ34LBLKQ5DATG9u7Lpd5ud7HUa4E+T7vO/v3CoMjGMHWO0J/6zyMs42q41L5JAPR Znxg/KNpW/f+dKJtYbo9g7cCB1SStcjzvTxrl3GoPA8hMyB4BL1FqV5T9ZYeLr5Yk8 nAfGhLkjIeULhZEdFhs+KGz5VwQ2lHgKUFH2GBKN/qC+hA31d91lA7p0fG+IV5twCW d2Lozg8aO//XxI/etMFS6ckytkFh4r+j311PVRU/g3FdafYkCpoDPRU3tIb7pB1ArE VKv+4v2HYw/1w== From: Conor Dooley To: linux-kernel@vger.kernel.org Cc: conor@kernel.org, Conor Dooley , Rob Herring , Krzysztof Kozlowski , Daire McNamara , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Pierre-Henry Moussay Subject: [PATCH v1 3/3] soc: microchip: mpfs-sys-controller: add support for pic64gx Date: Mon, 17 Nov 2025 14:21:22 +0000 Message-ID: <20251117-partner-anymore-0fe4b6c47557@spud> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251117-mashing-cursor-6e965a77ce6a@spud> References: <20251117-mashing-cursor-6e965a77ce6a@spud> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3690; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=NAXbPWlJ0Ex76wD57WQaysCf0x3fTMwkfqbrXzFauUE=; b=kA0DAAoWeLQxh6CCYtIByyZiAGkbL16j45NncLpOgSyJ7o5yeehEnO8TOZkGZPsz2QPX1l9Kb oh1BAAWCgAdFiEEYduOhBqv/ES4Q4zteLQxh6CCYtIFAmkbL14ACgkQeLQxh6CCYtL2xQEA1AK5 shW6IJISM8RTiB+waAO+OXRdTii3dy7Dux1D/QEBAJw3v03Ddoxxtrq9DywZ+IZ70/Gw5n72FSz M6eUpZoUM X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Pierre-Henry Moussay pic64gx is not compatible with mpfs because due to the lack of FPGA functionality some features are disabled. Notably, anything to do with FPGA fabric contents is not supported. Signed-off-by: Pierre-Henry Moussay Signed-off-by: Conor Dooley --- drivers/soc/microchip/mpfs-sys-controller.c | 74 +++++++++++++++------ 1 file changed, 54 insertions(+), 20 deletions(-) diff --git a/drivers/soc/microchip/mpfs-sys-controller.c b/drivers/soc/micr= ochip/mpfs-sys-controller.c index 30bc45d17d34..02ab0875c911 100644 --- a/drivers/soc/microchip/mpfs-sys-controller.c +++ b/drivers/soc/microchip/mpfs-sys-controller.c @@ -36,6 +36,11 @@ struct mpfs_sys_controller { struct kref consumers; }; =20 +struct mpfs_syscon_config { + unsigned int nb_subdevs; + struct platform_device *subdevs; +}; + int mpfs_blocking_transaction(struct mpfs_sys_controller *sys_controller, = struct mpfs_mss_msg *msg) { unsigned long timeout =3D msecs_to_jiffies(MPFS_SYS_CTRL_TIMEOUT_MS); @@ -110,25 +115,11 @@ struct mtd_info *mpfs_sys_controller_get_flash(struct= mpfs_sys_controller *mpfs_ } EXPORT_SYMBOL(mpfs_sys_controller_get_flash); =20 -static struct platform_device subdevs[] =3D { - { - .name =3D "mpfs-rng", - .id =3D -1, - }, - { - .name =3D "mpfs-generic-service", - .id =3D -1, - }, - { - .name =3D "mpfs-auto-update", - .id =3D -1, - }, -}; - static int mpfs_sys_controller_probe(struct platform_device *pdev) { struct device *dev =3D &pdev->dev; struct mpfs_sys_controller *sys_controller; + struct mpfs_syscon_config *of_data; struct device_node *np; int i, ret; =20 @@ -164,11 +155,17 @@ static int mpfs_sys_controller_probe(struct platform_= device *pdev) =20 platform_set_drvdata(pdev, sys_controller); =20 + of_data =3D (struct mpfs_syscon_config *) device_get_match_data(dev); + if (!of_data) { + dev_err(dev, "Error getting match data\n"); + return -EINVAL; + } =20 - for (i =3D 0; i < ARRAY_SIZE(subdevs); i++) { - subdevs[i].dev.parent =3D dev; - if (platform_device_register(&subdevs[i])) - dev_warn(dev, "Error registering sub device %s\n", subdevs[i].name); + for (i =3D 0; i < of_data->nb_subdevs; i++) { + of_data->subdevs[i].dev.parent =3D dev; + if (platform_device_register(&of_data->subdevs[i])) + dev_warn(dev, "Error registering sub device %s\n", + of_data->subdevs[i].name); } =20 dev_info(&pdev->dev, "Registered MPFS system controller\n"); @@ -183,8 +180,45 @@ static void mpfs_sys_controller_remove(struct platform= _device *pdev) mpfs_sys_controller_put(sys_controller); } =20 +static struct platform_device mpfs_subdevs[] =3D { + { + .name =3D "mpfs-rng", + .id =3D -1, + }, + { + .name =3D "mpfs-generic-service", + .id =3D -1, + }, + { + .name =3D "mpfs-auto-update", + .id =3D -1, + }, +}; + +static struct platform_device pic64gx_subdevs[] =3D { + { + .name =3D "mpfs-rng", + .id =3D -1, + }, + { + .name =3D "mpfs-generic-service", + .id =3D -1, + }, +}; + +static const struct mpfs_syscon_config mpfs_config =3D { + .nb_subdevs =3D ARRAY_SIZE(mpfs_subdevs), + .subdevs =3D mpfs_subdevs, +}; + +static const struct mpfs_syscon_config pic64gx_config =3D { + .nb_subdevs =3D ARRAY_SIZE(pic64gx_subdevs), + .subdevs =3D pic64gx_subdevs, +}; + static const struct of_device_id mpfs_sys_controller_of_match[] =3D { - {.compatible =3D "microchip,mpfs-sys-controller", }, + {.compatible =3D "microchip,mpfs-sys-controller", .data =3D &mpfs_config}, + {.compatible =3D "microchip,pic64gx-sys-controller", .data =3D &pic64gx_c= onfig}, {}, }; MODULE_DEVICE_TABLE(of, mpfs_sys_controller_of_match); --=20 2.51.0