From nobody Tue Dec 2 03:04:15 2025 Received: from sender4-pp-f112.zoho.com (sender4-pp-f112.zoho.com [136.143.188.112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2DD432C21DC for ; Mon, 17 Nov 2025 19:14:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.112 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763406877; cv=pass; b=j/h24Z6Y5P9hDIEFfxytVoNUCPVnVxZcrugI1C0l6S8ga1EbJk6E0n2T12jiKxIRMenJYDi8ZFhfvWpwU1wMVlPsrohuBeaNrvbxELGAaxO3goRA2ItVXYn07UINz+A+n8Mj+rfTYbz+naGxslAwnV+zcqsarsMCy7sEJms/9j8= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763406877; c=relaxed/simple; bh=JNw7Yxnug3gZjrcnucrUNDlqlikRaaSI02aCEv0bu0k=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=uZEvXWwhoZtTLFzuMDhYFEEdnV4ibHntKzAYI46woYrdKXOT8dGsdTCN2qTgpv7IRx5pyIsYPOfD7Gho9iV5kKfhWJWotHZrN6ma1qALbogR7dPKY3OYcsxZ7lr7zftJgwql5ar0O4jdnue4xulZNoPDd8K8A99SFuaCOmjmTTU= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b=ioq3WPZ3; arc=pass smtp.client-ip=136.143.188.112 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b="ioq3WPZ3" ARC-Seal: i=1; a=rsa-sha256; t=1763406792; cv=none; d=zohomail.com; s=zohoarc; b=l2Z9YU2Qx4LXBcqmfXAXidYR8D8Ehz9qJ5XAC9ZtGmFYqPMOrHlb20HyLM8gJjrbjKfxILty15G+a+cd3nSUfnoprbY2T+DFfLNEj8B9B1ws1my7TT4jSLBvPx0hvRO8wcvg14eu14sEe+t+iRKSkj7gih2mLvs18pD/gKYz3ds= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1763406792; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=+iE/ManLhmGTSkH12I8CLxBzRA3bTFGdYv4A4ZOK+f4=; b=BShcmcWFKxABlIXW9nRviIb/jl5OjITVLb1SL8tPJ7LZIgnM3czddUa+Dyx8Pr/FJix+ijnNEFSduA1zSMAcGSdzD1fviKtPrgvWUsnLlt8TqR9A820+ncO29BDcnW1HrdI6b653yoooedyx7I8CQNVdZEZx3pQXWf5xZv/GbxE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=nicolas.frattaroli@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1763406792; s=zohomail; d=collabora.com; i=nicolas.frattaroli@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:References:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=+iE/ManLhmGTSkH12I8CLxBzRA3bTFGdYv4A4ZOK+f4=; b=ioq3WPZ3sVaRZmrxYHIBNI+KxYSbmqGopIbhkBIXK6cNeO6hziw5OQd8UDA/nVl+ bD3wkf3reuIa6udiZGDGPetKMfssQeaZf5cUmbh8rxrJgTHNAYd6zcd3uPabnGTXNkp jmsBZAn/5/GvMll+bGWJzLICondLEAmxNbKViTn4= Received: by mx.zohomail.com with SMTPS id 176340679132120.01663921488671; Mon, 17 Nov 2025 11:13:11 -0800 (PST) From: Nicolas Frattaroli Date: Mon, 17 Nov 2025 20:11:52 +0100 Subject: [PATCH v4 08/10] drm/i915: Implement the "color format" DRM property Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251117-color-format-v4-8-0ded72bd1b00@collabora.com> References: <20251117-color-format-v4-0-0ded72bd1b00@collabora.com> In-Reply-To: <20251117-color-format-v4-0-0ded72bd1b00@collabora.com> To: Harry Wentland , Leo Li , Rodrigo Siqueira , Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Sandy Huang , =?utf-8?q?Heiko_St=C3=BCbner?= , Andy Yan , Jani Nikula , Rodrigo Vivi , Joonas Lahtinen , Tvrtko Ursulin Cc: kernel@collabora.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, Nicolas Frattaroli , Werner Sembach , Andri Yngvason , Marius Vlad X-Mailer: b4 0.14.3 This includes RGB, YUV420, YUV444 and Auto. Auto will pick RGB, unless the mode being asked for is YUV420-only, in which case it picks YUV420, with a fallback for RGB in place just as a last-ditch attempt. Should the explicitly requested color format not be supported by the sink, then an error is returned to userspace, so that it can make a better choice. Co-developed-by: Werner Sembach Signed-off-by: Werner Sembach Co-developed-by: Andri Yngvason Signed-off-by: Andri Yngvason Co-developed-by: Marius Vlad Signed-off-by: Marius Vlad Signed-off-by: Nicolas Frattaroli --- drivers/gpu/drm/i915/display/intel_connector.c | 19 ++++++++++ drivers/gpu/drm/i915/display/intel_connector.h | 2 ++ drivers/gpu/drm/i915/display/intel_display_types.h | 15 ++++++++ drivers/gpu/drm/i915/display/intel_dp.c | 42 +++++++++++++++++-= ---- drivers/gpu/drm/i915/display/intel_dp.h | 4 +++ drivers/gpu/drm/i915/display/intel_dp_mst.c | 37 +++++++++++++++++-- drivers/gpu/drm/i915/display/intel_hdmi.c | 40 ++++++++++++++++--= --- 7 files changed, 140 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_connector.c b/drivers/gpu/d= rm/i915/display/intel_connector.c index 913d90a7a508..3d563e12d3aa 100644 --- a/drivers/gpu/drm/i915/display/intel_connector.c +++ b/drivers/gpu/drm/i915/display/intel_connector.c @@ -40,6 +40,11 @@ #include "intel_hdcp.h" #include "intel_panel.h" =20 +static const u32 supported_colorformats =3D DRM_COLOR_FORMAT_AUTO | + DRM_COLOR_FORMAT_RGB444 | + DRM_COLOR_FORMAT_YCBCR444 | + DRM_COLOR_FORMAT_YCBCR420; + static void intel_connector_modeset_retry_work_fn(struct work_struct *work) { struct intel_connector *connector =3D container_of(work, typeof(*connecto= r), @@ -326,6 +331,13 @@ intel_attach_hdmi_colorspace_property(struct drm_conne= ctor *connector) drm_connector_attach_colorspace_property(connector); } =20 +void +intel_attach_hdmi_colorformat_property(struct drm_connector *connector) +{ + if (!drm_mode_create_hdmi_color_format_property(connector, supported_colo= rformats)) + drm_connector_attach_color_format_property(connector); +} + void intel_attach_dp_colorspace_property(struct drm_connector *connector) { @@ -333,6 +345,13 @@ intel_attach_dp_colorspace_property(struct drm_connect= or *connector) drm_connector_attach_colorspace_property(connector); } =20 +void +intel_attach_dp_colorformat_property(struct drm_connector *connector) +{ + if (!drm_mode_create_dp_color_format_property(connector, supported_colorf= ormats)) + drm_connector_attach_color_format_property(connector); +} + void intel_attach_scaling_mode_property(struct drm_connector *connector) { diff --git a/drivers/gpu/drm/i915/display/intel_connector.h b/drivers/gpu/d= rm/i915/display/intel_connector.h index 0aa86626e646..38401bc705e3 100644 --- a/drivers/gpu/drm/i915/display/intel_connector.h +++ b/drivers/gpu/drm/i915/display/intel_connector.h @@ -30,7 +30,9 @@ void intel_attach_force_audio_property(struct drm_connect= or *connector); void intel_attach_broadcast_rgb_property(struct drm_connector *connector); void intel_attach_aspect_ratio_property(struct drm_connector *connector); void intel_attach_hdmi_colorspace_property(struct drm_connector *connector= ); +void intel_attach_hdmi_colorformat_property(struct drm_connector *connecto= r); void intel_attach_dp_colorspace_property(struct drm_connector *connector); +void intel_attach_dp_colorformat_property(struct drm_connector *connector); void intel_attach_scaling_mode_property(struct drm_connector *connector); void intel_connector_queue_modeset_retry_work(struct intel_connector *conn= ector); void intel_connector_cancel_modeset_retry_work(struct intel_connector *con= nector); diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/g= pu/drm/i915/display/intel_display_types.h index 38702a9e0f50..b06fbe56cbbe 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -2206,6 +2206,21 @@ to_intel_frontbuffer(struct drm_framebuffer *fb) return fb ? to_intel_framebuffer(fb)->frontbuffer : NULL; } =20 +static inline __pure u32 +intel_output_format_to_drm_color_format(enum intel_output_format input) +{ + switch (input) { + case INTEL_OUTPUT_FORMAT_RGB: + return DRM_COLOR_FORMAT_RGB444; + case INTEL_OUTPUT_FORMAT_YCBCR444: + return DRM_COLOR_FORMAT_YCBCR444; + case INTEL_OUTPUT_FORMAT_YCBCR420: + return DRM_COLOR_FORMAT_YCBCR420; + } + + return DRM_COLOR_FORMAT_NONE; +} + /* * Conversion functions/macros from various pointer types to struct * intel_display pointer. diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915= /display/intel_dp.c index 0ec82fcbcf48..6fcd1f2dbefd 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1183,7 +1183,7 @@ dfp_can_convert(struct intel_dp *intel_dp, return false; } =20 -static enum intel_output_format +enum intel_output_format intel_dp_output_format(struct intel_connector *connector, enum intel_output_format sink_format) { @@ -3141,17 +3141,23 @@ intel_dp_compute_output_format(struct intel_encoder= *encoder, struct intel_connector *connector =3D intel_dp->attached_connector; const struct drm_display_info *info =3D &connector->base.display_info; const struct drm_display_mode *adjusted_mode =3D &crtc_state->hw.adjusted= _mode; - bool ycbcr_420_only; + u32 sink_format_drm; int ret; =20 - ycbcr_420_only =3D drm_mode_is_420_only(info, adjusted_mode); + if ((conn_state->color_format =3D=3D DRM_COLOR_FORMAT_YCBCR420 && + drm_mode_is_420_also(info, adjusted_mode)) || + drm_mode_is_420_only(info, adjusted_mode)) + crtc_state->sink_format =3D INTEL_OUTPUT_FORMAT_YCBCR420; + else if (conn_state->color_format =3D=3D DRM_COLOR_FORMAT_YCBCR444) + crtc_state->sink_format =3D INTEL_OUTPUT_FORMAT_YCBCR444; + else + crtc_state->sink_format =3D INTEL_OUTPUT_FORMAT_RGB; =20 - if (ycbcr_420_only && !connector->base.ycbcr_420_allowed) { + if (crtc_state->sink_format =3D=3D INTEL_OUTPUT_FORMAT_YCBCR420 && + !connector->base.ycbcr_420_allowed) { drm_dbg_kms(display->drm, - "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back= to RGB.\n"); + "YCbCr 4:2:0 mode requested but unsupported by connector. Trying RGB.\n= "); crtc_state->sink_format =3D INTEL_OUTPUT_FORMAT_RGB; - } else { - crtc_state->sink_format =3D intel_dp_sink_format(connector, adjusted_mod= e); } =20 crtc_state->output_format =3D intel_dp_output_format(connector, crtc_stat= e->sink_format); @@ -3159,6 +3165,11 @@ intel_dp_compute_output_format(struct intel_encoder = *encoder, ret =3D intel_dp_compute_link_config(encoder, crtc_state, conn_state, respect_downstream_limits); if (ret) { + /* + * If no valid link config can be found due to bandwidth constraints, + * degrade from RGB/YCbCr 4:4:4 to YCbCr 4:2:0 if permitted by + * the source and sink. + */ if (crtc_state->sink_format =3D=3D INTEL_OUTPUT_FORMAT_YCBCR420 || !connector->base.ycbcr_420_allowed || !drm_mode_is_420_also(info, adjusted_mode)) @@ -3169,9 +3180,22 @@ intel_dp_compute_output_format(struct intel_encoder = *encoder, crtc_state->sink_format); ret =3D intel_dp_compute_link_config(encoder, crtc_state, conn_state, respect_downstream_limits); + if (ret) + return ret; } =20 - return ret; + sink_format_drm =3D intel_output_format_to_drm_color_format(crtc_state->s= ink_format); + if (conn_state->color_format && + conn_state->color_format !=3D sink_format_drm && + conn_state->color_format !=3D DRM_COLOR_FORMAT_AUTO) { + drm_dbg_kms(display->drm, + "Unsupported color format %s (0x%x), sink has 0x%x\n", + drm_get_color_format_name(conn_state->color_format), + conn_state->color_format, sink_format_drm); + return -EINVAL; + } + + return 0; } =20 void @@ -6626,8 +6650,10 @@ intel_dp_add_properties(struct intel_dp *intel_dp, s= truct drm_connector *_connec if (intel_bios_encoder_is_lspcon(dp_to_dig_port(intel_dp)->base.devdata))= { drm_connector_attach_content_type_property(&connector->base); intel_attach_hdmi_colorspace_property(&connector->base); + intel_attach_hdmi_colorformat_property(&connector->base); } else { intel_attach_dp_colorspace_property(&connector->base); + intel_attach_dp_colorformat_property(&connector->base); } =20 if (intel_dp_has_gamut_metadata_dip(&dp_to_dig_port(intel_dp)->base)) diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915= /display/intel_dp.h index 200a8b267f64..a7492c97ac97 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -205,6 +205,10 @@ bool intel_dp_compute_config_limits(struct intel_dp *i= ntel_dp, void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, const struct drm_dp_desc *desc, bool is_branch, struct intel_connector *connector); +enum intel_output_format +intel_dp_output_format(struct intel_connector *connector, + enum intel_output_format sink_format); + bool intel_dp_has_gamut_metadata_dip(struct intel_encoder *encoder); =20 bool intel_dp_link_params_valid(struct intel_dp *intel_dp, int link_rate, diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/= i915/display/intel_dp_mst.c index 4c0b943fe86f..35f8db595e22 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -653,9 +653,11 @@ static int mst_stream_compute_config(struct intel_enco= der *encoder, to_intel_connector(conn_state->connector); const struct drm_display_mode *adjusted_mode =3D &pipe_config->hw.adjusted_mode; + const struct drm_display_info *info =3D &connector->base.display_info; struct link_config_limits limits; bool dsc_needed, joiner_needs_dsc; int num_joined_pipes; + u32 sink_format_drm; int ret =3D 0; =20 if (pipe_config->fec_enable && @@ -671,10 +673,36 @@ static int mst_stream_compute_config(struct intel_enc= oder *encoder, if (num_joined_pipes > 1) pipe_config->joiner_pipes =3D GENMASK(crtc->pipe + num_joined_pipes - 1,= crtc->pipe); =20 - pipe_config->sink_format =3D INTEL_OUTPUT_FORMAT_RGB; - pipe_config->output_format =3D INTEL_OUTPUT_FORMAT_RGB; + if ((conn_state->color_format =3D=3D DRM_COLOR_FORMAT_YCBCR420 && + drm_mode_is_420_also(info, adjusted_mode)) || + drm_mode_is_420_only(info, adjusted_mode)) + pipe_config->sink_format =3D INTEL_OUTPUT_FORMAT_YCBCR420; + else if (conn_state->color_format =3D=3D DRM_COLOR_FORMAT_YCBCR444) + pipe_config->sink_format =3D INTEL_OUTPUT_FORMAT_YCBCR444; + else + pipe_config->sink_format =3D INTEL_OUTPUT_FORMAT_RGB; + + if (pipe_config->sink_format =3D=3D INTEL_OUTPUT_FORMAT_YCBCR420 && + !connector->base.ycbcr_420_allowed) { + drm_dbg_kms(display->drm, + "YCbCr 4:2:0 mode requested but it's unsupported by connector. Trying R= GB.\n"); + pipe_config->sink_format =3D INTEL_OUTPUT_FORMAT_RGB; + } + + pipe_config->output_format =3D intel_dp_output_format(connector, pipe_con= fig->sink_format); pipe_config->has_pch_encoder =3D false; =20 + sink_format_drm =3D intel_output_format_to_drm_color_format(pipe_config->= sink_format); + if (conn_state->color_format && + conn_state->color_format !=3D sink_format_drm && + conn_state->color_format !=3D DRM_COLOR_FORMAT_AUTO) { + drm_dbg_kms(display->drm, + "Unsupported color format %s (0x%x), sink has 0x%x\n", + drm_get_color_format_name(conn_state->color_format), + conn_state->color_format, sink_format_drm); + return -EINVAL; + } + joiner_needs_dsc =3D intel_dp_joiner_needs_dsc(display, num_joined_pipes); =20 dsc_needed =3D joiner_needs_dsc || intel_dp->force_dsc_en || @@ -1660,6 +1688,11 @@ static int mst_topology_add_connector_properties(str= uct intel_dp *intel_dp, if (connector->base.max_bpc_property) drm_connector_attach_max_bpc_property(&connector->base, 6, 12); =20 + connector->base.color_format_property =3D + intel_dp->attached_connector->base.color_format_property; + if (connector->base.color_format_property) + intel_attach_dp_colorformat_property(&connector->base); + return drm_connector_set_path_property(&connector->base, pathprop); } =20 diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i9= 15/display/intel_hdmi.c index 908faf17f93d..adecee10cb4c 100644 --- a/drivers/gpu/drm/i915/display/intel_hdmi.c +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c @@ -2271,21 +2271,28 @@ static int intel_hdmi_compute_output_format(struct = intel_encoder *encoder, struct intel_connector *connector =3D to_intel_connector(conn_state->conn= ector); const struct drm_display_mode *adjusted_mode =3D &crtc_state->hw.adjusted= _mode; const struct drm_display_info *info =3D &connector->base.display_info; - bool ycbcr_420_only =3D drm_mode_is_420_only(info, adjusted_mode); + u32 sink_format_drm; + bool want_420; int ret; =20 - crtc_state->sink_format =3D - intel_hdmi_sink_format(crtc_state, connector, ycbcr_420_only); - - if (ycbcr_420_only && crtc_state->sink_format !=3D INTEL_OUTPUT_FORMAT_YC= BCR420) { - drm_dbg_kms(display->drm, - "YCbCr 4:2:0 mode but YCbCr 4:2:0 output not possible. Falling back= to RGB.\n"); - crtc_state->sink_format =3D INTEL_OUTPUT_FORMAT_RGB; + if (conn_state->color_format =3D=3D DRM_COLOR_FORMAT_YCBCR444) + crtc_state->sink_format =3D INTEL_OUTPUT_FORMAT_YCBCR444; + else { + want_420 =3D ((conn_state->color_format =3D=3D DRM_COLOR_FORMAT_YCBCR420= && + drm_mode_is_420(info, adjusted_mode)) || + drm_mode_is_420_only(info, adjusted_mode)); + crtc_state->sink_format =3D intel_hdmi_sink_format(crtc_state, connector, + want_420); } =20 crtc_state->output_format =3D intel_hdmi_output_format(crtc_state); ret =3D intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream_= limits); if (ret) { + /* + * If no valid link config can be found due to bandwidth constraints, + * degrade from RGB/YCbCr 4:4:4 to YCbCr 4:2:0 if permitted by + * the source and sink. + */ if (crtc_state->sink_format =3D=3D INTEL_OUTPUT_FORMAT_YCBCR420 || !crtc_state->has_hdmi_sink || !connector->base.ycbcr_420_allowed || @@ -2295,6 +2302,19 @@ static int intel_hdmi_compute_output_format(struct i= ntel_encoder *encoder, crtc_state->sink_format =3D INTEL_OUTPUT_FORMAT_YCBCR420; crtc_state->output_format =3D intel_hdmi_output_format(crtc_state); ret =3D intel_hdmi_compute_clock(encoder, crtc_state, respect_downstream= _limits); + if (ret) + return ret; + } + + sink_format_drm =3D intel_output_format_to_drm_color_format(crtc_state->s= ink_format); + if (conn_state->color_format && + conn_state->color_format !=3D sink_format_drm && + conn_state->color_format !=3D DRM_COLOR_FORMAT_AUTO) { + drm_dbg_kms(display->drm, + "Unsupported color format %s (0x%x), current sink color format 0x%x= \n", + drm_get_color_format_name(conn_state->color_format), + conn_state->color_format, sink_format_drm); + ret =3D -EINVAL; } =20 return ret; @@ -2690,8 +2710,10 @@ intel_hdmi_add_properties(struct intel_hdmi *intel_h= dmi, struct drm_connector *_ if (DISPLAY_VER(display) >=3D 10) drm_connector_attach_hdr_output_metadata_property(&connector->base); =20 - if (!HAS_GMCH(display)) + if (!HAS_GMCH(display)) { drm_connector_attach_max_bpc_property(&connector->base, 8, 12); + intel_attach_hdmi_colorformat_property(&connector->base); + } } =20 /* --=20 2.51.2