From nobody Sun Feb 8 22:06:31 2026 Received: from mail-ed1-f52.google.com (mail-ed1-f52.google.com [209.85.208.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F34B42FF644 for ; Sat, 15 Nov 2025 14:14:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763216060; cv=none; b=WSosFQ32V5ikJT16LaSlRXwYdlm6doij6xN7AE6IXxxn4FWn65KiG518Bv8XTguLjzw6nOoKz47tlkFkQxiyhThM5/jXzgg+pXOVCfd4U+VcQHKHEPK7a3RzH4jad18MWuOvKvc0Psro9fawFnRPceezveHfRixpqU2iTRsJa7k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763216060; c=relaxed/simple; bh=GwnvL5vMWVsQ51UjbmyDs3QGAPhCZplv1N6Us1qfLHA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=e6yrK9/5Yzrkr4lOp6Qov7i07nQ9y0HLJVbnWl6G+6OO/H8gRhZQcd29V1rvfCRML9k/VbKWHkbJkxD4PH4MPnYcDqFWdv6EA8A33ZqWadUJXlM/j/OxdmjxRL+pZyRXwZ0C1mRpRTaAXKce2bVpU7PzxFIwyMZEi/kGQb1GP0U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=aUW0NWkb; arc=none smtp.client-ip=209.85.208.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="aUW0NWkb" Received: by mail-ed1-f52.google.com with SMTP id 4fb4d7f45d1cf-640a0812658so4713728a12.0 for ; Sat, 15 Nov 2025 06:14:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1763216057; x=1763820857; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=UciMie+UNtQ6Be5Ygq/FZ+wB93JKP9NGMjXOu78hOHU=; b=aUW0NWkbYhHNof6Y4L6JNctvdn+3Wv8vaFSaScuL4M3TpyUj6D5/vFgDHW5RxCjeZA 8MYIoClQ62EZK6rUg6iOXV6VdpWayBEYqgY7KVHVE6qTNz82Zx0CdMZpEFGiXXjPhULp 2PPdVZMDE0xFwxdqa8OVzbEzd6k1BNdAB6XXw1+HsXnk2YJaTFcPpMs5CTVRyl2SBiCj A/hMKcPCTAMDtsbTckeui0ev41ppayE66NGfTRrDZ7E3txYNlctUCEpZ0QuhkCefY3zw 9246YuqKl505Hjz+TXZBuikXn/W0XJ0MD09UxCGbHqeEoLVWmyodBgcgRrlY2bwI4dKq 8Piw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1763216057; x=1763820857; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=UciMie+UNtQ6Be5Ygq/FZ+wB93JKP9NGMjXOu78hOHU=; b=ViTH3zn2osiilfBX9Tu6WlhAs9pdDBrG4PVxfxSpb9Ou9GSG9UQ1IGki6kWQKQVPWW flpFwgf8JSbxF2nyL25gQYOukCnC5a3FcS7dnMmmSA9EYRipDbL94ZFIzCPKBW666VNG 3PWyOEmyRlHC8Lh8Nmrc9GjuTiDAYY6d+iNcbkdSnGOMi1Nfw/1wq8YgEdNk+sotHccu eafAqagVgPu87dLn8Rb3i917pV+DerOZPxoEVUzp8VZXwi8g2qv4Nzw1DbSgsxadZnTC 8jaaVhZs0E0E1g2fA66E4wja+uTuPbdOL0PlHlOcxF2bH7kM2FiYGtPq3YUwl+bgg04u UkTg== X-Forwarded-Encrypted: i=1; AJvYcCU1SOfN0ArD2ERgezD1NPu1v855DQTEQ4QfWwgLLs3hfD1V3QysZuPLunwlqY8iJUI39MBQI6qZL/FIRak=@vger.kernel.org X-Gm-Message-State: AOJu0Yy1xdG7uTRtds4FfXRfpWWfEG1T6o4M/P7Eeb4nmA7OKVUivZRz 61A8qm+iDN6w+aYPmQlmfPRsTXnu2xnljsDSc9cyrZzalURyfJ2wjZsl X-Gm-Gg: ASbGnctvYx0sBZqBfck2XZupm88M66EowGDP4JTlryFc+44oQWDXtu+kc9ZaFixR+OX OSIW+4gYLa2FkFoDE9EVf7amL/PafTmQi5iAQG50sJQvpac5qxGB0oBHbQrvsqoJpBb/E6bfD2R EFjtP2t82l7zZ0l7Hs7ScVdiweedGjoboEQ+D7OuAhiyEPUIDpbIrhtGqGmF9x0ZCgzWnh4KNhk 7l8IyCp4BhDC7/OjOzU83ILilkIikz37nYEnjJ0gjz0hYEvjnpe/yauw+Cfwty7k6ijZRK8/DJ1 qbpO3qLu0U63UoCd23V7g/gEfTPDNyUBmrd+YYfiL7NcuxWb7LP+8TL0sTkMu8h4kt7pD2Wrk5o HzEesKyHgOb8fTYUvW5obwI5i4jT17gAOoSpXhDvzzgETuQ6FSKWwfalu5MDMVd+nF8DXkcqb8G XfJVcFA0RebKWrsOGm+ZIYqHGB/317PyF5Xv8YFwSGIa/SMs9Jyc7iR0qQ X-Google-Smtp-Source: AGHT+IHK6phfJOgzf+aqpzFKPTHMjqJZ4C/vVBwN+Y+khMKq+c5K63YPI1+yGx5o9/adAsErm3Oq3Q== X-Received: by 2002:a17:906:490c:b0:b73:6ca8:b81f with SMTP id a640c23a62f3a-b736ca8bbf7mr534553666b.51.1763216057167; Sat, 15 Nov 2025 06:14:17 -0800 (PST) Received: from jernej-laptop (178-79-73-218.dynamic.telemach.net. [178.79.73.218]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b734fda933fsm606189866b.56.2025.11.15.06.14.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 15 Nov 2025 06:14:16 -0800 (PST) From: Jernej Skrabec To: wens@csie.org, samuel@sholland.org Cc: mripard@kernel.org, maarten.lankhorst@linux.intel.com, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Jernej Skrabec Subject: [PATCH 3/7] clk: sunxi-ng: de2: Export register regmap for DE33 Date: Sat, 15 Nov 2025 15:13:43 +0100 Message-ID: <20251115141347.13087-4-jernej.skrabec@gmail.com> X-Mailer: git-send-email 2.51.2 In-Reply-To: <20251115141347.13087-1-jernej.skrabec@gmail.com> References: <20251115141347.13087-1-jernej.skrabec@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" DE33 clock pre-set plane mapping, which is not something that we want from clock driver. Export registers instead, so DRM driver can set them properly. Signed-off-by: Jernej Skrabec --- drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 53 ++++++++++++++++++++++++++-- 1 file changed, 50 insertions(+), 3 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c b/drivers/clk/sunxi-ng/cc= u-sun8i-de2.c index a6cd0f988859..2841ec922025 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c @@ -6,9 +6,11 @@ #include #include #include +#include #include #include #include +#include #include =20 #include "ccu_common.h" @@ -250,6 +252,41 @@ static const struct sunxi_ccu_desc sun50i_h616_de33_cl= k_desc =3D { .num_resets =3D ARRAY_SIZE(sun50i_h5_de2_resets), }; =20 +/* + * Add a regmap for the DE33 plane driver to access plane + * mapping registers. + * Only these registers are allowed to be written, to prevent + * overriding clock and reset configuration. + */ + +#define SUN50I_DE33_CHN2CORE_REG 0x24 +#define SUN50I_DE33_PORT02CHN_REG 0x28 +#define SUN50I_DE33_PORT12CHN_REG 0x2c + +static bool sun8i_de2_ccu_regmap_accessible_reg(struct device *dev, + unsigned int reg) +{ + switch (reg) { + case SUN50I_DE33_CHN2CORE_REG: + case SUN50I_DE33_PORT02CHN_REG: + case SUN50I_DE33_PORT12CHN_REG: + return true; + default: + return false; + } +} + +static const struct regmap_config sun8i_de2_ccu_regmap_config =3D { + .reg_bits =3D 32, + .val_bits =3D 32, + .reg_stride =3D 4, + .max_register =3D 0xe0, + + /* other devices have no business accessing other registers */ + .readable_reg =3D sun8i_de2_ccu_regmap_accessible_reg, + .writeable_reg =3D sun8i_de2_ccu_regmap_accessible_reg, +}; + static int sunxi_de2_clk_probe(struct platform_device *pdev) { struct clk *bus_clk, *mod_clk; @@ -303,13 +340,23 @@ static int sunxi_de2_clk_probe(struct platform_device= *pdev) } =20 /* - * The DE33 requires these additional (unknown) registers set + * The DE33 requires these additional plane mapping registers set * during initialisation. */ if (of_device_is_compatible(pdev->dev.of_node, "allwinner,sun50i-h616-de33-clk")) { - writel(0, reg + 0x24); - writel(0x0000a980, reg + 0x28); + struct regmap *regmap; + + regmap =3D devm_regmap_init_mmio(&pdev->dev, reg, + &sun8i_de2_ccu_regmap_config); + if (IS_ERR(regmap)) { + ret =3D PTR_ERR(regmap); + goto err_assert_reset; + } + + ret =3D of_syscon_register_regmap(pdev->dev.of_node, regmap); + if (ret) + goto err_assert_reset; } =20 ret =3D devm_sunxi_ccu_probe(&pdev->dev, reg, ccu_desc); --=20 2.51.2