From nobody Sat Feb 7 22:34:27 2026 Received: from out-177.mta0.migadu.com (out-177.mta0.migadu.com [91.218.175.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C28581DED42 for ; Fri, 14 Nov 2025 18:53:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.177 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763146437; cv=none; b=HCwB31X1hik3DJTD+ish7tmwUQSFSULWu64BgkzeldEU0Qdq4yUNrBWsLVqJ6H4SJpw93PTpkvgKyfPFicVm+woM3m4o3zgHFc5fuBUdgaYw2fKlJZZoaglN3rW5HG+vGmSS40j7QtRMbL0d4IAxnRxN93xulK50M0JYC/YJInQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763146437; c=relaxed/simple; bh=Z1KI1c9HE6KmH41eHNkiwd0JeitvaLgIx/2SEZ1HDBE=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=SWKqd96iGbCenKZWZbvUbVzL5YN7elQRC1j0GKF7JoITbs/fu6TfiD9E2zY8dWXC36n5BqgU39MXIcw94dIck4XoIHSg2/7e5+F5JOTIhUzX1b5zEU3fvE6tqs4ahODfISNt6hUedpjxGKx3COpFnnohcPed3BpUkMhGlC0Tb4A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=ex8IEGWx; arc=none smtp.client-ip=91.218.175.177 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="ex8IEGWx" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1763146422; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=F7X+TXzz6yIsYy6VK9GhVIkXx5eCXlbgBNwS3nhB3Rc=; b=ex8IEGWx/W7K4QbrrN/Dehv1WtYeXbdjKnIndNigKeo851KgPzGhxFZjY6PpuB/z0/J5I7 YVLRY2dMA/iBVXiByrZyu0RId12PLwB+xoyCJMPmuAA5aw/UmKmIJHOSlKVzXuAtA+h/9M 3+d0Hsaszbfop0VwHPheV/wlY7H5ZEo= From: Denis Benato To: linux-kernel@vger.kernel.org Cc: platform-driver-x86@vger.kernel.org, "Hans de Goede" , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , "Limonciello, Mario" , "Luke D . Jones" , "Alok Tiwari" , "Derek John Clark" , "Mateusz Schyboll" , porfet828@gmail.com, "Denis Benato" , Denis Benato Subject: [PATCH] platform/x86: asus-armoury: do not abort probe on unexpected CPU cores count Date: Fri, 14 Nov 2025 19:53:37 +0100 Message-ID: <20251114185337.578959-1-denis.benato@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Until now the CPU cores count was only available for Intel hardware, however a few weeks ago an AMD hardware that provides aforementioned interface appeared on the market and data read from the interface doesn't follow the expected format and the driver fails to probe. Avoid failing on invalid cores count and print out debug information. Signed-off-by: Denis Benato --- drivers/platform/x86/asus-armoury.c | 34 ++++++++++++++++++++++++----- 1 file changed, 29 insertions(+), 5 deletions(-) diff --git a/drivers/platform/x86/asus-armoury.c b/drivers/platform/x86/asu= s-armoury.c index 9f67218ecd14..6355ec3e253f 100644 --- a/drivers/platform/x86/asus-armoury.c +++ b/drivers/platform/x86/asus-armoury.c @@ -818,10 +818,23 @@ static struct cpu_cores *init_cpu_cores_ctrl(void) cores_p->min_power_cores =3D CPU_POWR_CORE_COUNT_MIN; cores_p->min_perf_cores =3D CPU_PERF_CORE_COUNT_MIN; =20 + if (cores_p->min_perf_cores > cores_p->max_perf_cores) { + pr_err("Invalid CPU performance cores count detected: min: %u, max: %u, = current: %u\n", + cores_p->min_perf_cores, + cores_p->max_perf_cores, + cores_p->cur_perf_cores + ); + return ERR_PTR(-EINVAL); + } + if ((cores_p->min_perf_cores > cores_p->max_perf_cores) || (cores_p->min_power_cores > cores_p->max_power_cores) ) { - pr_err("Invalid CPU cores count detected: interface is not safe to be us= ed.\n"); + pr_err("Invalid CPU efficiency cores count detected: min: %u, max: %u, c= urrent: %u\n", + cores_p->min_power_cores, + cores_p->max_power_cores, + cores_p->cur_power_cores + ); return ERR_PTR(-EINVAL); } =20 @@ -841,6 +854,11 @@ static ssize_t cores_value_show(struct kobject *kobj, = struct kobj_attribute *att { u32 cpu_core_value; =20 + if (asus_armoury.cpu_cores =3D=3D NULL) { + pr_err("CPU core control interface was not initialized.\n"); + return -ENODEV; + } + switch (core_value) { case CPU_CORE_DEFAULT: case CPU_CORE_MAX: @@ -875,6 +893,11 @@ static ssize_t cores_current_value_store(struct kobjec= t *kobj, struct kobj_attri if (result) return result; =20 + if (asus_armoury.cpu_cores =3D=3D NULL) { + pr_err("CPU core control interface was not initialized.\n"); + return -ENODEV; + } + scoped_guard(mutex, &asus_armoury.cpu_core_mutex) { if (!asus_armoury.cpu_cores_changeable) { pr_warn("CPU core count change not allowed until reboot\n"); @@ -1389,16 +1412,17 @@ static int __init asus_fw_init(void) return -ENODEV; =20 asus_armoury.cpu_cores_changeable =3D false; + asus_armoury.cpu_cores =3D NULL; if (armoury_has_devstate(ASUS_WMI_DEVID_CORES_MAX)) { cpu_cores_ctrl =3D init_cpu_cores_ctrl(); if (IS_ERR(cpu_cores_ctrl)) { err =3D PTR_ERR(cpu_cores_ctrl); pr_err("Could not initialise CPU core control: %d\n", err); - return err; + } else { + pr_debug("CPU cores control available.\n"); + asus_armoury.cpu_cores =3D cpu_cores_ctrl; + asus_armoury.cpu_cores_changeable =3D true; } - - asus_armoury.cpu_cores =3D cpu_cores_ctrl; - asus_armoury.cpu_cores_changeable =3D true; } =20 init_rog_tunables(); --=20 2.51.2