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(unknown [IPv6:2a04:cec0:122b:2b8b:6420:6800:bae7:cb5a]) (Authenticated sender: michael.opdenacker@rootcommit.com) by smtp.hostinger.com (smtp.hostinger.com) with ESMTPSA id 4d7M2B2nLGz3wpH; Fri, 14 Nov 2025 15:46:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rootcommit.com; s=hostingermail-a; t=1763135207; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xUnAch7ahn0XdLMBa77XE5dbI/7gL7z6PUFVrXkOJaw=; b=ClkccDxDUUiVrStw80MnQROHq37Tpa1WI2p3gyk5iOjBESkQueqV0aDiYJn7hp4VHkWNa2 UTZTyCUbbGPYg08thy959QbkzvXT2nGw0iz+TeD/SzfgcR8rToNmJ7UsOARvd+8eMf4P5O 2rN/pb6aGB4AyGJ+o9u+TLtW9v8vBcvEcB9Xbmt50+vl+2sMt+Bri0L/uw/sRZ1ZJnZBIj eLl7rxriRPIWO/XzZSwOPECiSp2aI9yaa0DnSMYW6Ae6tKynV83QEUlNTMI5xv87gNjl3v 7ExaCDiTdftdqCBQikimaFRKn+sKSeFIwlFS1p9Z6jKpAOf0KyFrgusRQoQFEA== From: michael.opdenacker@rootcommit.com To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, dsimic@manjaro.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Opdenacker Subject: [PATCH v2 1/2] dt-bindings: arm: rockchip: Add Asus Tinker Board 3 and 3S Message-ID: <20251114154617.69950-2-michael.opdenacker@rootcommit.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251114154617.69950-1-michael.opdenacker@rootcommit.com> References: <20251114154617.69950-1-michael.opdenacker@rootcommit.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Date: Fri, 14 Nov 2025 15:46:42 +0000 (UTC) X-CM-Envelope: MS4xfMvocJ+nhBybcd3By4mor4/LL+Ui+HaHwc9SgtrBjJ38xxqOuIHVkJGm3HaVcO2KjTV1VUxDilGCNApK77qe1OJCdc9/cF1VdcKF/4bBc+FUfp7Bx45K H0OGYFNDEMmZ+gGl+gHQOzSZak3dvPk9bAeCakX7/Y0OAViwweR7h4vjTkeSZodqbNA/G5/QQf1YaefX3ak1Zdr0pw5vbE2VUKx2os9pZPmZPpHJX0D9aWfB 8reZRyUUsQamnbM2wcP0ng9AQd4Lm6IuDh+bTxCUNqvFadz02Kb7ZteDLBdMrAK34efNSKjHiO5nES8S/668ZfpHj//Zc05Egm/iheFLjuJTHNBliszErNSO n7ZDtOgz7EA7MXZtKHXzqdXIB4/ssagAbo5fts8/o+fZb3VIqyede9wW+6USI0S0LqVD21yEeGGXG6BjQKJ2pcrmw72Pqo7b4ZZF8P/WcHEB5TJ/R53SD9xQ a2LGrllI0+fP/cN1OR0sQWzy4ACliOhwmp++MTpfzcYwNMO9v7zsAnMQyvuAxKcbQUJIBMj59NNPGueRQqGYgnJXcxL8J5xQ9LJhie3opFto1IhB1PmowVJt wri80mmsY6L1foAj0iKuQ6Dg X-CM-Analysis: v=2.4 cv=ALriHGRn c=1 sm=1 tr=0 ts=69174ee7 a=xg8E7M7z/s+QKb9omSVFuA==:617 a=xqWC_Br6kY4A:10 a=-Yt9tNsTAAAA:8 a=d70CFdQeAAAA:8 a=3JIPYtb0mk-80_rjy1QA:9 a=qPQde0g9OtMA:10 a=HTceBwxjnJgA:10 a=NcxpMcIZDGm-g932nG_k:22 X-AuthUser: michael.opdenacker@rootcommit.com Content-Type: text/plain; charset="utf-8" From: Michael Opdenacker Document the compatible strings for Asus Tinker Board 3 [1] and 3S [2], which are SBCs based on the Rockchip 3566 SoC. The "3S" version ("S" for "storage") just adds a 16 GB eMMC and a "mask ROM" DIP switch to the "3" version. [1] https://tinker-board.asus.com/series/tinker-board-3.html [2] https://tinker-board.asus.com/series/tinker-board-3s.html Signed-off-by: Michael Opdenacker --- Documentation/devicetree/bindings/arm/rockchip.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Document= ation/devicetree/bindings/arm/rockchip.yaml index 6aceaa8acbb2..cd249325a4d9 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -86,6 +86,17 @@ properties: - const: asus,rk3288-tinker-s - const: rockchip,rk3288 =20 + - description: Asus Tinker Board 3 + items: + - const: asus,rk3566-tinker-board-3 + - const: rockchip,rk3566 + + - description: Asus Tinker Board 3S + items: + - const: asus,rk3566-tinker-board-3s + - const: asus,rk3566-tinker-board-3 + - const: rockchip,rk3566 + - description: Beelink A1 items: - const: azw,beelink-a1 From nobody Sat Feb 7 17:55:42 2026 Received: from giant.ash.relay.mailchannels.net (giant.ash.relay.mailchannels.net [23.83.222.68]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6F4212FC874; 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(unknown [IPv6:2a04:cec0:122b:2b8b:6420:6800:bae7:cb5a]) (Authenticated sender: michael.opdenacker@rootcommit.com) by smtp.hostinger.com (smtp.hostinger.com) with ESMTPSA id 4d7M2S0cLCz3wmT; Fri, 14 Nov 2025 15:46:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rootcommit.com; s=hostingermail-a; t=1763135217; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=QQbIfX/e7L2Hjji4hrnqJhqqQ8Tj+/C9kUGfqZBFGkc=; b=WrJUGJzn0Vx7KWnqS3KpX4cYIooaz0EFI/lLceQQ7Tmlu2IhED/dBnlXL04uaJ0B8kVRo8 2JgS1vlH+cXaOSGxd+QiKcCCJxQVW7KHUsGuFnHI/wEDbuKfl1aa92DLNt37EO1AvlRfhn QA34A81MHG6A5Jrikrq2AsBIqtI0bBvK49AZvscHisd02kLmJEBjtoHEj626AX+aQVp1u5 YQRVFcgeXVoz/K8RvCEQ0NNPa/MoWZaGya48ixTFOdvUgyTyjh3KCqcO37+SXHNqbVHkWm 1KIntLd2G5vEu++n+XTmJnE4KUrhOZ9U2DSHxSYGvKdzP1JYPc+eR+mgkj4NxA== From: michael.opdenacker@rootcommit.com To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, dsimic@manjaro.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Opdenacker Subject: [PATCH v2 2/2] arm64: dts: rockchip: Add Asus Tinker Board 3 and 3S device tree Message-ID: <20251114154617.69950-3-michael.opdenacker@rootcommit.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251114154617.69950-1-michael.opdenacker@rootcommit.com> References: <20251114154617.69950-1-michael.opdenacker@rootcommit.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Date: Fri, 14 Nov 2025 15:46:56 +0000 (UTC) X-CM-Envelope: MS4xfN8CS5sYzq7r8E4i3ACUJTjxxcQCP6oV3/sYP5W0Qx1GIhJ/ZUWFNrdno5Gp+2kb9MqrGomO7ULHFJdLv1c2YzM76PqeFD9ETVBkJIiOw5P/yPiIFttS hfqzzdFdR4qj1LwGvl5QeijWNAWzhEbtLtv4ypNkmy2BNy5dW6mG5dX3RIAAKzuf0uL9Z+uHgy+xYNfV8psAlBLuEHm5kH0PmZc+ZZ3IPmcD4kcQctYGX+ql Ek3zhcLFn9hs2c6siH7gfrKH3m/F54T7vwZd7bJW+yfgLgWxWH4468xhQHRPBmarj9iVyKWte2H1vzxbyefM7byVUVek1Y/BSyszmlOmX1wuF4KGZhJ5VxQw tqwkeUMX1oFXg0CDUOL/VQ/yUnrrsK4yqK3F6lqMLAPiXuR4zXWwS9EYwa6jkTKlN+PZcebwpW4SViMazfsPTHcBz0wClaSoL1+0YXBL2qqQfe0GLcwywoau cPHesTB4Vz9zEzdMVAz9NumMufDonD69u2InR9D2VfS/dofyFjNF79rw05AWIV4nhuVVEH864IqTcTD29uatTgmoXf6iOIBswva7geoopLlh7heMUQ5CMO0O VmaArT0rSbrrPetds+6A/uZp X-CM-Analysis: v=2.4 cv=Ceda56rl c=1 sm=1 tr=0 ts=69174ef0 a=xg8E7M7z/s+QKb9omSVFuA==:617 a=xqWC_Br6kY4A:10 a=-Yt9tNsTAAAA:8 a=d70CFdQeAAAA:8 a=UExLb9lNAcT1OAPvKMMA:9 a=qPQde0g9OtMA:10 a=HTceBwxjnJgA:10 a=NcxpMcIZDGm-g932nG_k:22 X-AuthUser: michael.opdenacker@rootcommit.com Content-Type: text/plain; charset="utf-8" From: Michael Opdenacker Add initial device tree support for Asus Tinker Board 3 [1] and 3S [2], which are SBCs based on the Rockchip 3566 SoC. The "3S" version ("S" for "storage") just adds a 16 GB eMMC and a "mask ROM" DIP switch (to mask the eMMC and enter "Mask ROM" mode for recovery) to the "3" version. This adds support for: - Debug UART (/dev/ttyS2) - SD card (/dev/mmcblk1) - eMMC (/dev/mmcblk0, only on Tinker Board 3S) - I2C: - i2c0 (internal bus with a PMIC and regulators) - i2c2 (internal bus with an at24 eeprom and an RTC device) - USB 2.0 ports - 2 GPIO LEDS [1] https://tinker-board.asus.com/series/tinker-board-3.html [2] https://tinker-board.asus.com/series/tinker-board-3s.html Signed-off-by: Michael Opdenacker --- arch/arm64/boot/dts/rockchip/Makefile | 2 + .../dts/rockchip/rk3566-tinker-board-3.dts | 14 + .../dts/rockchip/rk3566-tinker-board-3.dtsi | 280 ++++++++++++++++++ .../dts/rockchip/rk3566-tinker-board-3s.dts | 30 ++ 4 files changed, 326 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-tinker-board-3.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-tinker-board-3.dtsi create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-tinker-board-3s.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index ad684e3831bc..e0d8b9ed176d 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -130,6 +130,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-lubancat-1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-nanopi-r3s.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-bigtreetech-cb2-manta.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-bigtreetech-pi2.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-tinker-board-3.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-tinker-board-3s.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-bpi-r2-pro.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-evb1-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-fastrhino-r66s.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3566-tinker-board-3.dts b/arch/= arm64/boot/dts/rockchip/rk3566-tinker-board-3.dts new file mode 100644 index 000000000000..af11faff5564 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-tinker-board-3.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2025 Michael Opdenacker + */ + +/dts-v1/; + +#include "rk3566-tinker-board-3.dtsi" + +/ { + model =3D "Asus Tinker Board 3"; + compatible =3D "asus,rk3566-tinker-board-3", "rockchip,rk3566"; +}; + diff --git a/arch/arm64/boot/dts/rockchip/rk3566-tinker-board-3.dtsi b/arch= /arm64/boot/dts/rockchip/rk3566-tinker-board-3.dtsi new file mode 100644 index 000000000000..8544d56031f2 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-tinker-board-3.dtsi @@ -0,0 +1,280 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2025 Michael Opdenacker + */ + +#include +#include +#include +#include +#include "rk3566.dtsi" + +/ { + aliases { + i2c0 =3D &i2c0; + i2c2 =3D &i2c2; + mmc1 =3D &sdmmc0; + serial2 =3D &uart2; + }; + + chosen { + stdout-path =3D "serial2:1500000n8"; + }; + + gpio_leds: gpio-leds { + compatible =3D "gpio-leds"; + + act-led { + gpios =3D <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; + linux,default-trigger=3D"mmc1"; + }; + + rsv-led { + gpios =3D <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; + linux,default-trigger=3D"none"; + }; + }; + + vcc3v3_sys: regulator-3v3-vcc-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc5v0_sys: regulator-5v0-vcc-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + }; + + vcc5v0_usb_host: regulator-5v0-vcc-usb-host { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb_host_pwren_h>; + regulator-name =3D "vcc5v0_usb_host"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc5v0_sys>; + }; +}; + +&cpu0 { + cpu-supply =3D <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply =3D <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply =3D <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply =3D <&vdd_cpu>; +}; + +&i2c0 { + status =3D "okay"; + + rk809: pmic@20 { + compatible =3D "rockchip,rk809"; + reg =3D <0x20>; + assigned-clocks =3D <&cru I2S1_MCLKOUT_TX>; + assigned-clock-parents =3D <&cru CLK_I2S1_8CH_TX>; + #clock-cells =3D <1>; + clocks =3D <&cru I2S1_MCLKOUT_TX>; + clock-names =3D "mclk"; + clock-output-names =3D "rk809-clkout1", "rk809-clkout2"; + interrupt-parent =3D <&gpio0>; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pmic_int_l>, <&i2s1m0_mclk>; + #sound-dai-cells =3D <0>; + system-power-controller; + wakeup-source; + + vcc1-supply =3D <&vcc3v3_sys>; + vcc2-supply =3D <&vcc3v3_sys>; + vcc3-supply =3D <&vcc3v3_sys>; + vcc4-supply =3D <&vcc3v3_sys>; + vcc5-supply =3D <&vcc3v3_sys>; + vcc6-supply =3D <&vcc3v3_sys>; + vcc7-supply =3D <&vcc3v3_sys>; + vcc8-supply =3D <&vcc3v3_sys>; + vcc9-supply =3D <&vcc3v3_sys>; + + regulators { + vcc_1v8: DCDC_REG5 { + regulator-name =3D "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-name =3D "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-name =3D "vcc3v3_sd"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name =3D "vccio_sd"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; + + vdd_cpu: regulator@40 { + compatible =3D "silergy,syr827"; + reg =3D <0x40>; + fcs,suspend-voltage-selector =3D <1>; + regulator-name =3D "vdd_cpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <830000>; + regulator-max-microvolt =3D <1200000>; + regulator-ramp-delay =3D <2300>; + vin-supply =3D <&vcc3v3_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c2 { + status =3D "okay"; + + eeprom@50 { + compatible =3D "atmel,24c08"; + reg =3D <0x50>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&tb3_eeprom>; + status =3D "okay"; + }; + + rtc_isl1208: rtc@6f { + compatible =3D "isil,isl1208"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_externalrtc_reg>; + interrupt-names =3D "irq"; + interrupts-extended =3D <&gpio0 RK_PD3 IRQ_TYPE_EDGE_FALLING>; + reg =3D <0x6f>; + status =3D "okay"; + }; +}; + +&pinctrl { + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins =3D <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + usb { + usb_host_pwren_h: usb-host-pwren-h { + rockchip,pins =3D <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + usb_otg_pwren_h: usb-otg-pwren-h { + rockchip,pins =3D <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + rtc { + pinctrl_externalrtc_reg: externalrtcreggrp { + rockchip,pins =3D <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + eeprom { + tb3_eeprom: tb3-eeprom { + rockchip,pins =3D <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&sdmmc0 { + bus-width =3D <4>; + cap-sd-highspeed; + disable-wp; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + vmmc-supply =3D <&vcc3v3_sd>; + vqmmc-supply =3D <&vccio_sd>; + status =3D "okay"; +}; + +&uart2 { + status =3D "okay"; +}; + +&usb_host0_ehci { + status =3D "okay"; +}; + +&usb_host0_ohci { + status =3D "okay"; +}; + +&usb_host1_ehci { + status =3D "okay"; +}; + +&usb_host1_ohci { + status =3D "okay"; +}; + +&usb2phy0 { + status =3D "okay"; +}; + +&usb2phy0_host { + phy-supply =3D <&vcc5v0_usb_host>; + status =3D "okay"; +}; + +&usb2phy1 { + status =3D "okay"; +}; + +&usb2phy1_host { + phy-supply =3D <&vcc5v0_usb_host>; + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3566-tinker-board-3s.dts b/arch= /arm64/boot/dts/rockchip/rk3566-tinker-board-3s.dts new file mode 100644 index 000000000000..7bd1e31fdc57 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3566-tinker-board-3s.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2025 Michael Opdenacker + */ + +/dts-v1/; + +#include "rk3566-tinker-board-3.dtsi" + +/ { + model =3D "Asus Tinker Board 3S"; + compatible =3D "asus,rk3566-tinker-board-3s", "asus,rk3566-tinker-board-3= ", "rockchip,rk3566"; + + aliases { + mmc0 =3D &sdhci; + }; +}; + +&sdhci { + bus-width =3D <8>; + cap-mmc-highspeed; + max-frequency =3D <200000000>; + mmc-hs200-1_8v; + non-removable; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; + vmmc-supply =3D <&vcc_3v3>; + vqmmc-supply =3D <&vcc_1v8>; + status =3D "okay"; +};