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De Francesco" , Terry Bowman , Joshua Hahn , Robert Richter Subject: [PATCH v6 04/11] cxl: Simplify cxl_root_ops allocation and handling Date: Fri, 14 Nov 2025 01:40:09 +0100 Message-ID: <20251114004021.1310661-5-rrichter@amd.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251114004021.1310661-1-rrichter@amd.com> References: <20251114004021.1310661-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF000023D1:EE_|DM4PR12MB5721:EE_ X-MS-Office365-Filtering-Correlation-Id: fc0a4bb5-3a1d-4a2e-7202-08de2316864f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|36860700013|82310400026|1800799024|376014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?OvaZqWZzjf9ogXwXgKxq9lXhVZn3VEm4EQX7ZBcPRE9AbAS14ihnJ8dqgs5I?= =?us-ascii?Q?mScbHcL24KFPC5PuBNJFhuFMeohdEYJ4jcOd2gsDjrSmd7UmaIkkKIoWSVYA?= =?us-ascii?Q?s2qy0U7f34XvD4EWpgzF/gsJour9RT9UWjTJ78QntlkPbpWQQbaKwiT7eQFd?= =?us-ascii?Q?ffEVpGoTgus36kr3p33rExsWNE/PCr0vWZWPIbauJ5aYXrefgmKKqyuOnSBV?= =?us-ascii?Q?v2aekRNOcVJYTNiNrCoZV/R6Vhw2hTIetNtvtzXiG44u9mQpyfzdFjyxOsE8?= =?us-ascii?Q?z/pXyeHc7h3ASqDlugEj4upoTxUrAmN6IjSiocWkIUGOw53El0tAKors3Wyz?= =?us-ascii?Q?S/o8+4nUhyqiV5ZxYlGMA0mPQi/VFI/mTYovuoxOdIcH9T6i0vOHoMacF+IM?= =?us-ascii?Q?uiHG32/wLWFW1RyHOeegSbgg4j0+geMLzh/gYGRuhJj0WlB808T6SOKA6xhz?= =?us-ascii?Q?NNgxNDG63mmprbwHIV90owtqqKS32bM+gYaJJ3LviH3/wnxuKeCc3uJ652ZG?= =?us-ascii?Q?HRKhB+Z5mOy/uQ+ujAtktc9ENVaC6nt3lPu2wdQhrKNmJI4U2hbhHoF4/DDL?= =?us-ascii?Q?8nE6bYCK0ES7nDZlHGNpeoEiaSmuDZ0Ibh18vzC/wv2PFucq6RdfNM157Ie2?= =?us-ascii?Q?kc8dMr0sM+Y67KGM5A9IGzs8JgInbsR2TIF6x2TsJkEj1bHe3YR/XLmDFWvP?= =?us-ascii?Q?RmQ1k3ogM41D7qayRPeOSU92lxVDUEYbbgZXRdXTOc5XSmACcW2mRdeHNwPm?= =?us-ascii?Q?v6dWps1WdHiLtuVSaw1WaOTBiC7NJwuokCqs+OpCeX3u0b1q4jqyYhgy7rT5?= =?us-ascii?Q?RI9TooQS0U/3Teda5YKbWHq+SJy2mW6jsfkbsazVfKq2PH0xY6pT+KuCBfYi?= =?us-ascii?Q?c7Eh4DG8JN9Sd10M/5BU9pB+z4YSdbo3/qT0qnmnNcD+phDs2BN6Lk9r9lF0?= =?us-ascii?Q?KPbBzBNPH6RasRO8nXYzIFbfgv1uYQiC5LNjMwcFots2F3BOCWSZdYOWlk/J?= =?us-ascii?Q?mwRPEmS3wtl2Ewf/YwY2Psrs2w0agI+4LEfqBIKpEAYLeD0ohU8uZeAH7YcQ?= =?us-ascii?Q?mTZcC4SJvvWS8cYMnjevzA+7W8Pw2aW/y8wLKKqDAwfIIJGgKEGq1RGUdAP4?= =?us-ascii?Q?BZYdg+Zf1V/A1umHEjfQ6vW3OE3QcSCQIE5KnpVRrk6wYxyxDHU+5M4g8cdF?= =?us-ascii?Q?949aKRQz/zeosDG55fjyIwOhRj9ev/s+FKiYLJkjcFHoRFptEwfGgmVe5QMo?= =?us-ascii?Q?7trz6QzhKIUzPOvtuKxgauhf5AlJMCIYIcRNKifZRj6Dex2rmOaPRVaXVmLd?= =?us-ascii?Q?UA6wSY6KEsB7e8viUvm9WKY8qWYz5pP4kybnNyp1i/y/jh3EGAGUwcG+vyPW?= =?us-ascii?Q?/sD+9XxtI5V7JpOtCnGZXs8pTJXTe2B/c3kG7E+ZYsxvRD5wqeKzi6RytFlp?= =?us-ascii?Q?R8CtJzGaOGaG2mwNVWCeSw6pvv6JX6bowqwWYidR1JPgPo/qKqkftF6Ap76B?= =?us-ascii?Q?XBfCgEK8bRSduDkeRfQkQe5+aDx5v7R93HtnNxBFGguE7OFDpjDb6A5C1bUC?= =?us-ascii?Q?lZEXT7r+N01fBweasPM=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(7416014)(36860700013)(82310400026)(1800799024)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Nov 2025 00:41:18.1446 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fc0a4bb5-3a1d-4a2e-7202-08de2316864f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000023D1.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5721 Content-Type: text/plain; charset="utf-8" A root port's callback handlers are collected in struct cxl_root_ops. The structure is dynamically allocated, though it contains only a single pointer in it. This also requires to check two pointers to check for the existance of a callback. Simplify the allocation, release and handler check by embedding the ops statically in struct cxl_root. Reviewed-by: Dave Jiang Reviewed-by: Jonathan Cameron Signed-off-by: Robert Richter --- drivers/cxl/acpi.c | 7 ++----- drivers/cxl/core/cdat.c | 8 ++++---- drivers/cxl/core/port.c | 8 ++------ drivers/cxl/cxl.h | 19 ++++++++++--------- 4 files changed, 18 insertions(+), 24 deletions(-) diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c index 0a1bad3cafa7..866813e1b729 100644 --- a/drivers/cxl/acpi.c +++ b/drivers/cxl/acpi.c @@ -299,10 +299,6 @@ static int cxl_acpi_qos_class(struct cxl_root *cxl_roo= t, return cxl_acpi_evaluate_qtg_dsm(handle, coord, entries, qos_class); } =20 -static const struct cxl_root_ops acpi_root_ops =3D { - .qos_class =3D cxl_acpi_qos_class, -}; - static void del_cxl_resource(struct resource *res) { if (!res) @@ -907,9 +903,10 @@ static int cxl_acpi_probe(struct platform_device *pdev) cxl_res->end =3D -1; cxl_res->flags =3D IORESOURCE_MEM; =20 - cxl_root =3D devm_cxl_add_root(host, &acpi_root_ops); + cxl_root =3D devm_cxl_add_root(host); if (IS_ERR(cxl_root)) return PTR_ERR(cxl_root); + cxl_root->ops.qos_class =3D cxl_acpi_qos_class; root_port =3D &cxl_root->port; =20 rc =3D bus_for_each_dev(adev->dev.bus, NULL, root_port, diff --git a/drivers/cxl/core/cdat.c b/drivers/cxl/core/cdat.c index c4bd6e8a0cf0..b84a9b52942c 100644 --- a/drivers/cxl/core/cdat.c +++ b/drivers/cxl/core/cdat.c @@ -213,7 +213,7 @@ static int cxl_port_perf_data_calculate(struct cxl_port= *port, if (!cxl_root) return -ENODEV; =20 - if (!cxl_root->ops || !cxl_root->ops->qos_class) + if (!cxl_root->ops.qos_class) return -EOPNOTSUPP; =20 xa_for_each(dsmas_xa, index, dent) { @@ -221,9 +221,9 @@ static int cxl_port_perf_data_calculate(struct cxl_port= *port, =20 cxl_coordinates_combine(dent->coord, dent->cdat_coord, ep_c); dent->entries =3D 1; - rc =3D cxl_root->ops->qos_class(cxl_root, - &dent->coord[ACCESS_COORDINATE_CPU], - 1, &qos_class); + rc =3D cxl_root->ops.qos_class(cxl_root, + &dent->coord[ACCESS_COORDINATE_CPU], + 1, &qos_class); if (rc !=3D 1) continue; =20 diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c index fef3aa0c6680..2338d146577c 100644 --- a/drivers/cxl/core/port.c +++ b/drivers/cxl/core/port.c @@ -954,19 +954,15 @@ struct cxl_port *devm_cxl_add_port(struct device *hos= t, } EXPORT_SYMBOL_NS_GPL(devm_cxl_add_port, "CXL"); =20 -struct cxl_root *devm_cxl_add_root(struct device *host, - const struct cxl_root_ops *ops) +struct cxl_root *devm_cxl_add_root(struct device *host) { - struct cxl_root *cxl_root; struct cxl_port *port; =20 port =3D devm_cxl_add_port(host, host, CXL_RESOURCE_NONE, NULL); if (IS_ERR(port)) return ERR_CAST(port); =20 - cxl_root =3D to_cxl_root(port); - cxl_root->ops =3D ops; - return cxl_root; + return to_cxl_root(port); } EXPORT_SYMBOL_NS_GPL(devm_cxl_add_root, "CXL"); =20 diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 4633004fb770..8945dc1532a7 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -638,6 +638,14 @@ struct cxl_port { resource_size_t component_reg_phys; }; =20 +struct cxl_root; + +struct cxl_root_ops { + int (*qos_class)(struct cxl_root *cxl_root, + struct access_coordinate *coord, int entries, + int *qos_class); +}; + /** * struct cxl_root - logical collection of root cxl_port items * @@ -646,7 +654,7 @@ struct cxl_port { */ struct cxl_root { struct cxl_port port; - const struct cxl_root_ops *ops; + struct cxl_root_ops ops; }; =20 static inline struct cxl_root * @@ -655,12 +663,6 @@ to_cxl_root(const struct cxl_port *port) return container_of(port, struct cxl_root, port); } =20 -struct cxl_root_ops { - int (*qos_class)(struct cxl_root *cxl_root, - struct access_coordinate *coord, int entries, - int *qos_class); -}; - static inline struct cxl_dport * cxl_find_dport_by_dev(struct cxl_port *port, const struct device *dport_de= v) { @@ -755,8 +757,7 @@ struct cxl_port *devm_cxl_add_port(struct device *host, struct device *uport_dev, resource_size_t component_reg_phys, struct cxl_dport *parent_dport); -struct cxl_root *devm_cxl_add_root(struct device *host, - const struct cxl_root_ops *ops); +struct cxl_root *devm_cxl_add_root(struct device *host); struct cxl_root *find_cxl_root(struct cxl_port *port); =20 DEFINE_FREE(put_cxl_root, struct cxl_root *, if (_T) put_device(&_T->port.= dev)) --=20 2.47.3