From nobody Tue Feb 10 15:32:46 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A889F345739 for ; Fri, 14 Nov 2025 17:53:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763142846; cv=none; b=hHHSlEzmRDepQU7XDHkZuPiw38JjmkYD/iGFP/kAATy3fFRumwH6mgv+0QYpOF7cFZvmCIst3LOWIryOebkBUsRp2xmqvBxV9bbv/dAeR7moQhc8GzAO2n4MpmRHZQ6DhGhCRt8bzN8ixyKJFmNUPYPYkPIKrexohpNf2va0q1Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763142846; c=relaxed/simple; bh=iaFPE/p1ZbfxgmsrFvjCS+h6izV+Wg0qIV44OBPt0IE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=qpK1NAkaJrS61Y+ycwyIQrIoWqSMyAJbK8oCxQKOKniSMTQlwwGRSkymG63kDqUhK1NRatbLaqdDKeCDajpfU/VbR1nM9J5qlLJ46rY8qdwtuLJlWIl1+uZ3kbYD05utPu9NwwzyKOqRCFjQgUuq2WHEDN08g+YbDOtfzprUV50= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=K4tx/2iK; arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="K4tx/2iK" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id BB7D4C10F70; Fri, 14 Nov 2025 17:53:32 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 90AA36060E; Fri, 14 Nov 2025 17:53:54 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 9D53010371990; Fri, 14 Nov 2025 18:53:52 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1763142833; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=xnptK47IhbJsElmEDQ4s7RdwN9OFRU0DAsaYpYA/R/0=; b=K4tx/2iKZhTsJOWc6AaXgP8mo+vSToGxQT6IaKidwCcvegiYKwT8kVte5P8hftskvcTpSt X51ZSejCPih9hwOijkKrUk3O/7ruICBhOH0mFMQyazq7omuAnSZUoTHdf/aDuRDXfZ4Y9Z 7XiYg6EVpCOvaxrwVH4s6D8m/yv2e+RuMmyKrkzFwBue1SrLDTEy4w+6AKUE0Mks98sf5Z L1phRMyIA7nbtD88PHp787p7ogBwMs7iH1ixjk29UXoiHIKGNw8hFdA9RQuWW5WoVisy4R /elMlcDnLQ5ff4xYHnLpn2vfXEZZwchKiid5DhPtT57RTY3ohQHTS68Y7hlTow== From: Miquel Raynal Date: Fri, 14 Nov 2025 18:53:20 +0100 Subject: [PATCH 19/19] mtd: spi-nor: winbond: Add CMP locking support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251114-winbond-v6-18-rc1-spi-nor-swp-v1-19-487bc7129931@bootlin.com> References: <20251114-winbond-v6-18-rc1-spi-nor-swp-v1-0-487bc7129931@bootlin.com> In-Reply-To: <20251114-winbond-v6-18-rc1-spi-nor-swp-v1-0-487bc7129931@bootlin.com> To: Tudor Ambarus , Pratyush Yadav , Michael Walle , Richard Weinberger , Vignesh Raghavendra , Jonathan Corbet Cc: Sean Anderson , Thomas Petazzoni , Steam Lin , linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Miquel Raynal X-Mailer: b4 0.14.2 X-Last-TLS-Session-Version: TLSv1.3 All W25Q01NWxxIQ, W25Q{01,02}NWxxIM and W25H{512,01,02}NWxxAM chips have support for the locking complement (CMP) feature. Add the relevant bit to enable it. Signed-off-by: Miquel Raynal --- The documentation about testing the CMP feature has been written based on a W25H512NWxxAM test run. I would like to gather feedback on this entire series before providing a very detailed output for the 5 other almost identical chips. --- drivers/mtd/spi-nor/winbond.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c index fb855fe44733db5664c200520d19a6be33edc323..22a923e6b9d7d8f1571cd6b45a6= 88c08ff400b63 100644 --- a/drivers/mtd/spi-nor/winbond.c +++ b/drivers/mtd/spi-nor/winbond.c @@ -346,27 +346,33 @@ static const struct flash_info winbond_nor_parts[] = =3D { }, { /* W25Q01NWxxIQ */ .id =3D SNOR_ID(0xef, 0x60, 0x21), - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_= NOR_4BIT_BP, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | + SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, }, { /* W25Q01NWxxIM */ .id =3D SNOR_ID(0xef, 0x80, 0x21), - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_= NOR_4BIT_BP, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | + SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, }, { /* W25Q02NWxxIM */ .id =3D SNOR_ID(0xef, 0x80, 0x22), - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_= NOR_4BIT_BP, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | + SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, }, { /* W25H512NWxxAM */ .id =3D SNOR_ID(0xef, 0xa0, 0x20), - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_= NOR_4BIT_BP, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | + SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, }, { /* W25H01NWxxAM */ .id =3D SNOR_ID(0xef, 0xa0, 0x21), - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_= NOR_4BIT_BP, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | + SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, }, { /* W25H02NWxxAM */ .id =3D SNOR_ID(0xef, 0xa0, 0x22), - .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_= NOR_4BIT_BP, + .flags =3D SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | + SPI_NOR_4BIT_BP | SPI_NOR_HAS_CMP, }, }; =20 --=20 2.51.0