From nobody Mon Feb 9 16:45:13 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C05F2D7D30; Thu, 15 Jan 2026 18:26:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768501577; cv=none; b=DlXHps9MLnoJ/TDvzvw3e/rdwemplt7GOwfM4OTO5ep92LFqrPkUU/zOdBc/ZVcClv7RR+kAdNqVt13yMrXSkVswQBGvmOsrFFW7DlLf36ngOUAkoxH7izXOEAC4LLW06v3sfdhsvl8/mr0zKBB88rMy2uDKJXFGu+X5+L/XMJM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768501577; c=relaxed/simple; bh=0aoMxZYUJjVl2CKjgL/PIl3zUQkNfKK1M3nJW2OMsqg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=QpOH7uzQW8+QVP7hxBZPwGuwVm8hieYleT7hPb0qpDLBmEXCNmudcMkuZYoQpfwBvHHFQCCDolJTxH+cPQ+OYnJncR81cmeZ5mCShqNJKy1Yf+sHa/dTaY7duSYOil3dpm3Ie+5zj76woMfOfLRTKCZlUTq+ZanLRyYbPtN9uL4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=JZzYhs2q; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="JZzYhs2q" Received: by smtp.kernel.org (Postfix) with ESMTPS id DB60BC16AAE; Thu, 15 Jan 2026 18:26:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1768501576; bh=0aoMxZYUJjVl2CKjgL/PIl3zUQkNfKK1M3nJW2OMsqg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=JZzYhs2q9Ph2sWm/6KhwB4XY+ur5Dvhks3L9jY5RELzUCHTiL6ZopUF51/kWOE7z3 zQW7HelW1pcaAJSn25YqjEdeGeO1uE2RISSgpVSRzIXnRg8M21A+DlmC6eQqN6vgTg gxXBg/IpmKwbboRkdR0YXad3jscWVs4VkwbJrnJ8gxglnfkwq1qFbt0dUxKXm1bKj0 t1obv8ESlbiSPkq8xuZSlmCSDER9q+jp/d2IriDcCTbwcHApQ0kOANK4+obZEgQt9J G6KQARXrhUiW0yd3bgQ+blCjAuCuRzM1iQtCQIiHhnGi5evk+IiS1nxM2EpRlNLaTY DAqDvdLXu66eA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD48BD4660B; Thu, 15 Jan 2026 18:26:16 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Thu, 15 Jan 2026 19:26:07 +0100 Subject: [PATCH v4 1/3] media: dt-bindings: add rockchip mipi csi-2 receiver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251114-rockchip-mipi-receiver-v4-1-a9c86fecd052@collabora.com> References: <20251114-rockchip-mipi-receiver-v4-0-a9c86fecd052@collabora.com> In-Reply-To: <20251114-rockchip-mipi-receiver-v4-0-a9c86fecd052@collabora.com> To: Michael Riesch , Chaoyi Chen , Kever Yang , Frank Li , Mehdi Djait , Bryan O'Donoghue , Laurent Pinchart , Hans Verkuil , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Philipp Zabel , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1768501575; l=5087; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=wmdltrQo1WcBf2SoyAzHJ7pw6SXPjdp25GEfcZq2Ur8=; b=e2NH8bH/H/geblFyQHm36Awpzb2HykgrUx+PNBmWjxKswiaPpsfhhQUCN+WaMLXXAqGRasVf3 CwL5gAhgrDLBKdYizIoo9GLoEBfKW5tQ/r+QbeXxLByCPTOl+MHwSSw X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch Add documentation for the Rockchip MIPI CSI-2 Receiver. Signed-off-by: Michael Riesch Signed-off-by: Michael Riesch Reviewed-by: Krzysztof Kozlowski --- .../bindings/media/rockchip,rk3568-mipi-csi2.yaml | 141 +++++++++++++++++= ++++ MAINTAINERS | 6 + 2 files changed, 147 insertions(+) diff --git a/Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-c= si2.yaml b/Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi= 2.yaml new file mode 100644 index 000000000000..2c2bd87582eb --- /dev/null +++ b/Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi2.yaml @@ -0,0 +1,141 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/rockchip,rk3568-mipi-csi2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip MIPI CSI-2 Receiver + +maintainers: + - Michael Riesch + +description: + The Rockchip MIPI CSI-2 Receiver is a CSI-2 bridge with one input port a= nd + one output port. It receives the data with the help of an external MIPI = PHY + (C-PHY or D-PHY) and passes it to the Rockchip Video Capture (VICAP) blo= ck. + +properties: + compatible: + enum: + - rockchip,rk3568-mipi-csi2 + + reg: + maxItems: 1 + + interrupts: + items: + - description: Interrupt that signals changes in CSI2HOST_ERR1. + - description: Interrupt that signals changes in CSI2HOST_ERR2. + + interrupt-names: + items: + - const: err1 + - const: err2 + + clocks: + maxItems: 1 + + phys: + maxItems: 1 + description: MIPI C-PHY or D-PHY. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: Input port node. Connect to e.g., a MIPI CSI-2 image = sensor. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + + data-lanes: + minItems: 1 + maxItems: 4 + + required: + - bus-type + - data-lanes + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Output port connected to a Rockchip VICAP port. + + required: + - port@0 + - port@1 + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - phys + - ports + - power-domains + - resets + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + + soc { + interrupt-parent =3D <&gic>; + #address-cells =3D <2>; + #size-cells =3D <2>; + + csi: csi@fdfb0000 { + compatible =3D "rockchip,rk3568-mipi-csi2"; + reg =3D <0x0 0xfdfb0000 0x0 0x10000>; + interrupts =3D , + ; + interrupt-names =3D "err1", "err2"; + clocks =3D <&cru PCLK_CSI2HOST1>; + phys =3D <&csi_dphy>; + power-domains =3D <&power RK3568_PD_VI>; + resets =3D <&cru SRST_P_CSI2HOST1>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + csi_in: port@0 { + reg =3D <0>; + + csi_input: endpoint { + bus-type =3D ; + data-lanes =3D <1 2 3 4>; + remote-endpoint =3D <&imx415_output>; + }; + }; + + csi_out: port@1 { + reg =3D <1>; + + csi_output: endpoint { + remote-endpoint =3D <&vicap_mipi_input>; + }; + }; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index fc68ee0c68c0..965132e0933a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -25364,6 +25364,12 @@ S: Maintained F: drivers/i2c/busses/i2c-designware-amdisp.c F: include/linux/soc/amd/isp4_misc.h =20 +SYNOPSYS DESIGNWARE MIPI CSI-2 RECEIVER DRIVER +M: Michael Riesch +L: linux-media@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi2.yaml + SYNOPSYS DESIGNWARE MMC/SD/SDIO DRIVER M: Jaehoon Chung M: Shawn Lin --=20 2.39.5