From nobody Mon Feb 9 07:24:06 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1F2452571B8 for ; Fri, 14 Nov 2025 03:11:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763089869; cv=none; b=pFsLHERGFGfxQpiko2oNn+DTPJSsFXRjKlCG2jPAXhzciba+aC6HzlQKcCLyjC9UoAnpoyQJR/lhVaxcRZnK49SO4mqzNxYHQPERBx2y2znHG1GfQyofVYY0Pq2OrLss9mYth/EBAeiWWk+tcxrmW0TbdwpUJWz5kHIsBo+mnJM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763089869; c=relaxed/simple; bh=E/3i2/+44CedmRS8ulf2O/Swxg+3oJwtmc68sYT+BcE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=UzsSC0iRd0uz+tha+cU5RLNeNPvkBLfpebdBfm9NhFsSFq7giKWSRqFsC1a57oNNSgP/en3WWZVDE7YV+QUtLWOOQHSnIhrMGYd9yoqMoBDOdWwRVg1TzU6VMwVmkjz8E2r4NhI7r82l7LC/EnBSY06r2RL6pWsxM/VP6SdA7yY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=Qfw97WfU; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=en2xc0q0; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="Qfw97WfU"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="en2xc0q0" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 5ADMae3n1629387 for ; Fri, 14 Nov 2025 03:11:07 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= FLwsNIV9PC6cPYdCEvfzQ1SasdDd3Px68Ca5i3GYDSg=; b=Qfw97WfUpZrU3nN5 jkPHO6ggbAxkm9RHUn/YY0/cuQUvessZZKz9JKgkuzs8jay056miatKM2h5q3561 9aavkcIPbzeKFPmIsSCWENRb25O1xzKidxDejW8Gkh8IEkfLYK2kAFWN6W2ECOpH jC/R9oKiKGL0OWAvEPl3ZDGBWzGccAd8VhUFo93zAMx7z2xhxJ1MAJqUK1YaPmdG f0OX69tlZq+FCx7lL6I3Mk2lQez8O2uJ8iY8F6Kg+uhWDhYsjdS9YJTOWWpih6yA I7whzi8XB3oxwADLutoQSwncyK8m4BjkVV/RFZ/+PTxN4uO3nFaET75QfUhRXp4G Et45pg== Received: from mail-pf1-f199.google.com (mail-pf1-f199.google.com [209.85.210.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4adr9d8mtc-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Fri, 14 Nov 2025 03:11:07 +0000 (GMT) Received: by mail-pf1-f199.google.com with SMTP id d2e1a72fcca58-7ae3e3e0d06so1290645b3a.0 for ; Thu, 13 Nov 2025 19:11:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1763089866; x=1763694666; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=FLwsNIV9PC6cPYdCEvfzQ1SasdDd3Px68Ca5i3GYDSg=; b=en2xc0q0rJX9mIorSB++hN+bU1UIIIxdorCtThVj/q+IaxeSwSL14hsXsLumC5/vfv 9zI5Wh2rKJBRamGEU69TC7gaVYXg8NEpOCaBWHwy2NCEuGM5/laAowSpqE18Gi15aA8/ DUVd997H++5Oxbrzpuktcl5Q85kj5j3owAve0zc62lFj0R2geU7EJfpa39vsPBBInR// zXhFtAm03QVrfb+NZe5Sy2vLHMmlnfcfZhx0NSjfaA4m0Q+WOdmZSfmmHQDmEHWsh58d jxgvED/wxUr9tCq6sZCSKnPG3XBFMyF7XcoZR8D5lxHHML+Aq6GuuDo5TGA5chjk4BoO LNiw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1763089866; x=1763694666; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=FLwsNIV9PC6cPYdCEvfzQ1SasdDd3Px68Ca5i3GYDSg=; b=FA1CgGiLOZyr3V07Bn5fR5Yod0uURs9yVelumM1CNA8CtHB885gMnx5Yk1A0C6JO9r N1UgaDYO9HgmvZILzlnA1TUZAp0bW1nIZaS6PdYCkUZXtoG9uKtAn9ss3Ge6PeUjOJ2Y aQcSJ/1T8RENARZuhRQnfMEGPQBZAo+wM8GB4Afm4J5+yi2UDZAccouwdIfk5ViJlfJa wt8lY3LqIb/1JpmUBvowbzNgLgBV+KWdajh0IgaIkpAqZWCgEYxk3reECajgHuZXb9JR TiofYzLglf5v+Cz6xnZL/CtyxLPMLjEWHutLEICnBHjl6G3cF5pcpNjHQaP+bo0HooFm jxnA== X-Forwarded-Encrypted: i=1; AJvYcCUt7fnzJOGRV4fAr8igk74OE+w+6uTnRPrGhKSZCWSPT2U7mHwBRYigsVmqXV95M51dc8FtmTp//L0PZLo=@vger.kernel.org X-Gm-Message-State: AOJu0YxCNvDzTIVeQ5chcvR01cobvhz/rZ4VBV8Od8wx9WlzCG2JzAi9 A8f8wW+WC9OvjPAjGfVoVSfFdTWsQ2UWTZWZBJywqlMMSC6m8rdd2+1SmMIccImbXIAqE2VQppf WknRt8Mzdy/+hzvL2n8Am2uDqf9D5Vj4LFwdPZ338WXhSJmYYCRzBMt6YSknXQxJtyrc= X-Gm-Gg: ASbGncvpwAjz3JzYhESwZqgqkXocFyds3G7BKoG4uLd90+h4lQmna8xXhowccpjjKwa sdjCTs3mimCGv4PHpWFQDoRBMrlh6fXJk2fJRaVYGN4sGu656zjIo9lP+o0vopg2FPyw2gkqzC3 XHthj07Nn6HPVFVl02S3wQtSO1eYc2UCIVQpoSLcjqzzhntd8uKyGQVFJW4eHX78saUFIFO1cjc PeaThctIWrM4cNJ8NG0PMr1Tdfqc75VNL/WMRYM60TpT1/ZaxY/jIU/tbTZmnsT1p+ZdM3e9Xly XySuIWJx5iu7RcrD+dc8+vV9ZtgnlD7RtKplKBqpZ2ktlQDGM0v/f5bj9IOnyWC0PZDNRjuKCuE FfJLH+zm3/6DXqwmIyGagb2bTMNVX79C7Re5AdRwV9L9CSPEDht1vCoYv7PGvMPgA7thQisWGGQ T9qYoxeGQW X-Received: by 2002:a05:6a00:3cc8:b0:7ae:d1d:d500 with SMTP id d2e1a72fcca58-7ba39b79f58mr2163410b3a.4.1763089866369; Thu, 13 Nov 2025 19:11:06 -0800 (PST) X-Google-Smtp-Source: AGHT+IEr7nQFy4/LctFwnJ5En2cKeocm+jGZ6Z/wTsYu/Reba5o1kThs3DdudFabVI+prksf4UMa+Q== X-Received: by 2002:a05:6a00:3cc8:b0:7ae:d1d:d500 with SMTP id d2e1a72fcca58-7ba39b79f58mr2163376b3a.4.1763089865839; Thu, 13 Nov 2025 19:11:05 -0800 (PST) Received: from WANGAOW-LAB01.ap.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com. [103.229.16.4]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7b92714e298sm3598555b3a.34.2025.11.13.19.11.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Nov 2025 19:11:05 -0800 (PST) From: Wangao Wang Date: Fri, 14 Nov 2025 11:08:58 +0800 Subject: [PATCH v6 1/6] media: qcom: iris: Improve format alignment for encoder Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251114-iris_encoder_enhancements-v6-1-d6d35a92635d@oss.qualcomm.com> References: <20251114-iris_encoder_enhancements-v6-0-d6d35a92635d@oss.qualcomm.com> In-Reply-To: <20251114-iris_encoder_enhancements-v6-0-d6d35a92635d@oss.qualcomm.com> To: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Wangao Wang , Neil Armstrong , quic_qiweil@quicinc.com, quic_renjiang@quicinc.com, Bryan O'Donoghue X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1763089858; l=3515; i=wangao.wang@oss.qualcomm.com; s=20251021; h=from:subject:message-id; bh=E/3i2/+44CedmRS8ulf2O/Swxg+3oJwtmc68sYT+BcE=; b=1WeoDxJJIk46lr5wsCFUzv/qO6WmQtRwp8Ixt8LOraZVcuthYtKkCSYHJN8b2vo7OG340CptB m2wf0zmWpKcCdlUH4XxAypPjD6caEZtkuYD9ORw2Fk1BAM6tA/ZZ89b X-Developer-Key: i=wangao.wang@oss.qualcomm.com; a=ed25519; pk=bUPgYblBUAsoPyGfssbNR7ZXUSGF8v1VF4FJzSO6/aA= X-Proofpoint-GUID: dQQU-MBNR4Mv3WLnXBxTMFpwWKHmAxMe X-Authority-Analysis: v=2.4 cv=Rdidyltv c=1 sm=1 tr=0 ts=69169dcb cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=Ydk8v881x4eQe87C_TwA:9 a=QEXdDO2ut3YA:10 a=OpyuDcXvxspvyRM73sMx:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-ORIG-GUID: dQQU-MBNR4Mv3WLnXBxTMFpwWKHmAxMe X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTE0MDAyMyBTYWx0ZWRfXz6k29mWRIRZD BVd3ZhmEaBAEGqk3rrNxYmJD42NY9do6OGSy90gRNyH5UPTg7PLXFFw8gYC4uAuwxGeJI6NDSVJ 2zcLdPnLT3dedzIqJ/Q6UX/wH0JU4xMYhwS0ahGtu/LqWzWQJPQkO4ejkPDMQXFddLaWi4U9UEt Q8kOwguzW0MCSdXzSHu9mMZfoIh9nTLHCKQeBMfMJ/lJUVHU49fgTroJy9mTzShVWmInBMaI3dm 1TueJY02yJZ7OGVuTRaBphK2r7vvj4c6WUNSsEYmY/g8oPSz38cYa6aZhEwRUbftBzC2zM8Ztf/ H8ycXEgF2Ym8o7GBHzUKFaQ2Syw9MKQDWKlS/LUR0bZLgsYebtW9MPgbN8o+USSr4BESuk35P/i maQCthfuChLKvX7rh7x2fTXQjUBRfg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-13_07,2025-11-13_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 clxscore=1015 adultscore=0 impostorscore=0 bulkscore=0 spamscore=0 priorityscore=1501 phishscore=0 lowpriorityscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511140023 Add members enc_raw_width, enc_raw_height to the struct iris_inst to support codec alignment requirements. HFI_PROP_RAW_RESOLUTION needs to be set to the actual YUV resolution. Reviewed-by: Bryan O'Donoghue Reviewed-by: Dikshita Agarwal Tested-by: Neil Armstrong # on SM8650-HDK Signed-off-by: Wangao Wang --- drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c | 3 +-- drivers/media/platform/qcom/iris/iris_instance.h | 4 ++++ drivers/media/platform/qcom/iris/iris_venc.c | 6 ++++++ 3 files changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c b/dri= vers/media/platform/qcom/iris/iris_hfi_gen2_command.c index 6a772db2ec33fb002d8884753a41dc98b3a8439d..b5ae3d4745c6a7b354ab8907aac= d532b81b48aab 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c @@ -168,8 +168,7 @@ static int iris_hfi_gen2_session_set_property(struct ir= is_inst *inst, u32 packet =20 static int iris_hfi_gen2_set_raw_resolution(struct iris_inst *inst, u32 pl= ane) { - u32 resolution =3D inst->fmt_src->fmt.pix_mp.width << 16 | - inst->fmt_src->fmt.pix_mp.height; + u32 resolution =3D inst->enc_raw_width << 16 | inst->enc_raw_height; u32 port =3D iris_hfi_gen2_get_port(inst, plane); =20 return iris_hfi_gen2_session_set_property(inst, diff --git a/drivers/media/platform/qcom/iris/iris_instance.h b/drivers/med= ia/platform/qcom/iris/iris_instance.h index 62fbb30691ff967212022308fa53ff221fa24ce9..a95244cf6d30cd81199b9f1e51b= f64c991be1790 100644 --- a/drivers/media/platform/qcom/iris/iris_instance.h +++ b/drivers/media/platform/qcom/iris/iris_instance.h @@ -69,6 +69,8 @@ struct iris_fmt { * @frame_rate: frame rate of current instance * @operating_rate: operating rate of current instance * @hfi_rc_type: rate control type + * @enc_raw_width: source image width for encoder instance + * @enc_raw_height: source image height for encoder instance */ =20 struct iris_inst { @@ -107,6 +109,8 @@ struct iris_inst { u32 frame_rate; u32 operating_rate; u32 hfi_rc_type; + u32 enc_raw_width; + u32 enc_raw_height; }; =20 #endif diff --git a/drivers/media/platform/qcom/iris/iris_venc.c b/drivers/media/p= latform/qcom/iris/iris_venc.c index 5830eba93c68b27fa9db87bac63a691eaca338d2..07ffcd4d20969c8c33084dc8b03= 156913e8c89fc 100644 --- a/drivers/media/platform/qcom/iris/iris_venc.c +++ b/drivers/media/platform/qcom/iris/iris_venc.c @@ -68,6 +68,9 @@ int iris_venc_inst_init(struct iris_inst *inst) inst->operating_rate =3D DEFAULT_FPS; inst->frame_rate =3D DEFAULT_FPS; =20 + inst->enc_raw_width =3D DEFAULT_WIDTH; + inst->enc_raw_height =3D DEFAULT_HEIGHT; + memcpy(&inst->fw_caps[0], &core->inst_fw_caps_enc[0], INST_FW_CAP_MAX * sizeof(struct platform_inst_fw_cap)); =20 @@ -287,6 +290,9 @@ static int iris_venc_s_fmt_input(struct iris_inst *inst= , struct v4l2_format *f) inst->buffers[BUF_INPUT].min_count =3D iris_vpu_buf_count(inst, BUF_INPUT= ); inst->buffers[BUF_INPUT].size =3D fmt->fmt.pix_mp.plane_fmt[0].sizeimage; =20 + inst->enc_raw_width =3D f->fmt.pix_mp.width; + inst->enc_raw_height =3D f->fmt.pix_mp.height; + if (f->fmt.pix_mp.width !=3D inst->crop.width || f->fmt.pix_mp.height !=3D inst->crop.height) { inst->crop.top =3D 0; --=20 2.43.0 From nobody Mon Feb 9 07:24:06 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6E89C254841 for ; Fri, 14 Nov 2025 03:11:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763089874; cv=none; b=jyprxE+dcoXYpm9OWTXlanqMF/6dwTZbTM+Xr3FQ708aJF0EKhUmfhRWO5pZA070Q8ZbnwZxXPUlAzzmXQ3AHmYqFGM7yeTzl5tYpJI4FmDjHuHzzSb+DjdNA6fuxuYmr4ez0sraYyOvRA+kv+zVXh+sEXnqkItuNuYwvG0BoxI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763089874; c=relaxed/simple; bh=N+lXfS+h75q3UY+fVI5mCZ5Y22WmQkMvX7JwoqZwoAQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=raXVWBxPQGLr8MOfZYWXNCaoTOf0PMZzRVDVaItmNsDFQF4bAzrBnvSLgRIlpa0UVugjvaSfTSLQymPrRk2IzMqIzE3Tlcle/9aHXoJQX4Nj4I8QEVpdQ+5riGrt4nMtAgLWUc/Xy690f8cxX6mc2n1xZCulo+ul40/aVlsMtbE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=hbIPfG+m; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=T9H6hJUK; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="hbIPfG+m"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="T9H6hJUK" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 5ADMbRt81631450 for ; Fri, 14 Nov 2025 03:11:11 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= EpCPhfZHViyrEGxLAAC7R6Rt+0rXawz53+v5Rmp3lUI=; b=hbIPfG+mAsy3ZpmW u6cJPIeKrkbO6joJy1tJ1ZN1AmTeytIlBUrbzjmWf/Tl8oBMSS08HMl6mqxp38a0 zAFCGKquBEPt5ME2/6TuDMyrJchSq8iOmdvSLz5BaTUgyVBAtEnUCx95GnL9Oesh JD05kdHaYM6UqIejb83bEvKW92zODfa5QnpEeAAnC8mnpLyfxnIqk/+Fk+AsxE27 hJY5QOOt/B4/jx9JU6GAcOyEp8AG1ei47PXJTdkGIqlF6YGk0RwkjA5rcEh6TIMN Wri1xLXipuP7EbTqUVKfZBZtt2RQ6qpnLDwt2cnC0CYz6nYDWd+ktg9B7ulOupTs eGw0kA== Received: from mail-pf1-f200.google.com (mail-pf1-f200.google.com [209.85.210.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4adr9d8mtt-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Fri, 14 Nov 2025 03:11:11 +0000 (GMT) Received: by mail-pf1-f200.google.com with SMTP id d2e1a72fcca58-7aa9f595688so2865548b3a.2 for ; Thu, 13 Nov 2025 19:11:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1763089870; x=1763694670; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=EpCPhfZHViyrEGxLAAC7R6Rt+0rXawz53+v5Rmp3lUI=; b=T9H6hJUKx8jdpamDLI6QL4m7W/8p1ZqfcvdWVfoy4zWqbBqUsLO5jbumg9W942D56b bVBoalvFA920jrJCbQznIpxgicUbbDoS68IDI6LXaZT7uQTyVgp7eEkWb7Qjqf8nWPm7 rM9ux+0RNLx3NalJZSPPnJ00AM2lTs/bWpS4EQ3diMCsF3q07onnCHLv1YFd0rYIgX/w lUFCPU+bhsElMPVy9m5tdH9IPzxuQ9PhHTDZAZnJiGCmaLdWy//pVpWPsr5cO5oc/2US 3a6HRh2VSdJppAth0Svq3/TbGCDrxG2y8aFCBCvl0VB1CTL/drJ+vSLNdo99JEyBUxBs UfMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1763089870; x=1763694670; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=EpCPhfZHViyrEGxLAAC7R6Rt+0rXawz53+v5Rmp3lUI=; b=nRDu/f9GiF7EiX9yRW3wajowKbEbzJe19G8l8I27QtN8WEwRiKspAiPhx5JadzJJPU NZSTeV6oK1yiH1ArUgKaeYQFZ9vzOiy2X6D4xwi5mtCibiuF2FmsuGrHThOQkpiNcdcn 1NyQnGIR38oJtHjO5PbEXeO/JfKXkX5u62CWheObBiuMyIB/Nptwm0iO1vlwt7QthJbz 4TF3q5e2vF1IutMN/ksAgMWR3O0g3sxdO4Pl9fB6QNemNvVjcCJ4G3JgO56jkMQxARDT DVAgzZexxKdnSiva6TsWa1rL2VmwST8urqUTg2txWbAMW7uQ9w9Ik7a1RxknTV3xGozC nd2g== X-Forwarded-Encrypted: i=1; AJvYcCXCjKfxNvjNC8ooRMwm9KLEmR5NoFAhUyXeZXSv7hX3ZpoHMVqUXlN2SfbhUAHAS+5lahbI7Je3XoRKVfI=@vger.kernel.org X-Gm-Message-State: AOJu0YwZe3OLUWAcEGsflCMBWe81kDwQsPC1CWuB1avRkWI7v+HqDRTk ujux/AqGI9zgKpMDXVmzYVOWVSkcv0ZPeNHyfIu58W79DUY/PRy0fu61ncqOowO+wBsNIdFJ5rZ 71OkZiAo2cCdWYFDjxrP6y4I4Q/u9iBsSZ8rgwgUEtzqzoIsL9PmS5xeiFwVeX9zKRyg= X-Gm-Gg: ASbGncsJWDuuJZ8/6mL93490WuDFVfKDGvZ+kkU853OmJpY6nNimh38k4QZY/wdH6Ol PKm/M/PJ64+VWn/HZqQYc6ZcuPEa2k9jTVu6cw22aw7QqNLIXEQFU1Z8W5+Id2mxSBOXeUwsK7Y ICLKNIztqSURsFAtILA/Wqc3HiBYw/NDgUy9p5VYfN475mK6Mv5s4OxfF01JTUhZ3QNbVKbySvp uImFmn9wd3Qv+s/8LcIDp+h/wH3MKWrEdYdysfr9llLcFK+wXjNqhsryR+d3i6ZYxEx6BDDQpgO e4v49OYtqOvq1FMfYtTpucs8EWV6Kl++sdmnRTyKC99O6QQ+raMpER7QKqfyxG3TCigzNc6rlq8 yAg5lKWAXUgK3ju7DuewInU3P1BshDatGDZZUIeEyAZYruRp69hAwm3hvP3fOEg9guV06Ow9mZh halSfIXMfW X-Received: by 2002:a05:6a20:6a21:b0:342:a261:e2bc with SMTP id adf61e73a8af0-35b9f7802fdmr2393617637.10.1763089870334; Thu, 13 Nov 2025 19:11:10 -0800 (PST) X-Google-Smtp-Source: AGHT+IEByt/YnJC8UImZHFW2IHOtUBhlJhhnk9FlWz7pgABAyEcJcAFKXFvnd6hkwgZSwPjj4UBvHw== X-Received: by 2002:a05:6a20:6a21:b0:342:a261:e2bc with SMTP id adf61e73a8af0-35b9f7802fdmr2393577637.10.1763089869767; Thu, 13 Nov 2025 19:11:09 -0800 (PST) Received: from WANGAOW-LAB01.ap.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com. [103.229.16.4]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7b92714e298sm3598555b3a.34.2025.11.13.19.11.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Nov 2025 19:11:09 -0800 (PST) From: Wangao Wang Date: Fri, 14 Nov 2025 11:08:59 +0800 Subject: [PATCH v6 2/6] media: qcom: iris: Improve crop_offset handling for encoder Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251114-iris_encoder_enhancements-v6-2-d6d35a92635d@oss.qualcomm.com> References: <20251114-iris_encoder_enhancements-v6-0-d6d35a92635d@oss.qualcomm.com> In-Reply-To: <20251114-iris_encoder_enhancements-v6-0-d6d35a92635d@oss.qualcomm.com> To: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Wangao Wang , Neil Armstrong , quic_qiweil@quicinc.com, quic_renjiang@quicinc.com X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1763089858; l=2964; i=wangao.wang@oss.qualcomm.com; s=20251021; h=from:subject:message-id; bh=N+lXfS+h75q3UY+fVI5mCZ5Y22WmQkMvX7JwoqZwoAQ=; b=C+soZyehMFoq7OZ6xSqp4YsD1PBaO8egsolYdKpTMbXI3OSrrky7+1R9TAtwyXACd2pwUciYU 7Tfh8+5JhruDJRxYFxIDVgHL8YvG1ihloATL8whan22wR8KpCVSEeAk X-Developer-Key: i=wangao.wang@oss.qualcomm.com; a=ed25519; pk=bUPgYblBUAsoPyGfssbNR7ZXUSGF8v1VF4FJzSO6/aA= X-Proofpoint-GUID: 15Z0py5141CUhQ3Bowry9Ql5XrAmqiXO X-Authority-Analysis: v=2.4 cv=Rdidyltv c=1 sm=1 tr=0 ts=69169dcf cx=c_pps a=mDZGXZTwRPZaeRUbqKGCBw==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=FFraBxrx14SkMf4OJSEA:9 a=QEXdDO2ut3YA:10 a=zc0IvFSfCIW2DFIPzwfm:22 X-Proofpoint-ORIG-GUID: 15Z0py5141CUhQ3Bowry9Ql5XrAmqiXO X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTE0MDAyMyBTYWx0ZWRfX/EpddnxjNDEU xGZ8sGYGpt5kuA9ax8SqCnTHvDGXzcRWqYR7c0NIfacuchhXG77mQ1eOLUCW2y1sNZDTtNiWkpw LiqZEEzIPhnCXDtyyULMwTlT5KnuhUGTd/PS1NsGlR56qm5QHOs7VcsYWFLwC8Dg2m9oyGTiAK+ hquVJ+s+8zxUIQFA2Vh7aS5iN6tpstSqkEkCen2SCcrykSsSA2fjUqAYvQ/X3YnpT3PKUxk8S3M za5xKnmMgKL27yBR43eZXmat2Skll/dcs07V/aatAs8qKjIUmf9VIfVHPzP2qVZfyEExKZq0YFp 0sYgh+y2jp8pXhhhY/Jp8zQT+rrbvI9Hrv1EacUG1AOouL7VXn37HpdPNkW16asaKN/cgwQtn23 UQGHIKx3C+MYPRYnRwJMV9+iMEOZbg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-13_07,2025-11-13_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 clxscore=1015 adultscore=0 impostorscore=0 bulkscore=0 spamscore=0 priorityscore=1501 phishscore=0 lowpriorityscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511140023 The setting of HFI_PROP_CROP_OFFSETS for the OUTPUT port is correct, but on the CAPTURE port it is used to inform the firmware about the region of interest, so crop_offset needs to be handled accordingly. Reviewed-by: Dikshita Agarwal Signed-off-by: Wangao Wang --- .../media/platform/qcom/iris/iris_hfi_gen2_command.c | 20 +++++++++++++++-= ---- drivers/media/platform/qcom/iris/iris_venc.c | 4 ++-- 2 files changed, 17 insertions(+), 7 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c b/dri= vers/media/platform/qcom/iris/iris_hfi_gen2_command.c index b5ae3d4745c6a7b354ab8907aacd532b81b48aab..8250e0d6f0a8916f3389be60dba= 762f3b4f3c690 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c @@ -215,7 +215,7 @@ static int iris_hfi_gen2_set_crop_offsets(struct iris_i= nst *inst, u32 plane) u32 port =3D iris_hfi_gen2_get_port(inst, plane); u32 bottom_offset, right_offset; u32 left_offset, top_offset; - u32 payload[2]; + u32 payload[2], codec_align; =20 if (inst->domain =3D=3D DECODER) { if (V4L2_TYPE_IS_OUTPUT(plane)) { @@ -230,10 +230,20 @@ static int iris_hfi_gen2_set_crop_offsets(struct iris= _inst *inst, u32 plane) top_offset =3D inst->compose.top; } } else { - bottom_offset =3D (inst->fmt_src->fmt.pix_mp.height - inst->crop.height); - right_offset =3D (inst->fmt_src->fmt.pix_mp.width - inst->crop.width); - left_offset =3D inst->crop.left; - top_offset =3D inst->crop.top; + codec_align =3D inst->codec =3D=3D V4L2_PIX_FMT_HEVC ? 32 : 16; + if (V4L2_TYPE_IS_OUTPUT(plane)) { + bottom_offset =3D (inst->enc_raw_height - inst->crop.height); + right_offset =3D (inst->enc_raw_width - inst->crop.width); + left_offset =3D inst->crop.left; + top_offset =3D inst->crop.top; + } else { + bottom_offset =3D (ALIGN(inst->fmt_dst->fmt.pix_mp.height, codec_align)= - + inst->fmt_dst->fmt.pix_mp.height); + right_offset =3D (ALIGN(inst->fmt_dst->fmt.pix_mp.width, codec_align) - + inst->fmt_dst->fmt.pix_mp.width); + left_offset =3D 0; + top_offset =3D 0; + } } =20 payload[0] =3D FIELD_PREP(GENMASK(31, 16), left_offset) | top_offset; diff --git a/drivers/media/platform/qcom/iris/iris_venc.c b/drivers/media/p= latform/qcom/iris/iris_venc.c index 07ffcd4d20969c8c33084dc8b03156913e8c89fc..71f4263ada898ce8333086db59e= 386e91b34ed60 100644 --- a/drivers/media/platform/qcom/iris/iris_venc.c +++ b/drivers/media/platform/qcom/iris/iris_venc.c @@ -62,8 +62,8 @@ int iris_venc_inst_init(struct iris_inst *inst) =20 inst->crop.left =3D 0; inst->crop.top =3D 0; - inst->crop.width =3D f->fmt.pix_mp.width; - inst->crop.height =3D f->fmt.pix_mp.height; + inst->crop.width =3D DEFAULT_WIDTH; + inst->crop.height =3D DEFAULT_HEIGHT; =20 inst->operating_rate =3D DEFAULT_FPS; inst->frame_rate =3D DEFAULT_FPS; --=20 2.43.0 From nobody Mon Feb 9 07:24:06 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0A4D2261B9E for ; Fri, 14 Nov 2025 03:11:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763089877; cv=none; b=gLcAHMAjVCP0S14esKAhjwiywOllqWXYjPucHe/ZjL5eCj+i5POQex8UIbXRxxmu2FboUKqruQw2o8PGHsWyTAI6w6qyv0QaUXvKAPHS1ILkp1Vsvs3H7AsYednm2dFVEO4Bpsf51x6SRKGlAWCtXJf1+qqWXrNr4HImFkMp+so= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763089877; c=relaxed/simple; bh=A5Xjh9wncFudH1x+WWV7p2S3djGgtZFVxWAzwpFk6Ak=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Vi86qfpDbU0kstQYXpshsL36IXSU1cvijAf4ZjdYl1h5ShwaEzRZyTFzOH5qhmZGL5DR16JFz+mW80bJV+opzAF/Qyx/rrP3W0h9qNDCXt/quxN7EgVEHJm6SNwDsiFcDjI9xrX/t+bpvhI5Y3buJDzREnGdbGG71a0qqxtxnpY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=fPzeB5c0; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=kjIfn2OP; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="fPzeB5c0"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="kjIfn2OP" Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 5ADMavgO1745467 for ; Fri, 14 Nov 2025 03:11:15 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= mW+piX9ZO4kQPQtL4o4eh4rpAaysTU/ChkQyerwYGdA=; b=fPzeB5c0ft3cJTZP D+eThkALAYF2DxhYa9EZ3oOOgCFQSDJJOhOMYfDBovyZt7A0veyUfm4K3PHl3ldq GgXdQ/MtBhMvNoa4CU8Mr6Wsmd+uMod3aq+TzbOOrdUhX9KvPk9uNJtoRSI7+gU+ vraN+B3LUGVAQH5h5Ak2+ABQ2J6IovzRXQCKUzxiOgi728wwNEgigi0us6mCv/eO u/VdZtvUGeorHas4lD+k9hYTIkVv+HudoO5KIV8EA9dJ9cZwdQYLWWFWqbW/M+4r B/IY81e4d5tbi2yOLz11OsGDgK5hf+Tysq/oSrfVHJSnLCjITCKdQw0WLvIvDW2L SneR+w== Received: from mail-pg1-f199.google.com (mail-pg1-f199.google.com [209.85.215.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4adr9egmnh-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Fri, 14 Nov 2025 03:11:15 +0000 (GMT) Received: by mail-pg1-f199.google.com with SMTP id 41be03b00d2f7-b99f6516262so3970928a12.3 for ; Thu, 13 Nov 2025 19:11:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1763089874; x=1763694674; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=mW+piX9ZO4kQPQtL4o4eh4rpAaysTU/ChkQyerwYGdA=; b=kjIfn2OPwAh7adhtFt1M21UHWR61vf2lhRzqzp0MHXnaDbENqBl38S5tzSfDD2n4UF +c+J/xJrjJ11HH3hQqgBHCZ3Hhk0mX2o8D9kAAwDCEBAW97Dc5m0E9AQnwM9yfgHbCls O9uvOo8R0ZlXmCYx8zrBsdOv3KvFJKnrX1dNwSWS2e3cGKG8sVB8WqGZj3WcF6LPSJ2C Wz5zP11YV0qkQWsP4L7nMmiXj1Si0THdsijhB+leG4suTXllPNleB4ukGVCbg0Bb2bf7 RINOdz95S49jozQxwfSB3jGZ5TaPR2/9ZR+30FUDHLDGEXBhCqf9NZTdO31jxBY4gH9f S4Yw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1763089874; x=1763694674; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=mW+piX9ZO4kQPQtL4o4eh4rpAaysTU/ChkQyerwYGdA=; b=gWjQSj01zmat6iCQmIm7Sg9aL49u4VSfgpCXGZMXz40doy6oFW+pL6s41RxZtTKtaK BUl4jj7mH3ejNG/FzgDdG931ieiBb4/Av8XMmt767HlRvfNf67VWtjO9kNPf+giKvs0m R+YouFzsWCunzRwdV2Lr4sB3NzPuRPqnkBiN59lFZXamGgqFoavy4k6aeHZrYfTh5KAM oXlgQNWK0HkMvCytTxBYUSw2inJ8VGvsCPkdSYDVPR1tPs+cl2jQsWy09sKxdC5FqD0K Iq0nKWOCCqbK+Y2G2ftjcTOaQQbpfkLqDwo+aaFgJ8d3Rj+Vni7WgBcmpBjygk1ZtvfM Fv2g== X-Forwarded-Encrypted: i=1; AJvYcCXpwZ5YjAtMMA0SiKyLrHI64RlfsEGAJ2mQOl0piopfdFWBNd66/isrkOizFxfnCzENL42Gm1VkoH35XSM=@vger.kernel.org X-Gm-Message-State: AOJu0Yyq0hVSgX9CooSZGhIC/1CPw218ruJu3UxYLRbMnUEJfy12OWTx tai8qJk/pcR/vV76oHIl+9nGOdZb1wgbTPC+exuO0KlemfLAmZlr36EciqmB4zkkGa4GyA0MndY 1EKDXxj7zuBBAoW7ekoczRrvt7GpvPR/C55guWYYChESR5ET5fTxEBO61JOefv8pvajc= X-Gm-Gg: ASbGncuSsxoaCbE8xgGMIyX4lnhsial3lEIeqGlm3U+6fHm5ZNvEkKUyWPPrpoW9Opl 1d4os3L1+8nIO4ZIPN2xYa6i5GUwsVWNPQ4vrDUVOpZOh/fx2ol6KFJnyQB+O2D/zikgxLwnngw HYshqxx2Bn0JXsIBS8Wl41IUecUb7i/CA3pKZQRsLDC5PbRzxQ2wDSynEGgzW8XBO22eWoUoiV6 rm1CCXLUk/oq497OeFpjZLbHcl9mkpqZFJQQ1BdrEGvGqfqPc2XmEA1hNmNGjdOR6tXbZdKSrPW agjOyw8W10S/MHsZRFtCfQofp9c5GsWiDEeT+3lPIifMdO+knCokmAS3kzF7pXokvoOEA3yoqhk sr7+uAe9KYiYy5066ExivGUg9AFfWPaVzOghxWQTd401cbwFUwM+BgUzrTRDgQVIcQ2gQPLYLm7 T6yZJldIRk X-Received: by 2002:a05:6a20:7484:b0:33f:df99:11e9 with SMTP id adf61e73a8af0-35b9fa7ee06mr2545530637.11.1763089874367; Thu, 13 Nov 2025 19:11:14 -0800 (PST) X-Google-Smtp-Source: AGHT+IG3nkHNrSPmuFu/yJsvime+BRzfD1WCytpyCuZ8oUFXCYWKKBNwuhbQRm2FC05Dh3jF5oae+Q== X-Received: by 2002:a05:6a20:7484:b0:33f:df99:11e9 with SMTP id adf61e73a8af0-35b9fa7ee06mr2545483637.11.1763089873830; Thu, 13 Nov 2025 19:11:13 -0800 (PST) Received: from WANGAOW-LAB01.ap.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com. [103.229.16.4]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7b92714e298sm3598555b3a.34.2025.11.13.19.11.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Nov 2025 19:11:13 -0800 (PST) From: Wangao Wang Date: Fri, 14 Nov 2025 11:09:00 +0800 Subject: [PATCH v6 3/6] media: qcom: iris: Add scale support for encoder Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251114-iris_encoder_enhancements-v6-3-d6d35a92635d@oss.qualcomm.com> References: <20251114-iris_encoder_enhancements-v6-0-d6d35a92635d@oss.qualcomm.com> In-Reply-To: <20251114-iris_encoder_enhancements-v6-0-d6d35a92635d@oss.qualcomm.com> To: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Wangao Wang , Neil Armstrong , quic_qiweil@quicinc.com, quic_renjiang@quicinc.com, Bryan O'Donoghue X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1763089858; l=9733; i=wangao.wang@oss.qualcomm.com; s=20251021; h=from:subject:message-id; bh=A5Xjh9wncFudH1x+WWV7p2S3djGgtZFVxWAzwpFk6Ak=; b=jYE8PIh/jbCZFZAvu6DW5o7CYHmS7Q/9m2KnTpy8MD/qGUNY8ngeka2XulVWb8D0JcH2bwpEs qYOnUUVTnj1Dh7m2HrukTgDCTBkiR/q36jeko3RZvrxnkmhY/wCdXij X-Developer-Key: i=wangao.wang@oss.qualcomm.com; a=ed25519; pk=bUPgYblBUAsoPyGfssbNR7ZXUSGF8v1VF4FJzSO6/aA= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTE0MDAyMiBTYWx0ZWRfXzDbVW60TbHLA WSBjhRZTNaUj9L61qcJ+sQA4BITl7UiSlf3tM1vxd6I5k0tDEN50Z/9AJRLQqrJNBSCHvJUW/G6 ZmIVUZnN1ztPxbWUQh7PZBoNRwkj9cQqcVKF65l68naMxdomjRuJ1RqSe+C46z8shyvDvkWEkxN JUUItoNjzFj6x88zvNYSOmN3yDQlwghnd3V65NS7+vy6/WAUgwqkE+wWczoI+n1dqccDvQd3K+T qNmVQTJQAaCigFgKPM7aE9gGrfaSEWaasP1X3/zi60DcqkJlMBPxz9CVQJPkvVzsqj0b/jmB/OW CieRIQqJZkaVicitiPUadPyZkP8gCSz/APyu0f99EGM2mL+zK1P/1wC0FMjJ4Lefdu1pk3gwBpD ZRLMM4kww3jOpOMByXECX6y8YDohQw== X-Proofpoint-ORIG-GUID: WdB56xFK1v9V6YVnoWhw_RFt0HxjVrVJ X-Authority-Analysis: v=2.4 cv=Afu83nXG c=1 sm=1 tr=0 ts=69169dd3 cx=c_pps a=Oh5Dbbf/trHjhBongsHeRQ==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=Z8iH8PakIHK9AZBxCNEA:9 a=QEXdDO2ut3YA:10 a=_Vgx9l1VpLgwpw_dHYaR:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-GUID: WdB56xFK1v9V6YVnoWhw_RFt0HxjVrVJ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-13_07,2025-11-13_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 phishscore=0 suspectscore=0 impostorscore=0 adultscore=0 lowpriorityscore=0 bulkscore=0 clxscore=1015 malwarescore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511140022 Add members enc_scale_width, enc_scale_height to the struct iris_inst to support scale requirements. Add output width and height settings in iris_venc_s_fmt_output to enable scaling functionality. Add VPSS buffer to platform data, which the scale function requires. Reviewed-by: Bryan O'Donoghue Reviewed-by: Dikshita Agarwal Tested-by: Neil Armstrong # on SM8650-HDK Signed-off-by: Wangao Wang --- .../platform/qcom/iris/iris_hfi_gen2_command.c | 12 +++++------ .../platform/qcom/iris/iris_hfi_gen2_response.c | 2 ++ drivers/media/platform/qcom/iris/iris_instance.h | 4 ++++ .../media/platform/qcom/iris/iris_platform_gen2.c | 12 +++++++++++ drivers/media/platform/qcom/iris/iris_venc.c | 23 ++++++++++++++++++= +++- drivers/media/platform/qcom/iris/iris_vpu_buffer.c | 9 +++++---- 6 files changed, 51 insertions(+), 11 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c b/dri= vers/media/platform/qcom/iris/iris_hfi_gen2_command.c index 8250e0d6f0a8916f3389be60dba762f3b4f3c690..94c996c6eeceb36d5e63e3ddb0d= 402d7138f94c4 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c @@ -194,8 +194,8 @@ static int iris_hfi_gen2_set_bitstream_resolution(struc= t iris_inst *inst, u32 pl payload_type =3D HFI_PAYLOAD_U32; } else { codec_align =3D inst->codec =3D=3D V4L2_PIX_FMT_HEVC ? 32 : 16; - resolution =3D ALIGN(inst->fmt_dst->fmt.pix_mp.width, codec_align) << 16= | - ALIGN(inst->fmt_dst->fmt.pix_mp.height, codec_align); + resolution =3D ALIGN(inst->enc_scale_width, codec_align) << 16 | + ALIGN(inst->enc_scale_height, codec_align); inst_hfi_gen2->dst_subcr_params.bitstream_resolution =3D resolution; payload_type =3D HFI_PAYLOAD_32_PACKED; } @@ -237,10 +237,10 @@ static int iris_hfi_gen2_set_crop_offsets(struct iris= _inst *inst, u32 plane) left_offset =3D inst->crop.left; top_offset =3D inst->crop.top; } else { - bottom_offset =3D (ALIGN(inst->fmt_dst->fmt.pix_mp.height, codec_align)= - - inst->fmt_dst->fmt.pix_mp.height); - right_offset =3D (ALIGN(inst->fmt_dst->fmt.pix_mp.width, codec_align) - - inst->fmt_dst->fmt.pix_mp.width); + bottom_offset =3D (ALIGN(inst->enc_scale_height, codec_align) - + inst->enc_scale_height); + right_offset =3D (ALIGN(inst->enc_scale_width, codec_align) - + inst->enc_scale_width); left_offset =3D 0; top_offset =3D 0; } diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen2_response.c b/dr= ivers/media/platform/qcom/iris/iris_hfi_gen2_response.c index 2f1f118eae4f6462ab1aa1d16844b34e6e699f1e..dc3e606b6ab429a1d15536fa831= 6afb1e384d674 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen2_response.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen2_response.c @@ -54,6 +54,8 @@ static u32 iris_hfi_gen2_buf_type_to_driver(struct iris_i= nst *inst, return BUF_SCRATCH_2; case HFI_BUFFER_PERSIST: return BUF_PERSIST; + case HFI_BUFFER_VPSS: + return BUF_VPSS; default: return 0; } diff --git a/drivers/media/platform/qcom/iris/iris_instance.h b/drivers/med= ia/platform/qcom/iris/iris_instance.h index a95244cf6d30cd81199b9f1e51bf64c991be1790..0a0d4ace0bb6bee6ab11bd47fdd= b27432cd524f7 100644 --- a/drivers/media/platform/qcom/iris/iris_instance.h +++ b/drivers/media/platform/qcom/iris/iris_instance.h @@ -71,6 +71,8 @@ struct iris_fmt { * @hfi_rc_type: rate control type * @enc_raw_width: source image width for encoder instance * @enc_raw_height: source image height for encoder instance + * @enc_scale_width: scale width for encoder instance + * @enc_scale_height: scale height for encoder instance */ =20 struct iris_inst { @@ -111,6 +113,8 @@ struct iris_inst { u32 hfi_rc_type; u32 enc_raw_width; u32 enc_raw_height; + u32 enc_scale_width; + u32 enc_scale_height; }; =20 #endif diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/driver= s/media/platform/qcom/iris/iris_platform_gen2.c index c1989240c248601c34b84f508f1b72d72f81260a..f1f9ee8a93560c0875a396f6197= d4b42e3d2612c 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -728,6 +728,10 @@ static const u32 sm8550_dec_op_int_buf_tbl[] =3D { BUF_DPB, }; =20 +static const u32 sm8550_enc_ip_int_buf_tbl[] =3D { + BUF_VPSS, +}; + static const u32 sm8550_enc_op_int_buf_tbl[] =3D { BUF_BIN, BUF_COMV, @@ -815,6 +819,8 @@ const struct iris_platform_data sm8550_data =3D { .dec_op_int_buf_tbl =3D sm8550_dec_op_int_buf_tbl, .dec_op_int_buf_tbl_size =3D ARRAY_SIZE(sm8550_dec_op_int_buf_tbl), =20 + .enc_ip_int_buf_tbl =3D sm8550_enc_ip_int_buf_tbl, + .enc_ip_int_buf_tbl_size =3D ARRAY_SIZE(sm8550_enc_ip_int_buf_tbl), .enc_op_int_buf_tbl =3D sm8550_enc_op_int_buf_tbl, .enc_op_int_buf_tbl_size =3D ARRAY_SIZE(sm8550_enc_op_int_buf_tbl), }; @@ -907,6 +913,8 @@ const struct iris_platform_data sm8650_data =3D { .dec_op_int_buf_tbl =3D sm8550_dec_op_int_buf_tbl, .dec_op_int_buf_tbl_size =3D ARRAY_SIZE(sm8550_dec_op_int_buf_tbl), =20 + .enc_ip_int_buf_tbl =3D sm8550_enc_ip_int_buf_tbl, + .enc_ip_int_buf_tbl_size =3D ARRAY_SIZE(sm8550_enc_ip_int_buf_tbl), .enc_op_int_buf_tbl =3D sm8550_enc_op_int_buf_tbl, .enc_op_int_buf_tbl_size =3D ARRAY_SIZE(sm8550_enc_op_int_buf_tbl), }; @@ -988,6 +996,8 @@ const struct iris_platform_data sm8750_data =3D { .dec_op_int_buf_tbl =3D sm8550_dec_op_int_buf_tbl, .dec_op_int_buf_tbl_size =3D ARRAY_SIZE(sm8550_dec_op_int_buf_tbl), =20 + .enc_ip_int_buf_tbl =3D sm8550_enc_ip_int_buf_tbl, + .enc_ip_int_buf_tbl_size =3D ARRAY_SIZE(sm8550_enc_ip_int_buf_tbl), .enc_op_int_buf_tbl =3D sm8550_enc_op_int_buf_tbl, .enc_op_int_buf_tbl_size =3D ARRAY_SIZE(sm8550_enc_op_int_buf_tbl), }; @@ -1075,6 +1085,8 @@ const struct iris_platform_data qcs8300_data =3D { .dec_op_int_buf_tbl =3D sm8550_dec_op_int_buf_tbl, .dec_op_int_buf_tbl_size =3D ARRAY_SIZE(sm8550_dec_op_int_buf_tbl), =20 + .enc_ip_int_buf_tbl =3D sm8550_enc_ip_int_buf_tbl, + .enc_ip_int_buf_tbl_size =3D ARRAY_SIZE(sm8550_enc_ip_int_buf_tbl), .enc_op_int_buf_tbl =3D sm8550_enc_op_int_buf_tbl, .enc_op_int_buf_tbl_size =3D ARRAY_SIZE(sm8550_enc_op_int_buf_tbl), }; diff --git a/drivers/media/platform/qcom/iris/iris_venc.c b/drivers/media/p= latform/qcom/iris/iris_venc.c index 71f4263ada898ce8333086db59e386e91b34ed60..51162690168e6e6db923e635fe1= 7932ad509d782 100644 --- a/drivers/media/platform/qcom/iris/iris_venc.c +++ b/drivers/media/platform/qcom/iris/iris_venc.c @@ -70,6 +70,8 @@ int iris_venc_inst_init(struct iris_inst *inst) =20 inst->enc_raw_width =3D DEFAULT_WIDTH; inst->enc_raw_height =3D DEFAULT_HEIGHT; + inst->enc_scale_width =3D DEFAULT_WIDTH; + inst->enc_scale_height =3D DEFAULT_HEIGHT; =20 memcpy(&inst->fw_caps[0], &core->inst_fw_caps_enc[0], INST_FW_CAP_MAX * sizeof(struct platform_inst_fw_cap)); @@ -226,15 +228,32 @@ int iris_venc_try_fmt(struct iris_inst *inst, struct = v4l2_format *f) =20 static int iris_venc_s_fmt_output(struct iris_inst *inst, struct v4l2_form= at *f) { + const struct iris_fmt *venc_fmt; struct v4l2_format *fmt; + u32 codec_align; =20 iris_venc_try_fmt(inst, f); =20 - if (!(find_format(inst, f->fmt.pix_mp.pixelformat, f->type))) + venc_fmt =3D find_format(inst, f->fmt.pix_mp.pixelformat, f->type); + if (!venc_fmt) return -EINVAL; =20 + codec_align =3D venc_fmt->pixfmt =3D=3D V4L2_PIX_FMT_HEVC ? 32 : 16; + fmt =3D inst->fmt_dst; fmt->type =3D V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; + /* + * If output format size !=3D input format size, + * it is considered a scaling case, + * and the scaled size needs to be saved. + */ + if (f->fmt.pix_mp.width !=3D inst->fmt_src->fmt.pix_mp.width || + f->fmt.pix_mp.height !=3D inst->fmt_src->fmt.pix_mp.height) { + inst->enc_scale_width =3D f->fmt.pix_mp.width; + inst->enc_scale_height =3D f->fmt.pix_mp.height; + fmt->fmt.pix_mp.width =3D ALIGN(f->fmt.pix_mp.width, codec_align); + fmt->fmt.pix_mp.height =3D ALIGN(f->fmt.pix_mp.height, codec_align); + } fmt->fmt.pix_mp.num_planes =3D 1; fmt->fmt.pix_mp.plane_fmt[0].bytesperline =3D 0; fmt->fmt.pix_mp.plane_fmt[0].sizeimage =3D iris_get_buffer_size(inst, BUF= _OUTPUT); @@ -292,6 +311,8 @@ static int iris_venc_s_fmt_input(struct iris_inst *inst= , struct v4l2_format *f) =20 inst->enc_raw_width =3D f->fmt.pix_mp.width; inst->enc_raw_height =3D f->fmt.pix_mp.height; + inst->enc_scale_width =3D f->fmt.pix_mp.width; + inst->enc_scale_height =3D f->fmt.pix_mp.height; =20 if (f->fmt.pix_mp.width !=3D inst->crop.width || f->fmt.pix_mp.height !=3D inst->crop.height) { diff --git a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c b/drivers/m= edia/platform/qcom/iris/iris_vpu_buffer.c index 4463be05ce165adef6b152eb0c155d2e6a7b3c36..db5adadd1b39c06bc41ae6f1b3d= 2f924b3ebf150 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c +++ b/drivers/media/platform/qcom/iris/iris_vpu_buffer.c @@ -1131,10 +1131,11 @@ static u32 iris_vpu_enc_arp_size(struct iris_inst *= inst) =20 inline bool is_scaling_enabled(struct iris_inst *inst) { - return inst->crop.left !=3D inst->compose.left || - inst->crop.top !=3D inst->compose.top || - inst->crop.width !=3D inst->compose.width || - inst->crop.height !=3D inst->compose.height; + struct v4l2_pix_format_mplane *dst_fmt =3D &inst->fmt_dst->fmt.pix_mp; + struct v4l2_pix_format_mplane *src_fmt =3D &inst->fmt_src->fmt.pix_mp; + + return dst_fmt->width !=3D src_fmt->width || + dst_fmt->height !=3D src_fmt->height; } =20 static inline --=20 2.43.0 From nobody Mon Feb 9 07:24:06 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2086926C3BC for ; Fri, 14 Nov 2025 03:11:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763089881; cv=none; b=KLHbaDLqIENmDTiCUqY6SYtPCrvGEq/o5jkgPDoOtD9NRODf4oDwJ9qkj1LLAN1JhisEsVOsyqJsEQ7/jz80AtW/1Z+BSQC2ZbF0XcTtFUpf08qEdJdQAPGKZabNg/EejxbY52T+VUj2HBx0GnEvSMP96E9aGHn5y+ZPeALpw/8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763089881; c=relaxed/simple; bh=oL5dAWu67nMWj9elYY6TpZu6ly6sGSrd/2TbVB1R82s=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Qrm47mhQRpkZrVDU2SuA/4+gKVJzQDRjHL3yYlMoZJcUGc4yJkQuHeaGQHEc7B/+05dm+rHPMGxjydbea/jE1wSZaU33LKjrR0WMqpXJfXYZnmrF2bxRC8eAybWzFVQuw7j6NISuMSDG+oELWUAXgud3D1iC8tV8WUQ2PSS+svM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=SG9FBZu9; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=OMFLOreD; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="SG9FBZu9"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="OMFLOreD" Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 5ADMbpkx1747910 for ; Fri, 14 Nov 2025 03:11:19 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= pk9f+4OOCJ8o6XMs6Vn+C/tafSb+E8hKTE80nWkqEGs=; b=SG9FBZu9duxi4wtr f0rifUDedzfw5AkKQ2vVWkdxqaVE0sHfsh20S5lwqryupgpF+eVaXpURiE9axGbH bfiKQK735Sn7i1lpZEvW2Acq1uxin/FUijdvXA9emm4CdXSU8w/Nrqb+VNq8Ed2g z/l4/NSyfQbKLW/azqghStM7EMIWGehbQxaQ+Yhmwp8h3xW8tvHJyPEyvjfwsAe3 HsrOTzM5dPjRsKUyyBmYbhq0wA+yiyXckAXnTA0ijdj73zRgg1ETQI6yLdlIBZOa /oKBmwRk90vKgsPtrHA4AgMi5RSq4MWv4A2UNvPdoqzMRT8/8XVYzT3/3MGVFwt6 LH19UA== Received: from mail-pf1-f198.google.com (mail-pf1-f198.google.com [209.85.210.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4adr9egmnq-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Fri, 14 Nov 2025 03:11:18 +0000 (GMT) Received: by mail-pf1-f198.google.com with SMTP id d2e1a72fcca58-7a99a5f77e0so2871038b3a.2 for ; Thu, 13 Nov 2025 19:11:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1763089878; x=1763694678; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=pk9f+4OOCJ8o6XMs6Vn+C/tafSb+E8hKTE80nWkqEGs=; b=OMFLOreDARC/lfblUu1WpLr/xX/1BBC8btEXaeVtLUNiFNI7wm9a9WxBtZLNnZAvyr eQ7hf9FRsE7+PuSYqjYMLb81tgjMOnSQ0BkptP9dEkPQleueDhPzQRljMr8kN9+Xuo1v vfndR7AzvOIg9YPDJbhh1S+R69R0Hxt339L1Yy8V2Y5llMi3pFM51hLDTGRe/4be958K Zx1bBhS3xEaX7Qh9q569dgIbzjSpXDC0f7cnCb1sGeRrYVYpaItcem0VYlUWSmqL0dsS DQuLQmsDydWMnNEQrQztqrqgSoI7X8J7q8+/aIlTQEAv/0u6MU4ym6qLpIa1s2x8W31p D+PQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1763089878; x=1763694678; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=pk9f+4OOCJ8o6XMs6Vn+C/tafSb+E8hKTE80nWkqEGs=; b=c0+8OicbMvxawLl859wp5+HAsS8jebQZ9N8ejLg1ZfP2Kq6U28xfhp57VAZD/iGGK/ WD258FE3xt4xHkbkH8auPQndOv3kNE/TfoHmvB8xH3760uKR+di4PxcdlX5wCh0EUo/F mK3zKzuN7x1qEP8KZMZjBMuCUxhjHTtExcUfSBGGujeHAwXlnPjqm3em3A89K8yV8fb8 AixPxBzIncAjCorOv7BSKTwFSYHYOPY+lAH2zQy/UtNtvG8A5di0aXjP3kKQqEOHm48s BLmvEm/xBtg2b5/KC5v0keNM5lMSjINOVnlD9WD46Dv9G9ZQhcODgJgY0VBK65Akb3xL cI8w== X-Forwarded-Encrypted: i=1; AJvYcCXZI8AKEhP5LfHKg6A2yYFgZ79VPJ12wS57xcGKrShHISj9PCji/rS91tLqGbu0fP/JDaalyo0WiuVMjnE=@vger.kernel.org X-Gm-Message-State: AOJu0YzFRNuW2upYYwGYlEtk/8fJmJnJB2z+wC1f3vtTSvIVUz2f92dw 03Add43YwAsXRrkpmV9SNRtsYpMywp/EUlSNXS/Mzt14x81TWkJzKM+/SRExfoeCQkFvkNO/gZK 3/GzxuNH8coI+OXwzQ+s34AH3WT7823ADBDtvgSkKarq7JLdor6TQ3sXr8HZTbfKuVOo= X-Gm-Gg: ASbGncsNT3fXy7Tpfn47vwOsOqas0Tg/rSPS/uUOyZc7wO+JGT4bHhVswzy32A/z8Zw +YUNoV16hE4O5tz0tbuT4e/rdOmNo034iM6++ZpqLdyt6bu/dlywdBOjF7daqFeJuB3z0Xl2Fpa i/M5MjqdhISKMLsTO9ejHRxnZ0LtGPSLEegCjIpAaOjEK+w7nkl/r21PpV5HKSUGcy75Qkur2hb b/WnhFOFHDPmd9qTk9MHxZ1EHbQDxRRrFYbR82aycZw56Hf7L2x39B/SGUv41morJWRWQ9tQVK2 UAkSriZl8qy6vgsf6nmUZUiiFfwyIMWB2YXo+lcOY3pPoNXyctbOMYSOF8PiEyz9man094PJLUK QuzWZPURzReKw69/1YFN8IFP5vHwzta1+UqZ9WMbLVo5GZXQhR2X5XU0LnW8wfV4CbjFiH3LRqg ZrXBCPc6Q3 X-Received: by 2002:a05:6a00:a28:b0:7b8:a505:3f40 with SMTP id d2e1a72fcca58-7ba39bea46fmr1958187b3a.13.1763089878008; Thu, 13 Nov 2025 19:11:18 -0800 (PST) X-Google-Smtp-Source: AGHT+IHlvJ8Y3eFcIbvnW+6xKfF9o6Jc9K8Q7WjAKs60mlokvqs1ICK+dgYQG0Rx29pCLc0XJu2kig== X-Received: by 2002:a05:6a00:a28:b0:7b8:a505:3f40 with SMTP id d2e1a72fcca58-7ba39bea46fmr1958157b3a.13.1763089877422; Thu, 13 Nov 2025 19:11:17 -0800 (PST) Received: from WANGAOW-LAB01.ap.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com. [103.229.16.4]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7b92714e298sm3598555b3a.34.2025.11.13.19.11.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Nov 2025 19:11:16 -0800 (PST) From: Wangao Wang Date: Fri, 14 Nov 2025 11:09:01 +0800 Subject: [PATCH v6 4/6] media: qcom: iris: Add rotation support for encoder Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251114-iris_encoder_enhancements-v6-4-d6d35a92635d@oss.qualcomm.com> References: <20251114-iris_encoder_enhancements-v6-0-d6d35a92635d@oss.qualcomm.com> In-Reply-To: <20251114-iris_encoder_enhancements-v6-0-d6d35a92635d@oss.qualcomm.com> To: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Wangao Wang , Neil Armstrong , quic_qiweil@quicinc.com, quic_renjiang@quicinc.com X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1763089858; l=14682; i=wangao.wang@oss.qualcomm.com; s=20251021; h=from:subject:message-id; bh=oL5dAWu67nMWj9elYY6TpZu6ly6sGSrd/2TbVB1R82s=; b=abEyiBogQhkthW8lx3tq4AWXY65TyVN5mRChzo+ve9igAH3vuORG7N0/7kBqdmfD9Lj/zuGPa HjY9+QwGfXVC6QEJ2fztnCVgMAl3CALWMOoZla2PeOou/HWbMrkxCzB X-Developer-Key: i=wangao.wang@oss.qualcomm.com; a=ed25519; pk=bUPgYblBUAsoPyGfssbNR7ZXUSGF8v1VF4FJzSO6/aA= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTE0MDAyMyBTYWx0ZWRfX3tq9rssv68Ce HYseNnduE2TlnTGbSxb8+hIfd3Rs4YBWOMY0pHPpxzFi+fcBY9s96o9QIIiHs/8aLCXQPt6lO3b +53i9XdDHyEA6+5KGi6s4KWCoNYIjALGnFRvPbo0WBcOj6k+R8M8gii0693UhZiUxGwKaP6NUg+ tNNWjypicCv+dN2jVyMVUsUPnTmEr6xqHcOhh4cOVF8dj77kd+dsPjXKZ4cbLnFPNQqfxj/9bX5 2g3xiD8Bb8s1toD14bqbcXwa6WVI7oDb0z/tL1H+EglNnnwSAixggVqd1MO56aXjUPO0iKfBvsW dNBpfLWGuqx8KHUxwRl3O7LGHKEJLw4z/6X8O3j1n6Pw6YfuJBPK+vV1F/WIJbLJCc9o/jfsPCV gsjmwHqkwZyzQ/1raN9Pb//+Jtn6MA== X-Proofpoint-ORIG-GUID: L0E6XqFrgTDIKXJUvplQiGHbx38bTgpz X-Authority-Analysis: v=2.4 cv=Afu83nXG c=1 sm=1 tr=0 ts=69169dd7 cx=c_pps a=m5Vt/hrsBiPMCU0y4gIsQw==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=KKAkSRfTAAAA:8 a=0PQ7lrkXE1FeiLWnmyUA:9 a=QEXdDO2ut3YA:10 a=IoOABgeZipijB_acs4fv:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-GUID: L0E6XqFrgTDIKXJUvplQiGHbx38bTgpz X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-13_07,2025-11-13_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 phishscore=0 suspectscore=0 impostorscore=0 adultscore=0 lowpriorityscore=0 bulkscore=0 clxscore=1015 malwarescore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511140023 Add rotation control for encoder, enabling V4L2_CID_ROTATE and handling 90/180/270 degree rotation. Reviewed-by: Dikshita Agarwal Co-developed-by: Neil Armstrong Signed-off-by: Neil Armstrong Tested-by: Neil Armstrong # on SM8650-HDK Signed-off-by: Wangao Wang --- drivers/media/platform/qcom/iris/iris_ctrls.c | 34 +++++++++++++++ drivers/media/platform/qcom/iris/iris_ctrls.h | 1 + .../platform/qcom/iris/iris_hfi_gen2_command.c | 41 ++++++++++++----- .../platform/qcom/iris/iris_hfi_gen2_defines.h | 9 ++++ .../platform/qcom/iris/iris_platform_common.h | 1 + .../media/platform/qcom/iris/iris_platform_gen2.c | 10 +++++ drivers/media/platform/qcom/iris/iris_utils.c | 6 +++ drivers/media/platform/qcom/iris/iris_utils.h | 1 + drivers/media/platform/qcom/iris/iris_vpu_buffer.c | 51 +++++++++++++-----= ---- 9 files changed, 123 insertions(+), 31 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.c b/drivers/media/= platform/qcom/iris/iris_ctrls.c index c0b3a09ad3e3dfb0a47e3603a8089cf61390fda8..9c20db9eaa1808941b8d1c9213c= 7dcd36464b4c7 100644 --- a/drivers/media/platform/qcom/iris/iris_ctrls.c +++ b/drivers/media/platform/qcom/iris/iris_ctrls.c @@ -98,6 +98,8 @@ static enum platform_inst_fw_cap_type iris_get_cap_id(u32= id) return B_FRAME_QP_H264; case V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP: return B_FRAME_QP_HEVC; + case V4L2_CID_ROTATE: + return ROTATION; default: return INST_FW_CAP_MAX; } @@ -185,6 +187,8 @@ static u32 iris_get_v4l2_id(enum platform_inst_fw_cap_t= ype cap_id) return V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP; case B_FRAME_QP_HEVC: return V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP; + case ROTATION: + return V4L2_CID_ROTATE; default: return 0; } @@ -893,6 +897,36 @@ int iris_set_qp_range(struct iris_inst *inst, enum pla= tform_inst_fw_cap_type cap &range, sizeof(range)); } =20 +int iris_set_rotation(struct iris_inst *inst, enum platform_inst_fw_cap_ty= pe cap_id) +{ + const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; + u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + u32 hfi_val; + + switch (inst->fw_caps[cap_id].value) { + case 0: + hfi_val =3D HFI_ROTATION_NONE; + return 0; + case 90: + hfi_val =3D HFI_ROTATION_90; + break; + case 180: + hfi_val =3D HFI_ROTATION_180; + break; + case 270: + hfi_val =3D HFI_ROTATION_270; + break; + default: + return -EINVAL; + } + + return hfi_ops->session_set_property(inst, hfi_id, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_U32, + &hfi_val, sizeof(u32)); +} + int iris_set_properties(struct iris_inst *inst, u32 plane) { const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.h b/drivers/media/= platform/qcom/iris/iris_ctrls.h index 30af333cc4941e737eb1ae83a6944b4192896e23..3ea0a00c7587a516f19bb7307a0= eb9a60c856ab0 100644 --- a/drivers/media/platform/qcom/iris/iris_ctrls.h +++ b/drivers/media/platform/qcom/iris/iris_ctrls.h @@ -32,6 +32,7 @@ int iris_set_min_qp(struct iris_inst *inst, enum platform= _inst_fw_cap_type cap_i int iris_set_max_qp(struct iris_inst *inst, enum platform_inst_fw_cap_type= cap_id); int iris_set_frame_qp(struct iris_inst *inst, enum platform_inst_fw_cap_ty= pe cap_id); int iris_set_qp_range(struct iris_inst *inst, enum platform_inst_fw_cap_ty= pe cap_id); +int iris_set_rotation(struct iris_inst *inst, enum platform_inst_fw_cap_ty= pe cap_id); int iris_set_properties(struct iris_inst *inst, u32 plane); =20 #endif diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c b/dri= vers/media/platform/qcom/iris/iris_hfi_gen2_command.c index 94c996c6eeceb36d5e63e3ddb0d402d7138f94c4..84a117e8201c54de2d0b86840cb= d9b3dda23f015 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c @@ -180,22 +180,36 @@ static int iris_hfi_gen2_set_raw_resolution(struct ir= is_inst *inst, u32 plane) sizeof(u32)); } =20 +static inline u32 iris_hfi_get_aligned_resolution(struct iris_inst *inst, = u32 width, u32 height) +{ + u32 codec_align =3D inst->codec =3D=3D V4L2_PIX_FMT_HEVC ? 32 : 16; + + return (ALIGN(width, codec_align) << 16 | ALIGN(height, codec_align)); +} + static int iris_hfi_gen2_set_bitstream_resolution(struct iris_inst *inst, = u32 plane) { struct iris_inst_hfi_gen2 *inst_hfi_gen2 =3D to_iris_inst_hfi_gen2(inst); u32 port =3D iris_hfi_gen2_get_port(inst, plane); enum hfi_packet_payload_info payload_type; - u32 resolution, codec_align; + u32 width, height; + u32 resolution; =20 if (inst->domain =3D=3D DECODER) { - resolution =3D inst->fmt_src->fmt.pix_mp.width << 16 | - inst->fmt_src->fmt.pix_mp.height; + width =3D inst->fmt_src->fmt.pix_mp.width; + height =3D inst->fmt_src->fmt.pix_mp.height; + resolution =3D iris_hfi_get_aligned_resolution(inst, width, height); inst_hfi_gen2->src_subcr_params.bitstream_resolution =3D resolution; payload_type =3D HFI_PAYLOAD_U32; } else { - codec_align =3D inst->codec =3D=3D V4L2_PIX_FMT_HEVC ? 32 : 16; - resolution =3D ALIGN(inst->enc_scale_width, codec_align) << 16 | - ALIGN(inst->enc_scale_height, codec_align); + if (is_rotation_90_or_270(inst)) { + width =3D inst->enc_scale_height; + height =3D inst->enc_scale_width; + } else { + width =3D inst->enc_scale_width; + height =3D inst->enc_scale_height; + } + resolution =3D iris_hfi_get_aligned_resolution(inst, width, height); inst_hfi_gen2->dst_subcr_params.bitstream_resolution =3D resolution; payload_type =3D HFI_PAYLOAD_32_PACKED; } @@ -237,10 +251,17 @@ static int iris_hfi_gen2_set_crop_offsets(struct iris= _inst *inst, u32 plane) left_offset =3D inst->crop.left; top_offset =3D inst->crop.top; } else { - bottom_offset =3D (ALIGN(inst->enc_scale_height, codec_align) - - inst->enc_scale_height); - right_offset =3D (ALIGN(inst->enc_scale_width, codec_align) - - inst->enc_scale_width); + if (is_rotation_90_or_270(inst)) { + bottom_offset =3D (ALIGN(inst->enc_scale_width, codec_align) - + inst->enc_scale_width); + right_offset =3D (ALIGN(inst->enc_scale_height, codec_align) - + inst->enc_scale_height); + } else { + bottom_offset =3D (ALIGN(inst->enc_scale_height, codec_align) - + inst->enc_scale_height); + right_offset =3D (ALIGN(inst->enc_scale_width, codec_align) - + inst->enc_scale_width); + } left_offset =3D 0; top_offset =3D 0; } diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h b/dri= vers/media/platform/qcom/iris/iris_hfi_gen2_defines.h index 1b6a4dbac828ffea53c1be0d3624a033c283c972..53cb1849055364106beaeaf179d= d836d9c2e7a3c 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h @@ -83,6 +83,15 @@ enum hfi_seq_header_mode { }; =20 #define HFI_PROP_SEQ_HEADER_MODE 0x03000149 + +enum hfi_rotation { + HFI_ROTATION_NONE =3D 0x00000000, + HFI_ROTATION_90 =3D 0x00000001, + HFI_ROTATION_180 =3D 0x00000002, + HFI_ROTATION_270 =3D 0x00000003, +}; + +#define HFI_PROP_ROTATION 0x0300014b #define HFI_PROP_SIGNAL_COLOR_INFO 0x03000155 #define HFI_PROP_PICTURE_TYPE 0x03000162 #define HFI_PROP_DEC_DEFAULT_HEADER 0x03000168 diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/driv= ers/media/platform/qcom/iris/iris_platform_common.h index 8d8cdb56a3c7722c06287d4d10feed14ba2b254c..5337ea836470253130cf47a790a= bbb023f4d5acd 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -143,6 +143,7 @@ enum platform_inst_fw_cap_type { P_FRAME_QP_HEVC, B_FRAME_QP_H264, B_FRAME_QP_HEVC, + ROTATION, INST_FW_CAP_MAX, }; =20 diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/driver= s/media/platform/qcom/iris/iris_platform_gen2.c index f1f9ee8a93560c0875a396f6197d4b42e3d2612c..5f598d6028077a611d5dcdd453e= 62676f5c1ae8d 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -586,6 +586,16 @@ static const struct platform_inst_fw_cap inst_fw_cap_s= m8550_enc[] =3D { .flags =3D CAP_FLAG_OUTPUT_PORT, .set =3D iris_set_u32, }, + { + .cap_id =3D ROTATION, + .min =3D 0, + .max =3D 270, + .step_or_mask =3D 90, + .value =3D 0, + .hfi_id =3D HFI_PROP_ROTATION, + .flags =3D CAP_FLAG_OUTPUT_PORT, + .set =3D iris_set_rotation, + }, }; =20 static struct platform_inst_caps platform_inst_cap_sm8550 =3D { diff --git a/drivers/media/platform/qcom/iris/iris_utils.c b/drivers/media/= platform/qcom/iris/iris_utils.c index e2f1131de43128254d8211343771e657e425541e..cfc5b576ec56bd680c2d0ad3401= 8368ed1011814 100644 --- a/drivers/media/platform/qcom/iris/iris_utils.c +++ b/drivers/media/platform/qcom/iris/iris_utils.c @@ -125,3 +125,9 @@ int iris_check_core_mbps(struct iris_inst *inst) =20 return 0; } + +bool is_rotation_90_or_270(struct iris_inst *inst) +{ + return inst->fw_caps[ROTATION].value =3D=3D 90 || + inst->fw_caps[ROTATION].value =3D=3D 270; +} diff --git a/drivers/media/platform/qcom/iris/iris_utils.h b/drivers/media/= platform/qcom/iris/iris_utils.h index 75740181122f5bdf93d64d3f43b3a26a9fe97919..b5705d156431a5cf59d645ce988= bc3a3c9b9c5e2 100644 --- a/drivers/media/platform/qcom/iris/iris_utils.h +++ b/drivers/media/platform/qcom/iris/iris_utils.h @@ -51,5 +51,6 @@ void iris_helper_buffers_done(struct iris_inst *inst, uns= igned int type, int iris_wait_for_session_response(struct iris_inst *inst, bool is_flush); int iris_check_core_mbpf(struct iris_inst *inst); int iris_check_core_mbps(struct iris_inst *inst); +bool is_rotation_90_or_270(struct iris_inst *inst); =20 #endif diff --git a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c b/drivers/m= edia/platform/qcom/iris/iris_vpu_buffer.c index db5adadd1b39c06bc41ae6f1b3d2f924b3ebf150..1e54ace966c74956208d88f0683= 7b97b1fd48e17 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c +++ b/drivers/media/platform/qcom/iris/iris_vpu_buffer.c @@ -556,6 +556,22 @@ static u32 iris_vpu_dec_scratch1_size(struct iris_inst= *inst) iris_vpu_dec_line_size(inst); } =20 +static inline u32 iris_vpu_enc_get_bitstream_width(struct iris_inst *inst) +{ + if (is_rotation_90_or_270(inst)) + return inst->fmt_dst->fmt.pix_mp.height; + else + return inst->fmt_dst->fmt.pix_mp.width; +} + +static inline u32 iris_vpu_enc_get_bitstream_height(struct iris_inst *inst) +{ + if (is_rotation_90_or_270(inst)) + return inst->fmt_dst->fmt.pix_mp.width; + else + return inst->fmt_dst->fmt.pix_mp.height; +} + static inline u32 size_bin_bitstream_enc(u32 width, u32 height, u32 rc_type) { @@ -638,10 +654,9 @@ static inline u32 hfi_buffer_bin_enc(u32 width, u32 he= ight, static u32 iris_vpu_enc_bin_size(struct iris_inst *inst) { u32 num_vpp_pipes =3D inst->core->iris_platform_data->num_vpp_pipe; + u32 height =3D iris_vpu_enc_get_bitstream_height(inst); + u32 width =3D iris_vpu_enc_get_bitstream_width(inst); u32 stage =3D inst->fw_caps[STAGE].value; - struct v4l2_format *f =3D inst->fmt_dst; - u32 height =3D f->fmt.pix_mp.height; - u32 width =3D f->fmt.pix_mp.width; u32 lcu_size; =20 if (inst->codec =3D=3D V4L2_PIX_FMT_HEVC) @@ -676,9 +691,8 @@ u32 hfi_buffer_comv_enc(u32 frame_width, u32 frame_heig= ht, u32 lcu_size, =20 static u32 iris_vpu_enc_comv_size(struct iris_inst *inst) { - struct v4l2_format *f =3D inst->fmt_dst; - u32 height =3D f->fmt.pix_mp.height; - u32 width =3D f->fmt.pix_mp.width; + u32 height =3D iris_vpu_enc_get_bitstream_height(inst); + u32 width =3D iris_vpu_enc_get_bitstream_width(inst); u32 num_recon =3D 1; u32 lcu_size =3D 16; =20 @@ -958,9 +972,8 @@ u32 hfi_buffer_non_comv_enc(u32 frame_width, u32 frame_= height, static u32 iris_vpu_enc_non_comv_size(struct iris_inst *inst) { u32 num_vpp_pipes =3D inst->core->iris_platform_data->num_vpp_pipe; - struct v4l2_format *f =3D inst->fmt_dst; - u32 height =3D f->fmt.pix_mp.height; - u32 width =3D f->fmt.pix_mp.width; + u32 height =3D iris_vpu_enc_get_bitstream_height(inst); + u32 width =3D iris_vpu_enc_get_bitstream_width(inst); u32 lcu_size =3D 16; =20 if (inst->codec =3D=3D V4L2_PIX_FMT_HEVC) { @@ -1051,9 +1064,8 @@ u32 hfi_buffer_line_enc_vpu33(u32 frame_width, u32 fr= ame_height, bool is_ten_bit static u32 iris_vpu_enc_line_size(struct iris_inst *inst) { u32 num_vpp_pipes =3D inst->core->iris_platform_data->num_vpp_pipe; - struct v4l2_format *f =3D inst->fmt_dst; - u32 height =3D f->fmt.pix_mp.height; - u32 width =3D f->fmt.pix_mp.width; + u32 height =3D iris_vpu_enc_get_bitstream_height(inst); + u32 width =3D iris_vpu_enc_get_bitstream_width(inst); u32 lcu_size =3D 16; =20 if (inst->codec =3D=3D V4L2_PIX_FMT_HEVC) { @@ -1069,9 +1081,8 @@ static u32 iris_vpu_enc_line_size(struct iris_inst *i= nst) static u32 iris_vpu33_enc_line_size(struct iris_inst *inst) { u32 num_vpp_pipes =3D inst->core->iris_platform_data->num_vpp_pipe; - struct v4l2_format *f =3D inst->fmt_dst; - u32 height =3D f->fmt.pix_mp.height; - u32 width =3D f->fmt.pix_mp.width; + u32 height =3D iris_vpu_enc_get_bitstream_height(inst); + u32 width =3D iris_vpu_enc_get_bitstream_width(inst); u32 lcu_size =3D 16; =20 if (inst->codec =3D=3D V4L2_PIX_FMT_HEVC) { @@ -1292,9 +1303,8 @@ static inline u32 hfi_buffer_scratch1_enc(u32 frame_w= idth, u32 frame_height, static u32 iris_vpu_enc_scratch1_size(struct iris_inst *inst) { u32 num_vpp_pipes =3D inst->core->iris_platform_data->num_vpp_pipe; - struct v4l2_format *f =3D inst->fmt_dst; - u32 frame_height =3D f->fmt.pix_mp.height; - u32 frame_width =3D f->fmt.pix_mp.width; + u32 frame_height =3D iris_vpu_enc_get_bitstream_height(inst); + u32 frame_width =3D iris_vpu_enc_get_bitstream_width(inst); u32 num_ref =3D 1; u32 lcu_size; bool is_h265; @@ -1390,9 +1400,8 @@ static inline u32 hfi_buffer_scratch2_enc(u32 frame_w= idth, u32 frame_height, =20 static u32 iris_vpu_enc_scratch2_size(struct iris_inst *inst) { - struct v4l2_format *f =3D inst->fmt_dst; - u32 frame_width =3D f->fmt.pix_mp.width; - u32 frame_height =3D f->fmt.pix_mp.height; + u32 frame_height =3D iris_vpu_enc_get_bitstream_height(inst); + u32 frame_width =3D iris_vpu_enc_get_bitstream_width(inst); u32 num_ref =3D 1; =20 return hfi_buffer_scratch2_enc(frame_width, frame_height, num_ref, --=20 2.43.0 From nobody Mon Feb 9 07:24:06 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1714D26ED4A for ; Fri, 14 Nov 2025 03:11:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763089884; cv=none; b=lOo+pT15MAsOM4SZVtHE74WEpc0v7QErx82HYzKUlpFyh3c1M1MRG3LtMjE8A9mLtgJSgP6hGCtlS/OmUYl485G1MW86mPANlnQZ4IzkkQrAtvAufJquVTdInxC2xSmtkArSaIZmQC+PHm8yzmd5McfJectTFiDuOorrkKlKgJQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763089884; c=relaxed/simple; bh=R1p84crC5VtccNS08vkOh+RSw1ieCXi42DlZbvlNRiQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Q3Nsgv8CoIz5J1VG9M1pASd+ghiK2A1DLyupvIqVIVyy3fI4JDQT7MEChQt8GUVtn6ODe34Vihh8KKEQA1TE9KePpD1by+5/QmoqdFsU4h42h31ut5iw3OpnJ0jGeg8xqN+qzUb8w37IagYmEESqMnWczt2MZurLQlwUgqb6KoE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=i31WRdue; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=KiOVZog0; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="i31WRdue"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="KiOVZog0" Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 5ADMaj5d1703670 for ; Fri, 14 Nov 2025 03:11:22 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= KEPTF78OVwqVGnBtPdXvR6dY2VzppJKnDtqEv/zDnV0=; b=i31WRdueflMlEqgE LVvrwCrTvbiBzMkAkknqZbPk8XID6ZbnKPzYbnRlbHZXfuufdGhbs5XpmFJg99p2 sINHGaxFqQBvEEUoC4Sa89exGfKKNGPdaGo+rZzz/yu+vhS87+VNtc5PS8Mj+ijt 2hYf6pZT/MiRg4Y2VFzt0PKpemEjRxHXBEqTZfsucnXqDNBB4CKPYBuV28ZlpNE6 7ymTndzk8kpqgB92otG81/PLjMRmIRZRLB8oGdpJ+RfbqigZ5DU24yPMKjT2ODVB sUWqhHRLWokwZBxZNiYzLQh+IFBuF8dq7HlZtzdWHtz0CDGIFYNXQh9sRJ3wkY/1 MB8ANQ== Received: from mail-pf1-f199.google.com (mail-pf1-f199.google.com [209.85.210.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4adr9e8mpu-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Fri, 14 Nov 2025 03:11:22 +0000 (GMT) Received: by mail-pf1-f199.google.com with SMTP id d2e1a72fcca58-7baaf371585so126484b3a.0 for ; Thu, 13 Nov 2025 19:11:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1763089882; x=1763694682; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=KEPTF78OVwqVGnBtPdXvR6dY2VzppJKnDtqEv/zDnV0=; b=KiOVZog0wGi4TGfYoO7hypS3KRFzOjectQLbymXFDno36/ormPG/h5CX6gO1GbKCEj gLc9n8z+IEtKmMS2O/cl6ED88J/B/YfeL/omh4+sR/LzFsQl1VElDuijiQ9nNjbNk0U3 XtEEdB5x0XELawvia43uLU+sFIcyNUQQgW8h3N2/QnNTCnJt4be2quuKynspsMTRGk8l BWlw7l13Cg2CFJsKgUJul4LidyGQhNIS3Bv0iyhY44AH90gFVOW2QSQB0JeNfg6a7mwW Vv7GLhB1P7l7GThP15++EKdEixHzF8E/PAfdbSd19s+/IG5ENebuQecqiVXJtSOnjM7y BoIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1763089882; x=1763694682; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=KEPTF78OVwqVGnBtPdXvR6dY2VzppJKnDtqEv/zDnV0=; b=Ukf3BQuNMXoVxSZmOFiwwitjzNhsMMAOrpq2BJQY1+pzglHtnh6U9l3hrcRdre4I7b LTiPqpE5YLesMievoUD4gO4TKI2SwjZRwRf0ZD1Hb6+IRmAKNK6McLzlS1zH5EOfExeG GVjOtGgGzGTG5TTE7hLknJ7YzF3NkIqwSTvp45bLpZCyHG452SxGqLViRuyEd09JGBYJ 1AQQQB7N1RU+FKjBXLuJmY7/GW9X2AP/Gar0Xtw6ATCkulq4aCmjB+3dCLlMCXjca2vR ykik4tyHMxx6VUoH9J4B5LCUbnzUrW1dImtYG+TeAAV2liWlPPMAItXchkgtngLA4D/c aaIA== X-Forwarded-Encrypted: i=1; AJvYcCXykF5Nw2ULb6i2X+lr/U4PmLBudfaXoGF0xQ3zBULmV3bzvVMusoZU66Ca41+C9QLh34Fro8FNau0HR/A=@vger.kernel.org X-Gm-Message-State: AOJu0Yzb7M5+6YLDFJH8HsoiOLpYbMAtwK1kLirmuiGofYjUhTRe7Qwr zNxs8LyOA7vk9MSRoJyrgfcaQKwxHT4AHfhLXo+Thn7TvB5liLL41/Q7Mbjc44kBi1vxEGHI4tL 9Cd6Ybzp+nyVPzyZ/OJaR+QfJXExaAfbR3INx/vAgoDJ8jegPZndfDQbHY9iJmwXXLUU= X-Gm-Gg: ASbGnctEiWCfU4pFMprVkNeLp0ThicGaa7/PHMH8ZiUwFPAYquivTqxKTVlkoAqzqcU Uhfdf+nbPROFMsutMHX20omdutdUs82PfH2/twvbKuGFTtTLuvinhS4ZBLbMKCOlFQi/PzK1+oY +vy1novsO6G60ySQf2GHAR0sbJXtCokmXoiBqJHzXb816Qdp+FU3C2s3G1H5zAUtM5wA2YjdBQq Os4plMToDJHDYvDseNL7WGaKIusuM/X8/xauc4/OCAnQelExhV23J1tZWDw+kEtg/JPkifcN6Nc FO+L4E12RBzhT4fwvK7IuYxY2oFvhR+ntY/9QFquLrzofgD+vvbZbWmDPCf7f4u3Tk8uaJbBt4x Gb/UE+q3qui/en1HzWOx+jz4L8RLmKMdNtbfWlMvrbi3fegDGtGEkU440jaU/3KHndnw1Q1d8vR OIMUl9dVQ8 X-Received: by 2002:a05:6a00:2ea6:b0:7ad:1907:5756 with SMTP id d2e1a72fcca58-7ba34972361mr2211637b3a.12.1763089881474; Thu, 13 Nov 2025 19:11:21 -0800 (PST) X-Google-Smtp-Source: AGHT+IEb9gyVqDbJQjCOvFNJIIMXQ3aA6AoF9yTZf7TpcLO+twFq7yRdsQODTS/Ls/yYidRHBDl3LQ== X-Received: by 2002:a05:6a00:2ea6:b0:7ad:1907:5756 with SMTP id d2e1a72fcca58-7ba34972361mr2211600b3a.12.1763089880934; Thu, 13 Nov 2025 19:11:20 -0800 (PST) Received: from WANGAOW-LAB01.ap.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com. [103.229.16.4]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7b92714e298sm3598555b3a.34.2025.11.13.19.11.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Nov 2025 19:11:20 -0800 (PST) From: Wangao Wang Date: Fri, 14 Nov 2025 11:09:02 +0800 Subject: [PATCH v6 5/6] media: qcom: iris: Add flip support for encoder Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251114-iris_encoder_enhancements-v6-5-d6d35a92635d@oss.qualcomm.com> References: <20251114-iris_encoder_enhancements-v6-0-d6d35a92635d@oss.qualcomm.com> In-Reply-To: <20251114-iris_encoder_enhancements-v6-0-d6d35a92635d@oss.qualcomm.com> To: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Wangao Wang , Neil Armstrong , quic_qiweil@quicinc.com, quic_renjiang@quicinc.com X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1763089858; l=5615; i=wangao.wang@oss.qualcomm.com; s=20251021; h=from:subject:message-id; bh=R1p84crC5VtccNS08vkOh+RSw1ieCXi42DlZbvlNRiQ=; b=R22WdADZMZwaGgfSOqDwoTBGjYWYQuN+IIX/gCNyNSdYMaEDylaecFkcU/wKdX/G7lAopY3ZU yxMLQfBMelDAffc8RjeHFKN05Amw7Le4yICnagLgtK+2BZFpAQ8CuMI X-Developer-Key: i=wangao.wang@oss.qualcomm.com; a=ed25519; pk=bUPgYblBUAsoPyGfssbNR7ZXUSGF8v1VF4FJzSO6/aA= X-Authority-Analysis: v=2.4 cv=ccPfb3DM c=1 sm=1 tr=0 ts=69169dda cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=KKAkSRfTAAAA:8 a=I7aUD2eJchsgA4-ozh8A:9 a=QEXdDO2ut3YA:10 a=OpyuDcXvxspvyRM73sMx:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-GUID: nPeV6VXv9qsCirJe4eG4pugXOjVaMQ78 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTE0MDAyMyBTYWx0ZWRfX5e51NBYOEdKy Id0hcsvPBwgs59YMOOcQXKjqAWcJcWlQHQ/tMUlHAGAqnUZmRUgLWSyFCdz9EE4kmBAe/FBKKti +po3hBofxglm6e9rChipMreotobH1ImI5Usgl9gH1k7M07ia48vYT7lBce/48wrFI1o82hWu3aG yK6ir/1YhN1sbPM5MkK9oN5oaGlfpfbQ0AzFohJPIZkmLKte3EIz/fP4TKd5pzqnZaO0c54UBmP fDWq3ioAynw+E2Ei1Hz5iCQNgbnp1iaaTTh4/rSzsoB8bckX2TYaxPwe/lzlWeIdi5e0ILhWGVm Q0FmztbHxqe/LXZgbc9GCoL/UNYhZmopD0YDLFimeJUDDMhqbX1erSDq+soOBgXbPKvx2sLOgK6 3iNBpuBOAQuYAkTglUVZ6XwBmEDxNQ== X-Proofpoint-ORIG-GUID: nPeV6VXv9qsCirJe4eG4pugXOjVaMQ78 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-13_07,2025-11-13_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 suspectscore=0 priorityscore=1501 phishscore=0 impostorscore=0 malwarescore=0 spamscore=0 lowpriorityscore=0 adultscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511140023 Add support for V4L2_CID_HFLIP and V4L2_CID_VFLIP controls in encoder. Reviewed-by: Dikshita Agarwal Tested-by: Neil Armstrong # on SM8650-HDK Signed-off-by: Wangao Wang --- drivers/media/platform/qcom/iris/iris_ctrls.c | 27 ++++++++++++++++++= ++++ drivers/media/platform/qcom/iris/iris_ctrls.h | 1 + .../platform/qcom/iris/iris_hfi_gen2_defines.h | 8 +++++++ .../platform/qcom/iris/iris_platform_common.h | 2 ++ .../media/platform/qcom/iris/iris_platform_gen2.c | 22 ++++++++++++++++++ 5 files changed, 60 insertions(+) diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.c b/drivers/media/= platform/qcom/iris/iris_ctrls.c index 9c20db9eaa1808941b8d1c9213c7dcd36464b4c7..72abf1ccefc9102d54fb25ffdc1= 80d6e51cc5ffe 100644 --- a/drivers/media/platform/qcom/iris/iris_ctrls.c +++ b/drivers/media/platform/qcom/iris/iris_ctrls.c @@ -100,6 +100,10 @@ static enum platform_inst_fw_cap_type iris_get_cap_id(= u32 id) return B_FRAME_QP_HEVC; case V4L2_CID_ROTATE: return ROTATION; + case V4L2_CID_HFLIP: + return HFLIP; + case V4L2_CID_VFLIP: + return VFLIP; default: return INST_FW_CAP_MAX; } @@ -189,6 +193,10 @@ static u32 iris_get_v4l2_id(enum platform_inst_fw_cap_= type cap_id) return V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_QP; case ROTATION: return V4L2_CID_ROTATE; + case HFLIP: + return V4L2_CID_HFLIP; + case VFLIP: + return V4L2_CID_VFLIP; default: return 0; } @@ -927,6 +935,25 @@ int iris_set_rotation(struct iris_inst *inst, enum pla= tform_inst_fw_cap_type cap &hfi_val, sizeof(u32)); } =20 +int iris_set_flip(struct iris_inst *inst, enum platform_inst_fw_cap_type c= ap_id) +{ + const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; + u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + u32 hfi_val =3D HFI_DISABLE_FLIP; + + if (inst->fw_caps[HFLIP].value) + hfi_val |=3D HFI_HORIZONTAL_FLIP; + + if (inst->fw_caps[VFLIP].value) + hfi_val |=3D HFI_VERTICAL_FLIP; + + return hfi_ops->session_set_property(inst, hfi_id, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_U32_ENUM, + &hfi_val, sizeof(u32)); +} + int iris_set_properties(struct iris_inst *inst, u32 plane) { const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.h b/drivers/media/= platform/qcom/iris/iris_ctrls.h index 3ea0a00c7587a516f19bb7307a0eb9a60c856ab0..355a592049f3fcc715a1b9df44b= 4d1398b052653 100644 --- a/drivers/media/platform/qcom/iris/iris_ctrls.h +++ b/drivers/media/platform/qcom/iris/iris_ctrls.h @@ -33,6 +33,7 @@ int iris_set_max_qp(struct iris_inst *inst, enum platform= _inst_fw_cap_type cap_i int iris_set_frame_qp(struct iris_inst *inst, enum platform_inst_fw_cap_ty= pe cap_id); int iris_set_qp_range(struct iris_inst *inst, enum platform_inst_fw_cap_ty= pe cap_id); int iris_set_rotation(struct iris_inst *inst, enum platform_inst_fw_cap_ty= pe cap_id); +int iris_set_flip(struct iris_inst *inst, enum platform_inst_fw_cap_type c= ap_id); int iris_set_properties(struct iris_inst *inst, u32 plane); =20 #endif diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h b/dri= vers/media/platform/qcom/iris/iris_hfi_gen2_defines.h index 53cb1849055364106beaeaf179dd836d9c2e7a3c..c9e93d97fb01ec8d9c4b38ea932= aae21c1df0943 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h @@ -92,6 +92,14 @@ enum hfi_rotation { }; =20 #define HFI_PROP_ROTATION 0x0300014b + +enum hfi_flip { + HFI_DISABLE_FLIP =3D 0x00000000, + HFI_HORIZONTAL_FLIP =3D 0x00000001, + HFI_VERTICAL_FLIP =3D 0x00000002, +}; + +#define HFI_PROP_FLIP 0x0300014c #define HFI_PROP_SIGNAL_COLOR_INFO 0x03000155 #define HFI_PROP_PICTURE_TYPE 0x03000162 #define HFI_PROP_DEC_DEFAULT_HEADER 0x03000168 diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/driv= ers/media/platform/qcom/iris/iris_platform_common.h index 5337ea836470253130cf47a790abbb023f4d5acd..2774b20d0740c445316244edc83= 99c7ad6a0d798 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -144,6 +144,8 @@ enum platform_inst_fw_cap_type { B_FRAME_QP_H264, B_FRAME_QP_HEVC, ROTATION, + HFLIP, + VFLIP, INST_FW_CAP_MAX, }; =20 diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/driver= s/media/platform/qcom/iris/iris_platform_gen2.c index 5f598d6028077a611d5dcdd453e62676f5c1ae8d..27ee146b8d4b442ca9b02f09d0e= b9ced218d6261 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -596,6 +596,28 @@ static const struct platform_inst_fw_cap inst_fw_cap_s= m8550_enc[] =3D { .flags =3D CAP_FLAG_OUTPUT_PORT, .set =3D iris_set_rotation, }, + { + .cap_id =3D HFLIP, + .min =3D 0, + .max =3D 1, + .step_or_mask =3D 1, + .value =3D 0, + .hfi_id =3D HFI_PROP_FLIP, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_flip, + }, + { + .cap_id =3D VFLIP, + .min =3D 0, + .max =3D 1, + .step_or_mask =3D 1, + .value =3D 0, + .hfi_id =3D HFI_PROP_FLIP, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_flip, + }, }; =20 static struct platform_inst_caps platform_inst_cap_sm8550 =3D { --=20 2.43.0 From nobody Mon Feb 9 07:24:06 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CB5EE2737F2 for ; Fri, 14 Nov 2025 03:11:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763089889; cv=none; b=TPRU0VORXSctcanUdpmxmYz6lo1czqRTzoKyCk+GkLOh2RSbro/7y7bcdeqnDYS/QoaR+gNQclpY+XFx0RzH79GoC0I82oDdsQewyFf+le9zrqbaQCt04ZSTP9w+s8bSS2L2fBHAGxIkxUGnx2/ytKPIywl2JdUCQ1cD7A9U38Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763089889; c=relaxed/simple; bh=81zFRIrcTgcziO/6idLpMYBAFEcqcHARdAIyw083MWA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=H4208OZ7WoMO1G0r3hEUGJfX1NKN37o3UMQ7RTlAEOtyyQqBJJX8GN9pSyPKAmEdqQ3QfTW9/RcYIIR5ugifebfC3yoyjJBeWAMSzcPfJ+SrzqqjKpKKPtrxF3CXEqDNzf/XfXpxwmfNuC/50B/aVrGuO4BbSTT9sJoVDoE81i4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=AJmt/WvW; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=edl1nCi+; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="AJmt/WvW"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="edl1nCi+" Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 5ADMahc91745227 for ; Fri, 14 Nov 2025 03:11:27 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= HWuhh9Cgk4n3Afm15RwS7N0x58GbRMnnQgyv9Sj4h7Y=; b=AJmt/WvWcypwRRpL qTnYLvTblZmmdfB3bEbzzoVUBJ4662UP6snepmP0TTYK+mPq8AOIUQb/u2yLfuVQ TxNZwJDnDYNV6Z17jl+PVfUdZBoswdxEn0VqI8DJsS+nDDaKXJg/lCO1D8YQ/RAd Aj8GgheQC1r1NAXomH2MVhfjwxur16wIYihky2R898L7RnMDuh5s4uvUH4+QXDHQ dFQi8YopqTm+o9cU9TDszsarfSHsJ55hPt6e3Del7s5HAmUzwnUM8k9dbquLbbm0 TQbUuKNTVt0MXtFeU3wt8CroKqYhuOejK3U9qyntH94pNiuVJQI+GMY3qBotN2C3 G/WvPw== Received: from mail-pf1-f200.google.com (mail-pf1-f200.google.com [209.85.210.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4adr9egmpa-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Fri, 14 Nov 2025 03:11:26 +0000 (GMT) Received: by mail-pf1-f200.google.com with SMTP id d2e1a72fcca58-7b873532cc8so1899646b3a.1 for ; Thu, 13 Nov 2025 19:11:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1763089885; x=1763694685; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=HWuhh9Cgk4n3Afm15RwS7N0x58GbRMnnQgyv9Sj4h7Y=; b=edl1nCi+XlVS3nurUk69KyGPOh+lKcXa25pPGyhJSGFEkBwNziZDaeOurws8TxcPhL zlGeKbAXAtbqu6h5g6GmJrBGIaG/mWhp/e/i1VhbsL6aA+hB7gEMHqRgiD+hjg99sNSM 8i9HFvvY20HabxRemRnr7Sm9hupCbIlMCmsZoC/yU+vgIhw+HqazHq/SX3COCsyljaHg zdXxvo+2o1g7OV5/brqwsKb/mVXQTd73CMU/2qUSSbx3WDFm1+jhEkmv2KYFxqNCGIpH MZt9P4KpWfuR11C8NEicgz8wiAXTrw3bPGpd4CWE2GyOFQO13NduAhTPy6//yBGBa6nz 3+pw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1763089885; x=1763694685; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=HWuhh9Cgk4n3Afm15RwS7N0x58GbRMnnQgyv9Sj4h7Y=; b=JeTgx6IaSESlMjBnpa4PCKjTn/7Gj7FxdQ/EEEBHu2tsbAjgxuQlucBUJhSkbip0PE RSzHiNvkyruX3chU2rvuI5v+h8jdClCVJPSGe/CKXMqjJ/0OMGd7tv6Xl0/IdTlQLMR1 DPn0FOG/SksERb9BNU/Z4cHMwrLx4G9k8J2XbcQyPpOA1KhtbaBuJ+R8a4KHmkkPdhMG S4dkrfOH2j4B9CGwhtYFt4aLbq2HSjS9Kv8/26wWEiNlOzU5lasi89BzJplUyQ+Ewc1x wnxyXvkgoCS+ASdWfqRX3u0+W42b4yBFFfdYtf8uFCDS1yxRv0IYn2OE1uO6xyB/42sx Klcg== X-Forwarded-Encrypted: i=1; AJvYcCXNExaWAYDuuQz/dOIQ8d/LEIu9lsbjMmDFfIa2z1ERF54aBQ5DMz/nlgTh+195mkPdguhlsdIvHz4KwHQ=@vger.kernel.org X-Gm-Message-State: AOJu0YzfhC2pTnpHHPMv5tFeukXgF77q4frczwaPU9fXDsnKiyX8eQ3N Vfy3UbHXFExiFHG4XZbgvslXIBCxw/Mbs2eHyT/+aXqrkBnkGC5PBUeVYfX176X1kPlEuWqzG04 ikE0/nXigy/aMmWQ9jp5J1vw6M4dcqNtbpCXSMHhDXCTCMuhE7MiwmHC8ucR38PXs65w= X-Gm-Gg: ASbGncvzS2GIMCgOiELd7rsj4ml/5SLPPVNFHWjwESWNkToGocnZSepO/4LsU2pvTX/ vqz+1se1CMDoUZKyfN9EGE9XxfxLiLAyuxYAbsXVO3zzOq9mJRwP6XujtQErKqIh0wNjncEsN9Y 8P1Q09DoqoR8O3JKIbVSW6n1M9KfxR63vmvUzE85fFIGmRYPLFVCMai8p3Xbfqj0/HgCG454JnT bm2NjsuRLk3R1ZAA+XJyb6HcrvaSLRIpbKqikLPugEo+T1SBctcRtWO8e0aVxsTsCfSih4Rvj/D 4qDNbJiKGqn0hHUNRihctwtNub5m5G1u2Dm2m9wVbYpfIA5/56GjcNMJj+bDCuzvuBte9hSwaSw 8wu/CQRmYhJqeGtmkZDDcMbBD7mcBMFjbxF7F/5yeKkF1Gz3fCrybE9s0tbG+n+DXFb7fAr83bD moziNMqj1w X-Received: by 2002:a05:6a00:3c57:b0:7ad:8299:6155 with SMTP id d2e1a72fcca58-7b8df90dd6dmr4825874b3a.2.1763089885028; Thu, 13 Nov 2025 19:11:25 -0800 (PST) X-Google-Smtp-Source: AGHT+IE0UNE/n+UdynkbPgnOR/dHiyYmrpT4B4ld26niZQP65bL4po5jOU0kLVGG+6DowCOU/4o1Ew== X-Received: by 2002:a05:6a00:3c57:b0:7ad:8299:6155 with SMTP id d2e1a72fcca58-7b8df90dd6dmr4825846b3a.2.1763089884455; Thu, 13 Nov 2025 19:11:24 -0800 (PST) Received: from WANGAOW-LAB01.ap.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com. [103.229.16.4]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7b92714e298sm3598555b3a.34.2025.11.13.19.11.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Nov 2025 19:11:23 -0800 (PST) From: Wangao Wang Date: Fri, 14 Nov 2025 11:09:03 +0800 Subject: [PATCH v6 6/6] media: qcom: iris: Add intra refresh support for encoder Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251114-iris_encoder_enhancements-v6-6-d6d35a92635d@oss.qualcomm.com> References: <20251114-iris_encoder_enhancements-v6-0-d6d35a92635d@oss.qualcomm.com> In-Reply-To: <20251114-iris_encoder_enhancements-v6-0-d6d35a92635d@oss.qualcomm.com> To: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Wangao Wang , Neil Armstrong , quic_qiweil@quicinc.com, quic_renjiang@quicinc.com X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1763089858; l=6448; i=wangao.wang@oss.qualcomm.com; s=20251021; h=from:subject:message-id; bh=81zFRIrcTgcziO/6idLpMYBAFEcqcHARdAIyw083MWA=; b=xDGwGXKKjIacVIDYMcZAeOb7KdcNhB4NJXdyBtENLtu7szsD/Ojq+X77i+FrFIHm4O2or9DLj N23Uhi6E/c/AVtTRAlBYxlpU3MYYh3LjCIUUZkEXaUzKD/iiX+31D1c X-Developer-Key: i=wangao.wang@oss.qualcomm.com; a=ed25519; pk=bUPgYblBUAsoPyGfssbNR7ZXUSGF8v1VF4FJzSO6/aA= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTE0MDAyMyBTYWx0ZWRfXz9QgDCQOmWtt D1m49Ys8+jgCo4+92R8cHAcwGCLqaDCw/9D40macBfWBVLPJkk0ggvMpc85676YsVLyq1Go2Zyk x6IrfpeoZO6nL8QwmwGls+WyNeXoYyk0BtEhlOwSFz/eIR+GrFt78YvScDvE0L3yGs8nPae7/zz pghlUWQbpf+v64OiUINwewsLJ4Al2xDi75yu/rA5l4T+rd4w7lTPE785cWwHo1Wdh5bhiukLIeX daiIEaDPO5/UYnjiUHnxoiy3ITOd1lsdgCf0a1Fv49+4+FKguT3hGRO5kuMlEOWNnLK2662d+1j niCWrX+OKd4UUJm3TzwVigUsVHNOEq6vsU9qbiGZXcwsJnyCs+GYSBFD1zmUzGt026V8UL1WpZx jgkYEuGRVMjg/jeGPfOvkTETTk0SRA== X-Proofpoint-ORIG-GUID: 9UGjFAcRrpSvGWGHh8Ig2qbFMpx42yce X-Authority-Analysis: v=2.4 cv=Afu83nXG c=1 sm=1 tr=0 ts=69169ddf cx=c_pps a=mDZGXZTwRPZaeRUbqKGCBw==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=KKAkSRfTAAAA:8 a=-vM60OG-bLC5KXgFrusA:9 a=QEXdDO2ut3YA:10 a=zc0IvFSfCIW2DFIPzwfm:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-GUID: 9UGjFAcRrpSvGWGHh8Ig2qbFMpx42yce X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-13_07,2025-11-13_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 phishscore=0 suspectscore=0 impostorscore=0 adultscore=0 lowpriorityscore=0 bulkscore=0 clxscore=1015 malwarescore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511140023 Add support for V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD and V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE controls. Reviewed-by: Dikshita Agarwal Tested-by: Neil Armstrong # on SM8650-HDK Signed-off-by: Wangao Wang --- drivers/media/platform/qcom/iris/iris_ctrls.c | 34 ++++++++++++++++++= ++++ drivers/media/platform/qcom/iris/iris_ctrls.h | 1 + .../platform/qcom/iris/iris_hfi_gen2_defines.h | 2 ++ .../platform/qcom/iris/iris_platform_common.h | 2 ++ .../media/platform/qcom/iris/iris_platform_gen2.c | 19 ++++++++++++ 5 files changed, 58 insertions(+) diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.c b/drivers/media/= platform/qcom/iris/iris_ctrls.c index 72abf1ccefc9102d54fb25ffdc180d6e51cc5ffe..1910aa31a9b9218e9423f2916aa= 40b85185f0dfb 100644 --- a/drivers/media/platform/qcom/iris/iris_ctrls.c +++ b/drivers/media/platform/qcom/iris/iris_ctrls.c @@ -104,6 +104,10 @@ static enum platform_inst_fw_cap_type iris_get_cap_id(= u32 id) return HFLIP; case V4L2_CID_VFLIP: return VFLIP; + case V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE: + return IR_TYPE; + case V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD: + return IR_PERIOD; default: return INST_FW_CAP_MAX; } @@ -197,6 +201,10 @@ static u32 iris_get_v4l2_id(enum platform_inst_fw_cap_= type cap_id) return V4L2_CID_HFLIP; case VFLIP: return V4L2_CID_VFLIP; + case IR_TYPE: + return V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE; + case IR_PERIOD: + return V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD; default: return 0; } @@ -954,6 +962,32 @@ int iris_set_flip(struct iris_inst *inst, enum platfor= m_inst_fw_cap_type cap_id) &hfi_val, sizeof(u32)); } =20 +int iris_set_ir_period(struct iris_inst *inst, enum platform_inst_fw_cap_t= ype cap_id) +{ + const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; + struct vb2_queue *q =3D v4l2_m2m_get_dst_vq(inst->m2m_ctx); + u32 ir_period =3D inst->fw_caps[cap_id].value; + u32 ir_type =3D 0; + + if (inst->fw_caps[IR_TYPE].value =3D=3D + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM) { + if (vb2_is_streaming(q)) + return 0; + ir_type =3D HFI_PROP_IR_RANDOM_PERIOD; + } else if (inst->fw_caps[IR_TYPE].value =3D=3D + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC) { + ir_type =3D HFI_PROP_IR_CYCLIC_PERIOD; + } else { + return -EINVAL; + } + + return hfi_ops->session_set_property(inst, ir_type, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_U32, + &ir_period, sizeof(u32)); +} + int iris_set_properties(struct iris_inst *inst, u32 plane) { const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.h b/drivers/media/= platform/qcom/iris/iris_ctrls.h index 355a592049f3fcc715a1b9df44b4d1398b052653..9518803577bc39f5c1339a49878= dd0c3e8f510ad 100644 --- a/drivers/media/platform/qcom/iris/iris_ctrls.h +++ b/drivers/media/platform/qcom/iris/iris_ctrls.h @@ -34,6 +34,7 @@ int iris_set_frame_qp(struct iris_inst *inst, enum platfo= rm_inst_fw_cap_type cap int iris_set_qp_range(struct iris_inst *inst, enum platform_inst_fw_cap_ty= pe cap_id); int iris_set_rotation(struct iris_inst *inst, enum platform_inst_fw_cap_ty= pe cap_id); int iris_set_flip(struct iris_inst *inst, enum platform_inst_fw_cap_type c= ap_id); +int iris_set_ir_period(struct iris_inst *inst, enum platform_inst_fw_cap_t= ype cap_id); int iris_set_properties(struct iris_inst *inst, u32 plane); =20 #endif diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h b/dri= vers/media/platform/qcom/iris/iris_hfi_gen2_defines.h index c9e93d97fb01ec8d9c4b38ea932aae21c1df0943..f6a214a6815420f299be70f8073= 2943d02168f0c 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h @@ -70,6 +70,7 @@ enum hfi_rate_control { #define HFI_PROP_QP_PACKED 0x0300012e #define HFI_PROP_MIN_QP_PACKED 0x0300012f #define HFI_PROP_MAX_QP_PACKED 0x03000130 +#define HFI_PROP_IR_RANDOM_PERIOD 0x03000131 #define HFI_PROP_TOTAL_BITRATE 0x0300013b #define HFI_PROP_MAX_GOP_FRAMES 0x03000146 #define HFI_PROP_MAX_B_FRAMES 0x03000147 @@ -108,6 +109,7 @@ enum hfi_flip { #define HFI_PROP_BUFFER_MARK 0x0300016c #define HFI_PROP_RAW_RESOLUTION 0x03000178 #define HFI_PROP_TOTAL_PEAK_BITRATE 0x0300017C +#define HFI_PROP_IR_CYCLIC_PERIOD 0x0300017E #define HFI_PROP_OPB_ENABLE 0x03000184 #define HFI_PROP_COMV_BUFFER_COUNT 0x03000193 #define HFI_PROP_END 0x03FFFFFF diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/driv= ers/media/platform/qcom/iris/iris_platform_common.h index 2774b20d0740c445316244edc8399c7ad6a0d798..dd0a4210a2647ff4dadf8d67b71= c6f4a22deb548 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -146,6 +146,8 @@ enum platform_inst_fw_cap_type { ROTATION, HFLIP, VFLIP, + IR_TYPE, + IR_PERIOD, INST_FW_CAP_MAX, }; =20 diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/driver= s/media/platform/qcom/iris/iris_platform_gen2.c index 27ee146b8d4b442ca9b02f09d0eb9ced218d6261..a2025d32b3235aaff25793ba77d= b143000e54bae 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -618,6 +618,25 @@ static const struct platform_inst_fw_cap inst_fw_cap_s= m8550_enc[] =3D { CAP_FLAG_DYNAMIC_ALLOWED, .set =3D iris_set_flip, }, + { + .cap_id =3D IR_TYPE, + .min =3D V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, + .max =3D V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC, + .step_or_mask =3D BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RAND= OM) | + BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC), + .value =3D V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + }, + { + .cap_id =3D IR_PERIOD, + .min =3D 0, + .max =3D INT_MAX, + .step_or_mask =3D 1, + .value =3D 0, + .flags =3D CAP_FLAG_OUTPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_ir_period, + }, }; =20 static struct platform_inst_caps platform_inst_cap_sm8550 =3D { --=20 2.43.0