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The structure is dynamically allocated, though it contains only a few pointers in it. This also requires to check two pointers for the existence of a callback. Simplify the allocation, release and handler check by embedding the ops statically in struct cxl_root_decoder. Implementation is equivalent to how struct cxl_root_ops handles the callbacks. Reviewed-by: Dave Jiang Reviewed-by: Jonathan Cameron Reviewed-by: Gregory Price Signed-off-by: Robert Richter --- drivers/cxl/acpi.c | 8 ++------ drivers/cxl/core/region.c | 20 +++++--------------- drivers/cxl/cxl.h | 2 +- 3 files changed, 8 insertions(+), 22 deletions(-) diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c index d5119de7f5a9..fab736aa77dc 100644 --- a/drivers/cxl/acpi.c +++ b/drivers/cxl/acpi.c @@ -487,12 +487,8 @@ static int __cxl_parse_cfmws(struct acpi_cedt_cfmws *c= fmws, cxlrd->qos_class =3D cfmws->qtg_id; =20 if (cfmws->interleave_arithmetic =3D=3D ACPI_CEDT_CFMWS_ARITHMETIC_XOR) { - cxlrd->ops =3D kzalloc(sizeof(*cxlrd->ops), GFP_KERNEL); - if (!cxlrd->ops) - return -ENOMEM; - - cxlrd->ops->hpa_to_spa =3D cxl_apply_xor_maps; - cxlrd->ops->spa_to_hpa =3D cxl_apply_xor_maps; + cxlrd->ops.hpa_to_spa =3D cxl_apply_xor_maps; + cxlrd->ops.spa_to_hpa =3D cxl_apply_xor_maps; } =20 rc =3D cxl_decoder_add(cxld); diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 451e5492911c..2b5ae5d9a4b6 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -2958,16 +2958,6 @@ static bool cxl_is_hpa_in_chunk(u64 hpa, struct cxl_= region *cxlr, int pos) return false; } =20 -static bool has_hpa_to_spa(struct cxl_root_decoder *cxlrd) -{ - return cxlrd->ops && cxlrd->ops->hpa_to_spa; -} - -static bool has_spa_to_hpa(struct cxl_root_decoder *cxlrd) -{ - return cxlrd->ops && cxlrd->ops->spa_to_hpa; -} - #define CXL_POS_ZERO 0 /** * cxl_validate_translation_params @@ -3141,8 +3131,8 @@ u64 cxl_dpa_to_hpa(struct cxl_region *cxlr, const str= uct cxl_memdev *cxlmd, hpa =3D hpa_offset + p->res->start + p->cache_size; =20 /* Root decoder translation overrides typical modulo decode */ - if (has_hpa_to_spa(cxlrd)) - hpa =3D cxlrd->ops->hpa_to_spa(cxlrd, hpa); + if (cxlrd->ops.hpa_to_spa) + hpa =3D cxlrd->ops.hpa_to_spa(cxlrd, hpa); =20 if (!cxl_resource_contains_addr(p->res, hpa)) { dev_dbg(&cxlr->dev, @@ -3151,7 +3141,7 @@ u64 cxl_dpa_to_hpa(struct cxl_region *cxlr, const str= uct cxl_memdev *cxlmd, } =20 /* Simple chunk check, by pos & gran, only applies to modulo decodes */ - if (!has_hpa_to_spa(cxlrd) && (!cxl_is_hpa_in_chunk(hpa, cxlr, pos))) + if (!cxlrd->ops.hpa_to_spa && !cxl_is_hpa_in_chunk(hpa, cxlr, pos)) return ULLONG_MAX; =20 return hpa; @@ -3184,8 +3174,8 @@ static int region_offset_to_dpa_result(struct cxl_reg= ion *cxlr, u64 offset, * If the root decoder has SPA to CXL HPA callback, use it. Otherwise * CXL HPA is assumed to equal SPA. */ - if (has_spa_to_hpa(cxlrd)) { - hpa =3D cxlrd->ops->spa_to_hpa(cxlrd, p->res->start + offset); + if (cxlrd->ops.spa_to_hpa) { + hpa =3D cxlrd->ops.spa_to_hpa(cxlrd, p->res->start + offset); hpa_offset =3D hpa - p->res->start; } else { hpa_offset =3D offset; diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index 0481679eb109..91ff47382111 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -451,7 +451,7 @@ struct cxl_root_decoder { void *platform_data; struct mutex range_lock; int qos_class; - struct cxl_rd_ops *ops; + struct cxl_rd_ops ops; struct cxl_switch_decoder cxlsd; }; =20 --=20 2.47.3 From nobody Sun Feb 8 05:23:24 2026 Received: from PH8PR06CU001.outbound.protection.outlook.com (mail-westus3azon11012041.outbound.protection.outlook.com [40.107.209.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 03B5533BBCC; Thu, 13 Nov 2025 11:15:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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De Francesco" , Terry Bowman , Joshua Hahn , Robert Richter Subject: [PATCH v2 2/3] cxl/acpi: Group xor arithmetric setup code in a single block Date: Thu, 13 Nov 2025 12:15:22 +0100 Message-ID: <20251113111525.1291608-3-rrichter@amd.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20251113111525.1291608-1-rrichter@amd.com> References: <20251113111525.1291608-1-rrichter@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002BA4F:EE_|DM6PR12MB4450:EE_ X-MS-Office365-Filtering-Correlation-Id: ba5d36ee-8eb4-402b-e5f5-08de22a600c3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|376014|1800799024|7416014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?0f2+IoROmAPbWJyTtSNim9Ru69or7TmUVfdiUIXCmsl+u7DMhgdauM5m6qUB?= =?us-ascii?Q?I2XiCYPkOTWjryqZsXeWTRke1adt2DZfjflsuK5EqhKsygewaNC/4Yu2+pbh?= =?us-ascii?Q?nTG6znSdjPgIrIVW3+XhmAwzq1mtcuOoN5gQMK1JUm+zcTfD9kscjz3K9+8Y?= =?us-ascii?Q?0lMcOeU3hE0CGre6kjClNplIIg+5292RZIpaA2BTjxsLsdUKdFnemGf7zP1W?= =?us-ascii?Q?Ul3DXMA1EyYtigywsPPe68tW8YiGlu0seRnxsTdkUzipMASDPAb4fkyYei8w?= =?us-ascii?Q?7TUoFrl/k8b0HfNn1zrfrZwu4qIipxxh0t3VF/DdF4qeuYtbTHrXxfVQn/9n?= =?us-ascii?Q?heaC9TrY+SJrDdq6ieYP6YQiUEifrUctFVgoFnkWW8rZVYmXVSdIJzeqjQRn?= =?us-ascii?Q?kJmht+boRymA0LD9xIlJBXK7/564BkBZrxkRLNLZLS1wP9dn/wnDHjgYyPmN?= =?us-ascii?Q?GnIbYMWGcXPNijs3T0edgTYuspdxE/HMNJzyibVg8Ybj7im6YNwRzBXxey9k?= =?us-ascii?Q?K7aMdwpqZ9wb9BnKhEgyOj//oFXBA5CZMYXdn//Ib4wewlFkCRo3M9CXRyBi?= =?us-ascii?Q?IzkfAYCzNBX8hTlbxN/QFBZES4JuV8DFDGhUepsGy5iOF+oT4m/gm1BXk/z+?= =?us-ascii?Q?Y38wuwJg6JMUtb9kuy9FebfsjDCIpwoLcCGtwlTTvoUrYKhopnWkz9Gp3MlF?= =?us-ascii?Q?7v3FeZCyGqkN9XMUN0AZQetFyck1JJLlNN/tdysi8ud1SUpYFT78BU7RoZ4o?= =?us-ascii?Q?5hPxgqxs54qXS2Lw5ANxLX1RYlnfU2oDbjuXiKNS9zs4IlGUKyVUDiNV1PUl?= =?us-ascii?Q?aeZJImXsevkOijDCTd+zOwr9trdUmE/ZCW2VV74utCu1ZHjn7casAutcOqWK?= =?us-ascii?Q?5XvzYTXIOiw+0vmr85hXV4iXxJ++V9FKQt3waTvS/EVnX9p5L8UP+0WGYQq+?= =?us-ascii?Q?Fr79AWvlrB++67nLYVMNqExM0CiraVakrJf7NZfvMORW82ADoTxLaxflB5ot?= =?us-ascii?Q?tmhy3BRMFn+bUwUAg2m5BHihVIn0yOsCVGryMzi55bFUoIDC2A79B+qc1xpc?= =?us-ascii?Q?Ry1lTfKiV7+H8Z3RtdOyOa9DcONYk0S/C85bzAjg6J6dwosRAryL+Qnt8wfH?= =?us-ascii?Q?SsJrapFCrTDrDPrvfu5wrtNkITeG3IFvMPf+bk8rwrGwBF3k2FVPy1WMg0p9?= =?us-ascii?Q?ZdU+3Yp0qeZ2JPhMr7ACXSpUSak4dtI+lgGsVH1jJoWSQnZ17dHOcpjNroCU?= =?us-ascii?Q?07jI6vizhiuXAFhdBE2E4USXYqdVby9ClOBgmuGjLaDIEqLA1YgyZx7ftzK2?= =?us-ascii?Q?rfHIB9jGV2+bVY5VfiR6Du29U4veB3cWkp/wdayqjT7yABcz22JWZGDXG/NQ?= =?us-ascii?Q?t8L/aA0cogmouaXf/d8eOa57NheZiN4Y17gB8wbwANPxrCU7GVHFyiYHTi7H?= =?us-ascii?Q?/gPJC3BPknOLA1anRxpiUZCDGpBUqOjpIgt4iwZVMhPX6fiBsUKfbFsOJ7VJ?= =?us-ascii?Q?rnHMWo3TQyh/5a26U2KNcerBpHoEPBbKh1twqVRzu9Pbpln2Q1/fV5/sbdsl?= =?us-ascii?Q?lSMgZ7K2uQCFUb76y04=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(376014)(1800799024)(7416014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2025 11:15:50.5323 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ba5d36ee-8eb4-402b-e5f5-08de22a600c3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002BA4F.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4450 Content-Type: text/plain; charset="utf-8" Simplify the xor arithmetric setup code by grouping it in a single block. No need to split the block for QoS setup. It is safe to reorder the call of cxl_setup_extended_linear_cache() because there are no dependencies. Reviewed-by: Gregory Price Reviewed-by: Jonathan Cameron Signed-off-by: Robert Richter --- drivers/cxl/acpi.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/cxl/acpi.c b/drivers/cxl/acpi.c index fab736aa77dc..50c2987e0459 100644 --- a/drivers/cxl/acpi.c +++ b/drivers/cxl/acpi.c @@ -465,8 +465,6 @@ static int __cxl_parse_cfmws(struct acpi_cedt_cfmws *cf= mws, ig =3D CXL_DECODER_MIN_GRANULARITY; cxld->interleave_granularity =3D ig; =20 - cxl_setup_extended_linear_cache(cxlrd); - if (cfmws->interleave_arithmetic =3D=3D ACPI_CEDT_CFMWS_ARITHMETIC_XOR) { if (ways !=3D 1 && ways !=3D 3) { cxims_ctx =3D (struct cxl_cxims_context) { @@ -482,15 +480,14 @@ static int __cxl_parse_cfmws(struct acpi_cedt_cfmws *= cfmws, return -EINVAL; } } - } - - cxlrd->qos_class =3D cfmws->qtg_id; - - if (cfmws->interleave_arithmetic =3D=3D ACPI_CEDT_CFMWS_ARITHMETIC_XOR) { cxlrd->ops.hpa_to_spa =3D cxl_apply_xor_maps; cxlrd->ops.spa_to_hpa =3D cxl_apply_xor_maps; } =20 + cxl_setup_extended_linear_cache(cxlrd); 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The variable is not used elsewhere, remove it and directly increment the target number. Reviewed-by: Jonathan Cameron Reviewed-by: Gregory Price Signed-off-by: Robert Richter --- drivers/cxl/core/region.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index 2b5ae5d9a4b6..e577b11bd889 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -1357,7 +1357,7 @@ static int cxl_port_setup_targets(struct cxl_port *po= rt, struct cxl_endpoint_decoder *cxled) { struct cxl_root_decoder *cxlrd =3D cxlr->cxlrd; - int parent_iw, parent_ig, ig, iw, rc, inc =3D 0, pos =3D cxled->pos; + int parent_iw, parent_ig, ig, iw, rc, pos =3D cxled->pos; struct cxl_port *parent_port =3D to_cxl_port(port->dev.parent); struct cxl_region_ref *cxl_rr =3D cxl_rr_load(port, cxlr); struct cxl_memdev *cxlmd =3D cxled_to_memdev(cxled); @@ -1549,9 +1549,8 @@ static int cxl_port_setup_targets(struct cxl_port *po= rt, cxlsd->target[cxl_rr->nr_targets_set] =3D ep->dport; cxlsd->cxld.target_map[cxl_rr->nr_targets_set] =3D ep->dport->port_id; } - inc =3D 1; + cxl_rr->nr_targets_set++; out_target_set: - cxl_rr->nr_targets_set +=3D inc; dev_dbg(&cxlr->dev, "%s:%s target[%d] =3D %s for %s:%s @ %d\n", dev_name(port->uport_dev), dev_name(&port->dev), cxl_rr->nr_targets_set - 1, dev_name(ep->dport->dport_dev), --=20 2.47.3