From nobody Wed Dec 10 20:09:58 2025 Received: from mail-pl1-f202.google.com (mail-pl1-f202.google.com [209.85.214.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1BF0D31A81B for ; Thu, 13 Nov 2025 03:22:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.202 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763004138; cv=none; b=t3iBUtGwKx4+K115fvzOyVYErgfdN2Zm2hmK/MJJW51WfLrmCdwQLsWSb6/1KZGBTylJLEBmZGMH9YTnDKY50GzedI0e5rQwPOwW+Z7+W1R9AK563+BmnWiNT3Cu7xpEI5y8YI5EEZsHCS7Xwnn1uH0Jw5m+gJd0LGONs0NJIYY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763004138; c=relaxed/simple; bh=qX35Itbhc9e/KIdUgyGaBHn9MzSy4DTE28eCMkaEh7A=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Content-Type; b=g6BO7X/0rABRGo2gXHcWYw9aHre6CPxzBWNi7/jmViaXCrazdJ2NZKoUogL3Sk2ET6ShhM230XgoBp7GYBxYr9BfhgQvoAPhlNEhPv8nZKlmqDN9LITXPF7SBC1eUJ3IfEMSFrJc0LNf0DHIzU9zO7sB8TTj3ikoauL9QDaoBKM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--irogers.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=cUvLhWKo; arc=none smtp.client-ip=209.85.214.202 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--irogers.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="cUvLhWKo" Received: by mail-pl1-f202.google.com with SMTP id d9443c01a7336-297fbfb4e53so6660125ad.1 for ; Wed, 12 Nov 2025 19:22:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1763004136; x=1763608936; darn=vger.kernel.org; h=to:from:subject:message-id:references:mime-version:in-reply-to:date :from:to:cc:subject:date:message-id:reply-to; bh=QzgYRCX3pVVtIR05a0Z3xw8tCxI0VGc5K9zhDx5EIhk=; b=cUvLhWKoonICsbKEv72LykSer5MYgUi4KT8aOE0AN1wn7yvjzXveqiTJ7CaRCxSLnw Oa5VYhv54IVcw/owIJ4ju1Y/Ft9oAjaV9teKdQKP3i7oMhAtVjU/+CnY5ctIn6Fgeizn SNX3CUTH8ssaHu/9k5nA897oSirdwTMJNzPcmUUP+dORsOKi/Uv6ulLYMOfTvk6Tt69s 13X2NMiHbJjLTWOr/hNxBolzu+KSX9V5ZK+o9uq0zDoRgOEPAHusyvJy51Zwo3h0BrnQ EIsBPPMf0aneXlWT/mLUeIzVZ+leI0+BcN24WfWzVJf89pJU1ctC5I7LiKDRKi26JxIY uhcw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1763004136; x=1763608936; h=to:from:subject:message-id:references:mime-version:in-reply-to:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=QzgYRCX3pVVtIR05a0Z3xw8tCxI0VGc5K9zhDx5EIhk=; b=WtvO72WmlvBl+Gx6c8HUobM+r0QF31SAagvs8f/Nj9VB9UyAw+d4ZvBcjcUvJyiHRa T3x5tvxqcAhi+tgduZyELzJ1EztTl5oDQbbO81WzC/f8rYSQRh7HkXT6IN6Skt2aqNFJ 2pq56IKUiGe5RqrkUXcSEso+QRBuVdCpxJr+s4L2RazlFtZQmXjK/No9Y8wXifuluZfI gF6vHj/sy3oJKMlKy1ujZ3ew6QdO+uqmaWNp2RyAau0FIT1dVueqsqQWiP0UM6t6jQz2 1rcv0bdFQfQ2TOHNzCrmG4kOc+oKO2XjcDL/qxrCT7s7/xO9V5WJAW0LZb7pZZuj/Z9O mbig== X-Forwarded-Encrypted: i=1; AJvYcCWuexM48HR7QMZ5FeXTowTbDFnXvg9PU41Bzhuws+DhytcAl31yBeIBoHp2rddDK6jrZhqVKeprMnz66QY=@vger.kernel.org X-Gm-Message-State: AOJu0Yy7ca0UysxKl4dOfzt5d8KpgJ31IjNu9nEQ4yHithl0JfH+f+NM 85G19d7yZEzJTATZdlNraJTBJnzygX8FkyRlc6/ZHyW6HAYb0tO7UYUCSC9H7I/zfp9ZyK0rY+Q XA3ldPtiugw== X-Google-Smtp-Source: AGHT+IEZCezrht0wRpY2FhdRaSwQk3QXkFXPVCUQaWzxv4AjxTWJNrJV8HcgONax7nnWJC9i563gEFQ3KSOW X-Received: from dyblc25.prod.google.com ([2002:a05:7301:1319:b0:2a4:6a22:9865]) (user=irogers job=prod-delivery.src-stubby-dispatcher) by 2002:a17:903:22c2:b0:246:7a43:3f66 with SMTP id d9443c01a7336-2984ed30d18mr75545335ad.7.1763004136368; Wed, 12 Nov 2025 19:22:16 -0800 (PST) Date: Wed, 12 Nov 2025 19:20:31 -0800 In-Reply-To: <20251113032040.1994090-1-irogers@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20251113032040.1994090-1-irogers@google.com> X-Mailer: git-send-email 2.51.2.1041.gc1ab5b90ca-goog Message-ID: <20251113032040.1994090-44-irogers@google.com> Subject: [PATCH v8 43/52] perf jevents: Add mem_bw metric for Intel From: Ian Rogers To: Adrian Hunter , Alexander Shishkin , Arnaldo Carvalho de Melo , Benjamin Gray , Caleb Biggers , Edward Baker , Ian Rogers , Ingo Molnar , James Clark , Jing Zhang , Jiri Olsa , John Garry , Leo Yan , Namhyung Kim , Perry Taylor , Peter Zijlstra , Samantha Alt , Sandipan Das , Thomas Falcon , Weilin Wang , Xu Yang , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Break down memory bandwidth using uncore counters. For many models this matches the memory_bandwidth_* metrics, but these metrics aren't made available on all models. Add support for free running counters. Query the event json when determining which what events/counters are available. Signed-off-by: Ian Rogers --- tools/perf/pmu-events/intel_metrics.py | 62 ++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/tools/perf/pmu-events/intel_metrics.py b/tools/perf/pmu-events= /intel_metrics.py index dddeae35e4b4..f671d6e4fd67 100755 --- a/tools/perf/pmu-events/intel_metrics.py +++ b/tools/perf/pmu-events/intel_metrics.py @@ -815,6 +815,67 @@ def IntelLdSt() -> Optional[MetricGroup]: ], description=3D"Breakdown of load/store instructions") =20 =20 +def UncoreMemBw() -> Optional[MetricGroup]: + mem_events =3D [] + try: + mem_events =3D json.load(open(f"{os.path.dirname(os.path.realpath(= __file__))}" + f"/arch/x86/{args.model}/uncore-memory= .json")) + except: + pass + + ddr_rds =3D 0 + ddr_wrs =3D 0 + ddr_total =3D 0 + for x in mem_events: + if "EventName" in x: + name =3D x["EventName"] + if re.search("^UNC_MC[0-9]+_RDCAS_COUNT_FREERUN", name): + ddr_rds +=3D Event(name) + elif re.search("^UNC_MC[0-9]+_WRCAS_COUNT_FREERUN", name): + ddr_wrs +=3D Event(name) + # elif re.search("^UNC_MC[0-9]+_TOTAL_REQCOUNT_FREERUN", name): + # ddr_total +=3D Event(name) + + if ddr_rds =3D=3D 0: + try: + ddr_rds =3D Event("UNC_M_CAS_COUNT.RD") + ddr_wrs =3D Event("UNC_M_CAS_COUNT.WR") + except: + return None + + ddr_total =3D ddr_rds + ddr_wrs + + pmm_rds =3D 0 + pmm_wrs =3D 0 + try: + pmm_rds =3D Event("UNC_M_PMM_RPQ_INSERTS") + pmm_wrs =3D Event("UNC_M_PMM_WPQ_INSERTS") + except: + pass + + pmm_total =3D pmm_rds + pmm_wrs + + scale =3D 64 / 1_000_000 + return MetricGroup("lpm_mem_bw", [ + MetricGroup("lpm_mem_bw_ddr", [ + Metric("lpm_mem_bw_ddr_read", "DDR memory read bandwidth", + d_ratio(ddr_rds, interval_sec), f"{scale}MB/s"), + Metric("lpm_mem_bw_ddr_write", "DDR memory write bandwidth", + d_ratio(ddr_wrs, interval_sec), f"{scale}MB/s"), + Metric("lpm_mem_bw_ddr_total", "DDR memory write bandwidth", + d_ratio(ddr_total, interval_sec), f"{scale}MB/s"), + ], description=3D"DDR Memory Bandwidth"), + MetricGroup("lpm_mem_bw_pmm", [ + Metric("lpm_mem_bw_pmm_read", "PMM memory read bandwidth", + d_ratio(pmm_rds, interval_sec), f"{scale}MB/s"), + Metric("lpm_mem_bw_pmm_write", "PMM memory write bandwidth", + d_ratio(pmm_wrs, interval_sec), f"{scale}MB/s"), + Metric("lpm_mem_bw_pmm_total", "PMM memory write bandwidth", + d_ratio(pmm_total, interval_sec), f"{scale}MB/s"), + ], description=3D"PMM Memory Bandwidth") if pmm_rds !=3D 0 else No= ne, + ], description=3D"Memory Bandwidth") + + def main() -> None: global _args =20 @@ -853,6 +914,7 @@ def main() -> None: IntelMlp(), IntelPorts(), IntelSwpf(), + UncoreMemBw(), ]) =20 if _args.metricgroups: --=20 2.51.2.1041.gc1ab5b90ca-goog