From nobody Mon Feb 9 15:08:26 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 01F71359F87; Thu, 13 Nov 2025 17:57:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763056664; cv=none; b=Izu5EgZMciyfNMXHw4cR3yC/CSe7uu5P1HrusXOg8lg1dNRRRdSPxJaT8XRWNhnytKRi+u/hQrXl7XaA+JjgCZ1cxWzdEsXl84Kpe3Ce5MXgpL7pASm37ZkjF8fSkFIeX2oBvfRwrJxQsXv9Vlstp2azJujwu3iZzf/sDkw7wSw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763056664; c=relaxed/simple; bh=38ck5RCR0LO2rWCNSIq2uzpHXbhEGR1CpmwmHrfKicM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=I1IOQdWkxkNQvV3/qE8kslB5b9n5TyPpCxXZsthOfc3eRAg9hNh8PKnfw1KZsBktw1fIiPqJSjSDXk2fAR9IYwJYEek95mZSlEIjueH6oUIy7L66tBe8UvDjuF6a71gSS/yhulyLdnnOiZ4nDcCzxQyCw35mpv8Xjn9hj8x/F1M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=AaXFNtPz; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="AaXFNtPz" Received: by smtp.kernel.org (Postfix) with ESMTPS id 83144C2BCB8; Thu, 13 Nov 2025 17:57:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1763056663; bh=38ck5RCR0LO2rWCNSIq2uzpHXbhEGR1CpmwmHrfKicM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=AaXFNtPzjRqS0cxi6VDUtR+vuQ31hCOSvbmw0zMTgfKTDSNWnqr4KOwH8g2pmyxAE UGjy02Cj2OCq3U/I+qGeUEwPJ4bfx3gP1C1SrGLzUhqoZ7TcAwOQMuOlv++tABr1De 3hDoUUTTddrYipgOMgsZ/Ky6Ri7wTtHKb3ZtN3Uu9/E3GRx/FCHdTv4B9YiIaaPbhn 0DS3S+nzdrLMvZoeWEfmjbsUesSdPzox4zfWQITcZhDSpnN6FUDa4BQ+qbc5tZCV5e Q4SDPbr+Ga2TNlOTasrrVDlK4lNXClWuSCPxvKArlHsSWj4HzHl2FVndUZ7HOzkRJQ Tb/QzccI7xp+Q== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6B78ACD8CAF; Thu, 13 Nov 2025 17:57:43 +0000 (UTC) From: David Heidelberg via B4 Relay Date: Thu, 13 Nov 2025 18:57:40 +0100 Subject: [PATCH v2 06/12] drm/panel: sofef00: Introduce page macro Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251113-sofef00-rebuild-v2-6-e175053061ec@ixit.cz> References: <20251113-sofef00-rebuild-v2-0-e175053061ec@ixit.cz> In-Reply-To: <20251113-sofef00-rebuild-v2-0-e175053061ec@ixit.cz> To: Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Sam Ravnborg , Bjorn Andersson , Konrad Dybcio , Casey Connolly Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, phone-devel@vger.kernel.org, David Heidelberg X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=2024; i=david@ixit.cz; h=from:subject:message-id; bh=KFWwy/+TPv3o+Pr2om1zoaTzQ1nmZjY1fcOyZY+O5S8=; b=owEBbQKS/ZANAwAIAWACP8TTSSByAcsmYgBpFhwUCmAOASb2D9sDkONbkm8n44ZkOV25X9leB YYg57le8QGJAjMEAAEIAB0WIQTXegnP7twrvVOnBHRgAj/E00kgcgUCaRYcFAAKCRBgAj/E00kg ciEyEACHuDcOWDQrulCiLG2H//bMfSYhxVLsYaj0YYJ/ameYOo6w/oGJ7ACVG+UK/GAP7KcTjI+ /UTLfZfsih5a1d773cCB+u0z+s3bVqGdgFAk/Px4lI3dwnsfAzEuFn4z8+ANBdWC83YERoOoQ31 uTW7JPFmBD3lpDpc2n3oAuC8Yzp0absqpcUTNLqYzJg1jOLaPT40YYHhMaLlZjDfcqICbbAqIFg FwHMSvLwv5SpmaEn6CIR58kFi2uyC6nDx6p0dIXPU5CfjhEw8dQaz/B8YQ3jnO3s1JJaWiqnw7u aDaKrIVwD//cY4KVlxS0YzcPzPZV84OGtivU2+Upl7Ih1SqGy3AeGceyFj56k7ORTzuMfzP6jW3 wrcPz7vRe9PIjnALDSwUElwhyBuHNK6fBOPVxibqga3NMCZx8bUDGzCVf3U9VKRIEK/3rfWqzV4 lXmzpUvn8gtUntCUgZOdr0hFZwwKNuLc9HJToz3wGusDyBKbLaYuYqxzX4Og+Nn2FEQnXbrV7ON 5DeJIiNV8YZuuh96/VEBAeurIPAocFSA6pgeBX6FUs3Mnv4HfCWV+l9qsHCLwma1bXnv5isBz+n ZnHochmfl5W3i2IpmUIGvq+l1d0wva2LxBD/A23e0NKq2iwxwhc8o/Jc9UthV7CZcWyq1+vOd5o SFi0FBbqJjFdq/A== X-Developer-Key: i=david@ixit.cz; a=openpgp; fpr=D77A09CFEEDC2BBD53A7047460023FC4D3492072 X-Endpoint-Received: by B4 Relay for david@ixit.cz/default with auth_id=355 X-Original-From: David Heidelberg Reply-To: david@ixit.cz From: David Heidelberg Introducing the macro make the code a bit clearer. Looking at other Samsung drivers, I assume it's lvl2, thou due to not available documentation it's only educated guess. Signed-off-by: David Heidelberg --- drivers/gpu/drm/panel/panel-samsung-sofef00.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-samsung-sofef00.c b/drivers/gpu/dr= m/panel/panel-samsung-sofef00.c index a3651f0060bde..97122ec8872a1 100644 --- a/drivers/gpu/drm/panel/panel-samsung-sofef00.c +++ b/drivers/gpu/drm/panel/panel-samsung-sofef00.c @@ -36,6 +36,11 @@ struct sofef00_panel *to_sofef00_panel(struct drm_panel = *panel) return container_of(panel, struct sofef00_panel, panel); } =20 +#define sofef00_test_key_on_lvl2(ctx) \ + mipi_dsi_dcs_write_seq_multi(ctx, 0xf0, 0x5a, 0x5a) +#define sofef00_test_key_off_lvl2(ctx) \ + mipi_dsi_dcs_write_seq_multi(ctx, 0xf0, 0xa5, 0xa5) + static void sofef00_panel_reset(struct sofef00_panel *ctx) { gpiod_set_value_cansleep(ctx->reset_gpio, 0); @@ -56,15 +61,15 @@ static int sofef00_panel_on(struct sofef00_panel *ctx) mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx); mipi_dsi_usleep_range(&dsi_ctx, 10000, 11000); =20 - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a); - + sofef00_test_key_on_lvl2(&dsi_ctx); mipi_dsi_dcs_set_tear_on_multi(&dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK); + sofef00_test_key_off_lvl2(&dsi_ctx); =20 - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a); + sofef00_test_key_on_lvl2(&dsi_ctx); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x07); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6, 0x12); - mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5); + sofef00_test_key_off_lvl2(&dsi_ctx); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x= 20); mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, 0x00); =20 --=20 2.51.0