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client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by MWH0EPF000971E8.mail.protection.outlook.com (10.167.243.68) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9320.13 via Frontend Transport; Wed, 12 Nov 2025 22:27:11 +0000 Received: from dogwood-dvt-marlim.amd.com (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Wed, 12 Nov 2025 14:27:07 -0800 From: Mario Limonciello To: Simona Vetter CC: Alex Deucher , =?UTF-8?q?Christian=20K=C3=B6nig?= , David Airlie , "open list:RADEON and AMDGPU DRM DRIVERS" , "open list:DRM DRIVERS" , open list , Mario Limonciello , Simona Vetter , Harry Wentland Subject: [PATCH] drm/amd: Move adaptive backlight modulation property to drm core Date: Wed, 12 Nov 2025 16:26:46 -0600 Message-ID: <20251112222646.495189-1-mario.limonciello@amd.com> X-Mailer: git-send-email 2.51.2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000971E8:EE_|SA1PR12MB7318:EE_ X-MS-Office365-Filtering-Correlation-Id: e375af5b-5060-40de-d7fd-08de223a9feb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|36860700013|82310400026; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2025 22:27:11.8330 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e375af5b-5060-40de-d7fd-08de223a9feb X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000971E8.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB7318 Content-Type: text/plain; charset="utf-8" The adaptive backlight modulation property is supported on AMD hardware but compositors should be aware of it in standard DRM property documentation. Move the helper to create the property and documentation into DRM. Suggested-by: Simona Vetter Reviewed-by: Harry Wentland Signed-off-by: Mario Limonciello Acked-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 69 +++------------------ drivers/gpu/drm/amd/amdgpu/amdgpu_display.h | 7 --- drivers/gpu/drm/drm_connector.c | 63 +++++++++++++++++++ include/drm/drm_connector.h | 8 +++ 4 files changed, 80 insertions(+), 67 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/= amd/amdgpu/amdgpu_display.c index f8b35c487b6c..3d840bef77bf 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c @@ -1363,67 +1363,9 @@ static const struct drm_prop_enum_list amdgpu_dither= _enum_list[] =3D { { AMDGPU_FMT_DITHER_ENABLE, "on" }, }; =20 -/** - * DOC: property for adaptive backlight modulation - * - * The 'adaptive backlight modulation' property is used for the compositor= to - * directly control the adaptive backlight modulation power savings feature - * that is part of DCN hardware. - * - * The property will be attached specifically to eDP panels that support i= t. - * - * The property is by default set to 'sysfs' to allow the sysfs file 'pane= l_power_savings' - * to be able to control it. - * If set to 'off' the compositor will ensure it stays off. - * The other values 'min', 'bias min', 'bias max', and 'max' will control = the - * intensity of the power savings. - * - * Modifying this value can have implications on color accuracy, so tread - * carefully. - */ -static int amdgpu_display_setup_abm_prop(struct amdgpu_device *adev) -{ - const struct drm_prop_enum_list props[] =3D { - { ABM_SYSFS_CONTROL, "sysfs" }, - { ABM_LEVEL_OFF, "off" }, - { ABM_LEVEL_MIN, "min" }, - { ABM_LEVEL_BIAS_MIN, "bias min" }, - { ABM_LEVEL_BIAS_MAX, "bias max" }, - { ABM_LEVEL_MAX, "max" }, - }; - struct drm_property *prop; - int i; - - if (!adev->dc_enabled) - return 0; - - prop =3D drm_property_create(adev_to_drm(adev), DRM_MODE_PROP_ENUM, - "adaptive backlight modulation", - 6); - if (!prop) - return -ENOMEM; - - for (i =3D 0; i < ARRAY_SIZE(props); i++) { - int ret; - - ret =3D drm_property_add_enum(prop, props[i].type, - props[i].name); - - if (ret) { - drm_property_destroy(adev_to_drm(adev), prop); - - return ret; - } - } - - adev->mode_info.abm_level_property =3D prop; - - return 0; -} - int amdgpu_display_modeset_create_props(struct amdgpu_device *adev) { - int sz; + int ret, sz; =20 adev->mode_info.coherent_mode_property =3D drm_property_create_range(adev_to_drm(adev), 0, "coherent", 0, 1); @@ -1467,7 +1409,14 @@ int amdgpu_display_modeset_create_props(struct amdgp= u_device *adev) "dither", amdgpu_dither_enum_list, sz); =20 - return amdgpu_display_setup_abm_prop(adev); + adev->mode_info.abm_level_property =3D drm_create_abm_property(adev_to_dr= m(adev)); + if (IS_ERR(adev->mode_info.abm_level_property)) { + ret =3D PTR_ERR(adev->mode_info.abm_level_property); + adev->mode_info.abm_level_property =3D NULL; + return ret; + } + + return 0; } =20 void amdgpu_display_update_priority(struct amdgpu_device *adev) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h b/drivers/gpu/drm/= amd/amdgpu/amdgpu_display.h index 2b1536a16752..dfa0d642ac16 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h @@ -54,11 +54,4 @@ int amdgpu_display_resume_helper(struct amdgpu_device *a= dev); int amdgpu_display_get_scanout_buffer(struct drm_plane *plane, struct drm_scanout_buffer *sb); =20 -#define ABM_SYSFS_CONTROL -1 -#define ABM_LEVEL_OFF 0 -#define ABM_LEVEL_MIN 1 -#define ABM_LEVEL_BIAS_MIN 2 -#define ABM_LEVEL_BIAS_MAX 3 -#define ABM_LEVEL_MAX 4 - #endif diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connecto= r.c index 272d6254ea47..376169dac247 100644 --- a/drivers/gpu/drm/drm_connector.c +++ b/drivers/gpu/drm/drm_connector.c @@ -2603,6 +2603,69 @@ static int drm_mode_create_colorspace_property(struc= t drm_connector *connector, return 0; } =20 +/** + * DOC: integrated panel properties + * + * adaptive backlight modulation: + * Adaptive backlight modulation (ABM) is a power savings feature that + * dynamically adjusts the backlight brightness based on the content + * displayed on the screen. By reducing the backlight brightness for + * darker images and increasing it for brighter images, ABM helps to + * conserve energy and extend battery life on devices with integrated + * displays. This feature is part of AMD DCN hardware. + * + * sysfs + * The ABM property is exposed to userspace via sysfs interface + * located at 'amdgpu/panel_power_savings' under the DRM device. + * off + * Adaptive backlight modulation is disabled. + * min + * Adaptive backlight modulation is enabled at minimum intensity. + * bias min + * Adaptive backlight modulation is enabled at a more intense + * level than 'min'. + * bias max + * Adaptive backlight modulation is enabled at a more intense + * level than 'bias min'. + * max + * Adaptive backlight modulation is enabled at maximum intensity. + */ +struct drm_property *drm_create_abm_property(struct drm_device *dev) +{ + const struct drm_prop_enum_list props[] =3D { + { ABM_SYSFS_CONTROL, "sysfs" }, + { ABM_LEVEL_OFF, "off" }, + { ABM_LEVEL_MIN, "min" }, + { ABM_LEVEL_BIAS_MIN, "bias min" }, + { ABM_LEVEL_BIAS_MAX, "bias max" }, + { ABM_LEVEL_MAX, "max" }, + }; + struct drm_property *prop; + int i; + + prop =3D drm_property_create(dev, DRM_MODE_PROP_ENUM, + "adaptive backlight modulation", + 6); + if (!prop) + return ERR_PTR(-ENOMEM); + + for (i =3D 0; i < ARRAY_SIZE(props); i++) { + int ret; + + ret =3D drm_property_add_enum(prop, props[i].type, + props[i].name); + + if (ret) { + drm_property_destroy(dev, prop); + + return ERR_PTR(ret); + } + } + + return prop; +} +EXPORT_SYMBOL(drm_create_abm_property); + /** * drm_mode_create_hdmi_colorspace_property - create hdmi colorspace prope= rty * @connector: connector to create the Colorspace property on. diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h index 8f34f4b8183d..644c0d49500f 100644 --- a/include/drm/drm_connector.h +++ b/include/drm/drm_connector.h @@ -2454,6 +2454,7 @@ int drm_connector_attach_hdr_output_metadata_property= (struct drm_connector *conn bool drm_connector_atomic_hdr_metadata_equal(struct drm_connector_state *o= ld_state, struct drm_connector_state *new_state); int drm_mode_create_aspect_ratio_property(struct drm_device *dev); +struct drm_property *drm_create_abm_property(struct drm_device *dev); int drm_mode_create_hdmi_colorspace_property(struct drm_connector *connect= or, u32 supported_colorspaces); int drm_mode_create_dp_colorspace_property(struct drm_connector *connector, @@ -2563,4 +2564,11 @@ const char *drm_get_colorspace_name(enum drm_colorsp= ace colorspace); drm_for_each_encoder_mask(encoder, (connector)->dev, \ (connector)->possible_encoders) =20 +#define ABM_SYSFS_CONTROL -1 +#define ABM_LEVEL_OFF 0 +#define ABM_LEVEL_MIN 1 +#define ABM_LEVEL_BIAS_MIN 2 +#define ABM_LEVEL_BIAS_MAX 3 +#define ABM_LEVEL_MAX 4 + #endif --=20 2.51.2