From nobody Sun Feb 8 02:41:20 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 050162E62C8; Wed, 12 Nov 2025 21:42:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762983747; cv=none; b=DSet25xW1N5kvSg9c9l8yZl+6Ql8jktmWLhx80TSnuUCO7MSJpKfaXJzAJHnI5bJvmJXnhS57aoLwacxBohUGJxG5eFqYlzmWjHKJfQPehq+S7Aafi/111YmqZqM0EBlCALJ1j3NYBHhTqjb363CLPMdA2Bs4JAyyuLrDVb2a+0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762983747; c=relaxed/simple; bh=DK1eafKflS1VMkgKFpYRZQJtGcCG+9RUeQyxkEG/CZY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=b8RjfOEhLQNYRvTMyDnOUYRfahqLugmPCjH/BIXyw4u0xM9b66Vv8gBDJRShdMVsQen+hgr8BCK7dOzHWlL0ro8zaFlgRBZyGirm0TaIEb8vwKekDJVQNVA77mBgMh2vrUBizYRZsxUGUWfyhbqpvtVF0YorKXnkX5+SBJpQPxo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=DFNhLwlI; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="DFNhLwlI" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=OH1cdcIwLbHj9b9TDgmclt0bqqFEVSxJAiUw7x5ysn8=; b=DFNhLwlIRszZU9r7d4ezh8o+ad yndVqckm12b0swcgiYdWseZkNhPYGO+/77Jdsmj91UY11vzb9SrvF1XlLgCIHqAU9LjcIRVA698+h flZI6ojhrTfDC4QInIbZsJvmzGmPqLP+X5tuB6ZGv2CosDrdSbwq7Mw26JM0jv6pkmljbe4C3pyAx DTxLX8D1v/vaWWBwWKnOlr2FcKWmA/ynYersxRPd4sdzChnX5aalYHk/f2vwsJsQF0SsUL9aMyjlI 58v8b8ENh6+eSUctszeO/+7E71NbChtIl9LN2sFMvTgP7XQVLN1caMUe6shU10waDpxj7n659f+qk 7yXtWOiQ==; Received: from i53875b63.versanet.de ([83.135.91.99] helo=phil..) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1vJIbY-0003tg-FX; Wed, 12 Nov 2025 22:42:16 +0100 From: Heiko Stuebner To: heiko@sntech.de Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, ukleinek@debian.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 1/5] arm64: dts: rockchip: move cpu_thermal node to the correct position Date: Wed, 12 Nov 2025 22:42:02 +0100 Message-ID: <20251112214206.423244-2-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20251112214206.423244-1-heiko@sntech.de> References: <20251112214206.423244-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The &cpu_thermal node was added at the wrong position, move it to the correctly sorted one. Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3568-qnap-ts433.dts | 96 +++++++++---------- 1 file changed, 48 insertions(+), 48 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index 6ae4316761c4..5656554ca284 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -196,6 +196,54 @@ &cpu3 { cpu-supply =3D <&vdd_cpu>; }; =20 +/* + * The MCU can provide system temperature too, but only by polling and of + * course also cannot set trip points. So attach to the cpu thermal-zone + * instead to control the fan. + */ +&cpu_thermal { + trips { + case_fan0: case-fan0 { + hysteresis =3D <2000>; + temperature =3D <35000>; + type =3D "active"; + }; + + case_fan1: case-fan1 { + hysteresis =3D <2000>; + temperature =3D <45000>; + type =3D "active"; + }; + + case_fan2: case-fan2 { + hysteresis =3D <2000>; + temperature =3D <65000>; + type =3D "active"; + }; + }; + + cooling-maps { + /* + * Always provide some air movement, due to small case + * full of harddrives. + */ + map1 { + cooling-device =3D <&fan THERMAL_NO_LIMIT 1>; + trip =3D <&case_fan0>; + }; + + map2 { + cooling-device =3D <&fan 2 3>; + trip =3D <&case_fan1>; + }; + + map3 { + cooling-device =3D <&fan 4 THERMAL_NO_LIMIT>; + trip =3D <&case_fan2>; + }; + }; +}; + &gmac0 { assigned-clocks =3D <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; assigned-clock-parents =3D <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_= 2TOP>; @@ -492,54 +540,6 @@ rgmii_phy0: ethernet-phy@3 { }; }; =20 -/* - * The MCU can provide system temperature too, but only by polling and of - * course also cannot set trip points. So attach to the cpu thermal-zone - * instead to control the fan. - */ -&cpu_thermal { - trips { - case_fan0: case-fan0 { - hysteresis =3D <2000>; - temperature =3D <35000>; - type =3D "active"; - }; - - case_fan1: case-fan1 { - hysteresis =3D <2000>; - temperature =3D <45000>; - type =3D "active"; - }; - - case_fan2: case-fan2 { - hysteresis =3D <2000>; - temperature =3D <65000>; - type =3D "active"; - }; - }; - - cooling-maps { - /* - * Always provide some air movement, due to small case - * full of harddrives. - */ - map1 { - cooling-device =3D <&fan THERMAL_NO_LIMIT 1>; - trip =3D <&case_fan0>; - }; - - map2 { - cooling-device =3D <&fan 2 3>; - trip =3D <&case_fan1>; - }; - - map3 { - cooling-device =3D <&fan 4 THERMAL_NO_LIMIT>; - trip =3D <&case_fan2>; - }; - }; -}; - &pcie30phy { data-lanes =3D <1 2>; status =3D "okay"; --=20 2.47.2 From nobody Sun Feb 8 02:41:20 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5AA2A2E4247; Wed, 12 Nov 2025 21:42:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762983744; cv=none; b=UIScNyfx3yYlUnwYgsOTjt9AmccZx2Zt080ILrUpHdGgWTmSM1UPVtxd9FNV6Gj9w84hecaAbYmrRDIe5nfmmfq9WGuLHATiMB9o1/ejt05GdDVTIImz4IXZ+g6FZMNyKGr3X+qsh0JLH/W0m5LaREhR4MlFsmQIeqPZLpExccg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762983744; c=relaxed/simple; bh=mL2MyruYHzSNLfEDksFH+ASX0WWW3O6Vdh9J4O9okL0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=WWgwkyibRiMCkzip36O61e8V1VK85eaodmXE4evu1CTIc82B4LKU2w4mj4HykF/Bx6P9X4Voj3+AkDSwrF3P2p79CZoFdym+jAJrmZUO+FctcVqc+ODCSGNygHyTZo+XcriUMQTtw/AWeYJOw4oiX1Cdln0B8Usq4w9EA6h31wg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=bvLW06TP; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="bvLW06TP" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=ZxfW0g9X+oPT/UxlWtvFfsT3/2mtKXs3JrOxnk3I7Ek=; b=bvLW06TPY8VsfHgk0w8oJZy0iD YN/ITpOgjVsxsyWyP/oPNchL8FMZEX3zjy/0cFmdESUEVxhyeXGumH8v8AfFlMpPD2C/I22xI7h2r 6MsMmKDxH4PlVRRXy4tz/KwTOjduKisIbVbIyFJK80RQMzn6NOksBZB37CZ606D92/smr9IpgvTP1 13Wjzdc7oeqONb5bis5j+g/mQ+oj5caL787034SeoSGdTcfiYkV85LxWMW78KCTEQCxptlqW5JYnN TTfwCYmGZ3A9avUBREvCDr5dCl+xPOnOY+WKZKfxUtUTGr6Dg+PAgAxP0/buVwhYb+lzCBmiAUTNk /dKggsoA==; Received: from i53875b63.versanet.de ([83.135.91.99] helo=phil..) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1vJIbZ-0003tg-0g; Wed, 12 Nov 2025 22:42:17 +0100 From: Heiko Stuebner To: heiko@sntech.de Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, ukleinek@debian.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 2/5] arm64: dts: rockchip: describe mcu eeprom cells on rk3568-ts433 Date: Wed, 12 Nov 2025 22:42:03 +0100 Message-ID: <20251112214206.423244-3-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20251112214206.423244-1-heiko@sntech.de> References: <20251112214206.423244-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The MCU's eeprom contains the unit's serial and a number of slots for mac-addresses. As the MCU seems to be used in different devices, up to 8 mac addresses can live there and the unused slots are actually initialized with empty mac-address strings like 00:00:00:00:05:09 . Interestingly on the TS-433, the PCIe ethernet adapter brings its own memory to hold its mac, and the gmac0 is supposed to get its mac from the second mac-slot, while the first one stays empty. Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3568-qnap-ts433.dts | 62 +++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index 5656554ca284..224db87973b2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -655,6 +655,68 @@ fan: fan-0 { #cooling-cells =3D <2>; cooling-levels =3D <0 64 89 128 166 204 221 238>; }; + + nvmem-layout { + compatible =3D "fixed-layout"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + serial-number@0 { + reg =3D <0x0 0x13>; + }; + + ext-port@22 { + reg =3D <0x22 0x2>; + }; + + mac0: mac@24 { + compatible =3D "mac-base"; + reg =3D <0x24 0x11>; + #nvmem-cell-cells =3D <1>; + }; + + mac1: mac@35 { + compatible =3D "mac-base"; + reg =3D <0x35 0x11>; + #nvmem-cell-cells =3D <1>; + }; + + mac2: mac@46 { + compatible =3D "mac-base"; + reg =3D <0x46 0x11>; + #nvmem-cell-cells =3D <1>; + }; + + mac3: mac@57 { + compatible =3D "mac-base"; + reg =3D <0x57 0x11>; + #nvmem-cell-cells =3D <1>; + }; + + mac4: mac@68 { + compatible =3D "mac-base"; + reg =3D <0x68 0x11>; + #nvmem-cell-cells =3D <1>; + }; + + mac5: mac@79 { + compatible =3D "mac-base"; + reg =3D <0x79 0x11>; + #nvmem-cell-cells =3D <1>; + }; + + mac6: mac@8a { + compatible =3D "mac-base"; + reg =3D <0x8a 0x11>; + #nvmem-cell-cells =3D <1>; + }; + + mac7: mac@9b { + compatible =3D "mac-base"; + reg =3D <0x9b 0x11>; + #nvmem-cell-cells =3D <1>; + }; + }; }; }; =20 --=20 2.47.2 From nobody Sun Feb 8 02:41:20 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E0E062E2F03; Wed, 12 Nov 2025 21:42:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; 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charset="utf-8" The NAS series based around the rk3568 contains a number of models with 1-4 drives, that reuse most of the board structure. Therefore move the shared parts to a dtsi, to be included by the devices. As the smallest device is the 1-bay TS133, keep everything > slot1 in the individual devicetree. Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3568-qnap-ts433.dts | 666 +----------------- .../boot/dts/rockchip/rk3568-qnap-tsx33.dtsi | 608 ++++++++++++++++ 2 files changed, 645 insertions(+), 629 deletions(-) create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-qnap-tsx33.dtsi diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts433.dts index 224db87973b2..d1e3b7e7a280 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts @@ -6,10 +6,7 @@ =20 /dts-v1/; =20 -#include -#include -#include -#include "rk3568.dtsi" +#include "rk3568-qnap-tsx33.dtsi" =20 / { model =3D "Qnap TS-433-4G NAS System 4-Bay"; @@ -17,83 +14,6 @@ / { =20 aliases { ethernet0 =3D &gmac0; - mmc0 =3D &sdhci; - rtc0 =3D &rtc_rv8263; - }; - - chosen { - stdout-path =3D "serial2:115200n8"; - }; - - keys { - compatible =3D "gpio-keys"; - pinctrl-0 =3D <©_button_pin>, <&reset_button_pin>; - pinctrl-names =3D "default"; - - key-copy { - label =3D "copy"; - gpios =3D <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>; - linux,code =3D ; - }; - - key-reset { - label =3D "reset"; - gpios =3D <&gpio0 RK_PB5 GPIO_ACTIVE_LOW>; - linux,code =3D ; - }; - }; - - leds { - compatible =3D "gpio-leds"; - - led-0 { - color =3D ; - function =3D LED_FUNCTION_DISK; - gpios =3D <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>; - label =3D "hdd1:green:disk"; - linux,default-trigger =3D "disk-activity"; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&hdd1_led_pin>; - }; - - led-1 { - color =3D ; - function =3D LED_FUNCTION_DISK; - gpios =3D <&gpio1 RK_PD6 GPIO_ACTIVE_LOW>; - label =3D "hdd2:green:disk"; - linux,default-trigger =3D "disk-activity"; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&hdd2_led_pin>; - }; - - led-2 { - color =3D ; - function =3D LED_FUNCTION_DISK; - gpios =3D <&gpio1 RK_PD7 GPIO_ACTIVE_LOW>; - label =3D "hdd3:green:disk"; - linux,default-trigger =3D "disk-activity"; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&hdd3_led_pin>; - }; - - led-3 { - color =3D ; - function =3D LED_FUNCTION_DISK; - gpios =3D <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>; - label =3D "hdd4:green:disk"; - linux,default-trigger =3D "disk-activity"; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&hdd4_led_pin>; - }; - }; - - dc_12v: regulator-dc-12v { - compatible =3D "regulator-fixed"; - regulator-name =3D "dc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt =3D <12000000>; - regulator-max-microvolt =3D <12000000>; }; =20 vcc3v3_pcie: regulator-vcc3v3-pcie { @@ -105,74 +25,6 @@ vcc3v3_pcie: regulator-vcc3v3-pcie { gpios =3D <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; vin-supply =3D <&dc_12v>; }; - - vcc3v3_sys: regulator-vcc3v3-sys { - compatible =3D "regulator-fixed"; - regulator-name =3D "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt =3D <3300000>; - regulator-max-microvolt =3D <3300000>; - vin-supply =3D <&dc_12v>; - }; - - vcc5v0_host: regulator-vcc5v0-host { - compatible =3D "regulator-fixed"; - enable-active-high; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&vcc5v0_host_en>; - gpio =3D <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; - regulator-name =3D "vcc5v0_host"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt =3D <5000000>; - regulator-max-microvolt =3D <5000000>; - vin-supply =3D <&vcc5v0_usb>; - }; - - vcc5v0_otg: regulator-vcc5v0-otg { - compatible =3D "regulator-fixed"; - enable-active-high; - gpio =3D <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&vcc5v0_otg_en>; - regulator-name =3D "vcc5v0_otg"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt =3D <5000000>; - regulator-max-microvolt =3D <5000000>; - vin-supply =3D <&vcc5v0_usb>; - }; - - vcc5v0_sys: regulator-vcc5v0-sys { - compatible =3D "regulator-fixed"; - regulator-name =3D "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt =3D <5000000>; - regulator-max-microvolt =3D <5000000>; - vin-supply =3D <&dc_12v>; - }; - - vcc5v0_usb: regulator-vcc5v0-usb { - compatible =3D "regulator-fixed"; - regulator-name =3D "vcc5v0_usb"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt =3D <5000000>; - regulator-max-microvolt =3D <5000000>; - vin-supply =3D <&dc_12v>; - }; -}; - -/* connected to usb_host0_xhci */ -&combphy0 { - status =3D "okay"; -}; - -/* connected to sata1 */ -&combphy1 { - status =3D "okay"; }; =20 /* connected to sata2 */ @@ -180,70 +32,6 @@ &combphy2 { status =3D "okay"; }; =20 -&cpu0 { - cpu-supply =3D <&vdd_cpu>; -}; - -&cpu1 { - cpu-supply =3D <&vdd_cpu>; -}; - -&cpu2 { - cpu-supply =3D <&vdd_cpu>; -}; - -&cpu3 { - cpu-supply =3D <&vdd_cpu>; -}; - -/* - * The MCU can provide system temperature too, but only by polling and of - * course also cannot set trip points. So attach to the cpu thermal-zone - * instead to control the fan. - */ -&cpu_thermal { - trips { - case_fan0: case-fan0 { - hysteresis =3D <2000>; - temperature =3D <35000>; - type =3D "active"; - }; - - case_fan1: case-fan1 { - hysteresis =3D <2000>; - temperature =3D <45000>; - type =3D "active"; - }; - - case_fan2: case-fan2 { - hysteresis =3D <2000>; - temperature =3D <65000>; - type =3D "active"; - }; - }; - - cooling-maps { - /* - * Always provide some air movement, due to small case - * full of harddrives. - */ - map1 { - cooling-device =3D <&fan THERMAL_NO_LIMIT 1>; - trip =3D <&case_fan0>; - }; - - map2 { - cooling-device =3D <&fan 2 3>; - trip =3D <&case_fan1>; - }; - - map3 { - cooling-device =3D <&fan 4 THERMAL_NO_LIMIT>; - trip =3D <&case_fan2>; - }; - }; -}; - &gmac0 { assigned-clocks =3D <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; assigned-clock-parents =3D <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_= 2TOP>; @@ -260,263 +48,7 @@ &gmac0_rgmii_clk status =3D "okay"; }; =20 -&gpu { - mali-supply =3D <&vdd_gpu>; - status =3D "okay"; -}; - -&i2c0 { - status =3D "okay"; - - pmic@20 { - compatible =3D "rockchip,rk809"; - reg =3D <0x20>; - interrupt-parent =3D <&gpio0>; - interrupts =3D ; - #clock-cells =3D <1>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pmic_int_l>; - system-power-controller; - vcc1-supply =3D <&vcc3v3_sys>; - vcc2-supply =3D <&vcc3v3_sys>; - vcc3-supply =3D <&vcc3v3_sys>; - vcc4-supply =3D <&vcc3v3_sys>; - vcc5-supply =3D <&vcc3v3_sys>; - vcc6-supply =3D <&vcc3v3_sys>; - vcc7-supply =3D <&vcc3v3_sys>; - vcc8-supply =3D <&vcc3v3_sys>; - vcc9-supply =3D <&vcc3v3_sys>; - wakeup-source; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-name =3D "vdd_logic"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode =3D <0x2>; - regulator-min-microvolt =3D <500000>; - regulator-max-microvolt =3D <1350000>; - regulator-ramp-delay =3D <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-name =3D "vdd_gpu"; - regulator-always-on; - regulator-initial-mode =3D <0x2>; - regulator-min-microvolt =3D <500000>; - regulator-max-microvolt =3D <1350000>; - regulator-ramp-delay =3D <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name =3D "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode =3D <0x2>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vdd_npu: DCDC_REG4 { - regulator-name =3D "vdd_npu"; - regulator-initial-mode =3D <0x2>; - regulator-min-microvolt =3D <500000>; - regulator-max-microvolt =3D <1350000>; - regulator-ramp-delay =3D <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG5 { - regulator-name =3D "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_image: LDO_REG1 { - regulator-name =3D "vdda0v9_image"; - regulator-always-on; - regulator-min-microvolt =3D <900000>; - regulator-max-microvolt =3D <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-name =3D "vdda_0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt =3D <900000>; - regulator-max-microvolt =3D <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-name =3D "vdda0v9_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt =3D <900000>; - regulator-max-microvolt =3D <900000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt =3D <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-name =3D "vccio_acodec"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt =3D <3300000>; - regulator-max-microvolt =3D <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-name =3D "vccio_sd"; - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-name =3D "vcc3v3_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt =3D <3300000>; - regulator-max-microvolt =3D <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt =3D <3300000>; - }; - }; - - vcca_1v8: LDO_REG7 { - regulator-name =3D "vcca_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_pmu: LDO_REG8 { - regulator-name =3D "vcca1v8_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt =3D <1800000>; - }; - }; - - vcca1v8_image: LDO_REG9 { - regulator-name =3D "vcca1v8_image"; - regulator-always-on; - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3: SWITCH_REG1 { - regulator-name =3D "vcc_3v3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_sd: SWITCH_REG2 { - regulator-name =3D "vcc3v3_sd"; - /* - * turning this off, breaks access to both - * PCIe controllers, refclk generator perhaps - */ - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; - - vdd_cpu: regulator@40 { - compatible =3D "silergy,syr827"; - reg =3D <0x40>; - fcs,suspend-voltage-selector =3D <1>; - regulator-name =3D "vdd_cpu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt =3D <712500>; - regulator-max-microvolt =3D <1390000>; - regulator-ramp-delay =3D <2300>; - vin-supply =3D <&vcc5v0_sys>; - }; -}; - &i2c1 { - status =3D "okay"; - - rtc_rv8263: rtc@51 { - compatible =3D "microcrystal,rv8263"; - reg =3D <0x51>; - wakeup-source; - }; - - /* eeprom for vital-product-data on the mainboard */ - eeprom@54 { - compatible =3D "giantec,gt24c04a", "atmel,24c04"; - reg =3D <0x54>; - label =3D "VPD_MB"; - num-addresses =3D <2>; - pagesize =3D <16>; - read-only; - }; - /* eeprom for vital-product-data on the backplane */ eeprom@56 { compatible =3D "giantec,gt24c04a", "atmel,24c04"; @@ -528,6 +60,42 @@ eeprom@56 { }; }; =20 +&leds { + led-1 { + color =3D ; + function =3D LED_FUNCTION_DISK; + gpios =3D <&gpio1 RK_PD6 GPIO_ACTIVE_LOW>; + label =3D "hdd2:green:disk"; + linux,default-trigger =3D "disk-activity"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hdd2_led_pin>; + }; + + led-2 { + color =3D ; + function =3D LED_FUNCTION_DISK; + gpios =3D <&gpio1 RK_PD7 GPIO_ACTIVE_LOW>; + label =3D "hdd3:green:disk"; + linux,default-trigger =3D "disk-activity"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hdd3_led_pin>; + }; + + led-3 { + color =3D ; + function =3D LED_FUNCTION_DISK; + gpios =3D <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>; + label =3D "hdd4:green:disk"; + linux,default-trigger =3D "disk-activity"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hdd4_led_pin>; + }; +}; + +&mcu { + compatible =3D "qnap,ts433-mcu"; +}; + &mdio0 { rgmii_phy0: ethernet-phy@3 { /* Motorcomm YT8521 phy */ @@ -567,21 +135,7 @@ eth_phy0_reset_pin: eth-phy0-reset-pin { }; }; =20 - keys { - copy_button_pin: copy-button-pin { - rockchip,pins =3D <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - reset_button_pin: reset-button-pin { - rockchip,pins =3D <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - leds { - hdd1_led_pin: hdd1-led-pin { - rockchip,pins =3D <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>; - }; - hdd2_led_pin: hdd2-led-pin { rockchip,pins =3D <1 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; }; @@ -594,152 +148,12 @@ hdd4_led_pin: hdd4_led-pin { rockchip,pins =3D <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; }; }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins =3D <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb { - vcc5v0_host_en: vcc5v0-host-en { - rockchip,pins =3D <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - vcc5v0_otg_en: vcc5v0-otg-en { - rockchip,pins =3D <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pmu_io_domains { - vccio4-supply =3D <&vcc_1v8>; - vccio6-supply =3D <&vcc_1v8>; - status =3D "okay"; -}; - -&sata1 { - status =3D "okay"; }; =20 &sata2 { status =3D "okay"; }; =20 -&sdhci { - bus-width =3D <8>; - max-frequency =3D <200000000>; - non-removable; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; - status =3D "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode =3D <1>; - rockchip,hw-tshut-polarity =3D <0>; - status =3D "okay"; -}; - -/* - * Connected to an MCU, that provides access to more LEDs, - * buzzer, fan control and more. - */ -&uart0 { - status =3D "okay"; - - mcu { - compatible =3D "qnap,ts433-mcu"; - - fan: fan-0 { - #cooling-cells =3D <2>; - cooling-levels =3D <0 64 89 128 166 204 221 238>; - }; - - nvmem-layout { - compatible =3D "fixed-layout"; - #address-cells =3D <1>; - #size-cells =3D <1>; - - serial-number@0 { - reg =3D <0x0 0x13>; - }; - - ext-port@22 { - reg =3D <0x22 0x2>; - }; - - mac0: mac@24 { - compatible =3D "mac-base"; - reg =3D <0x24 0x11>; - #nvmem-cell-cells =3D <1>; - }; - - mac1: mac@35 { - compatible =3D "mac-base"; - reg =3D <0x35 0x11>; - #nvmem-cell-cells =3D <1>; - }; - - mac2: mac@46 { - compatible =3D "mac-base"; - reg =3D <0x46 0x11>; - #nvmem-cell-cells =3D <1>; - }; - - mac3: mac@57 { - compatible =3D "mac-base"; - reg =3D <0x57 0x11>; - #nvmem-cell-cells =3D <1>; - }; - - mac4: mac@68 { - compatible =3D "mac-base"; - reg =3D <0x68 0x11>; - #nvmem-cell-cells =3D <1>; - }; - - mac5: mac@79 { - compatible =3D "mac-base"; - reg =3D <0x79 0x11>; - #nvmem-cell-cells =3D <1>; - }; - - mac6: mac@8a { - compatible =3D "mac-base"; - reg =3D <0x8a 0x11>; - #nvmem-cell-cells =3D <1>; - }; - - mac7: mac@9b { - compatible =3D "mac-base"; - reg =3D <0x9b 0x11>; - #nvmem-cell-cells =3D <1>; - }; - }; - }; -}; - -/* - * Pins available on CN3 connector at TTL voltage level (3V3). - * ,_ _. - * |1234| 1=3DTX 2=3DVCC - * `----' 3=3DRX 4=3DGND - */ -&uart2 { - status =3D "okay"; -}; - -&usb2phy0 { - status =3D "okay"; -}; - -/* connected to usb_host0_xhci */ -&usb2phy0_otg { - phy-supply =3D <&vcc5v0_otg>; - status =3D "okay"; -}; - &usb2phy1 { status =3D "okay"; }; @@ -765,12 +179,6 @@ &usb_host0_ohci { status =3D "okay"; }; =20 -/* front port */ -&usb_host0_xhci { - dr_mode =3D "host"; - status =3D "okay"; -}; - /* left port backside */ &usb_host1_ehci { status =3D "okay"; diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-tsx33.dtsi b/arch/arm= 64/boot/dts/rockchip/rk3568-qnap-tsx33.dtsi new file mode 100644 index 000000000000..f009275c72c8 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-tsx33.dtsi @@ -0,0 +1,608 @@ +#include +#include +#include +#include "rk3568.dtsi" + +/ { + aliases { + mmc0 =3D &sdhci; + rtc0 =3D &rtc_rv8263; + }; + + chosen { + stdout-path =3D "serial2:115200n8"; + }; + + keys { + compatible =3D "gpio-keys"; + pinctrl-0 =3D <©_button_pin>, <&reset_button_pin>; + pinctrl-names =3D "default"; + + key-copy { + label =3D "copy"; + gpios =3D <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + + key-reset { + label =3D "reset"; + gpios =3D <&gpio0 RK_PB5 GPIO_ACTIVE_LOW>; + linux,code =3D ; + }; + }; + + leds: leds { + compatible =3D "gpio-leds"; + + led-0 { + color =3D ; + function =3D LED_FUNCTION_DISK; + gpios =3D <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>; + label =3D "hdd1:green:disk"; + linux,default-trigger =3D "disk-activity"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hdd1_led_pin>; + }; + }; + + dc_12v: regulator-dc-12v { + compatible =3D "regulator-fixed"; + regulator-name =3D "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <12000000>; + regulator-max-microvolt =3D <12000000>; + }; + + vcc3v3_sys: regulator-vcc3v3-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&dc_12v>; + }; + + vcc5v0_host: regulator-vcc5v0-host { + compatible =3D "regulator-fixed"; + enable-active-high; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vcc5v0_host_en>; + gpio =3D <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; + regulator-name =3D "vcc5v0_host"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc5v0_usb>; + }; + + vcc5v0_otg: regulator-vcc5v0-otg { + compatible =3D "regulator-fixed"; + enable-active-high; + gpio =3D <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vcc5v0_otg_en>; + regulator-name =3D "vcc5v0_otg"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc5v0_usb>; + }; + + vcc5v0_sys: regulator-vcc5v0-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&dc_12v>; + }; + + vcc5v0_usb: regulator-vcc5v0-usb { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_usb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&dc_12v>; + }; +}; + +/* connected to usb_host0_xhci */ +&combphy0 { + status =3D "okay"; +}; + +/* connected to sata1 */ +&combphy1 { + status =3D "okay"; +}; + +&cpu0 { + cpu-supply =3D <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply =3D <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply =3D <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply =3D <&vdd_cpu>; +}; + +/* + * The MCU can provide system temperature too, but only by polling and of + * course also cannot set trip points. So attach to the cpu thermal-zone + * instead to control the fan. + */ +&cpu_thermal { + trips { + case_fan0: case-fan0 { + hysteresis =3D <2000>; + temperature =3D <35000>; + type =3D "active"; + }; + + case_fan1: case-fan1 { + hysteresis =3D <2000>; + temperature =3D <45000>; + type =3D "active"; + }; + + case_fan2: case-fan2 { + hysteresis =3D <2000>; + temperature =3D <65000>; + type =3D "active"; + }; + }; + + cooling-maps { + /* + * Always provide some air movement, due to small case + * full of harddrives. + */ + map1 { + cooling-device =3D <&fan THERMAL_NO_LIMIT 1>; + trip =3D <&case_fan0>; + }; + + map2 { + cooling-device =3D <&fan 2 3>; + trip =3D <&case_fan1>; + }; + + map3 { + cooling-device =3D <&fan 4 THERMAL_NO_LIMIT>; + trip =3D <&case_fan2>; + }; + }; +}; + +&gpu { + mali-supply =3D <&vdd_gpu>; + status =3D "okay"; +}; + +&i2c0 { + status =3D "okay"; + + pmic@20 { + compatible =3D "rockchip,rk809"; + reg =3D <0x20>; + interrupt-parent =3D <&gpio0>; + interrupts =3D ; + #clock-cells =3D <1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pmic_int_l>; + system-power-controller; + vcc1-supply =3D <&vcc3v3_sys>; + vcc2-supply =3D <&vcc3v3_sys>; + vcc3-supply =3D <&vcc3v3_sys>; + vcc4-supply =3D <&vcc3v3_sys>; + vcc5-supply =3D <&vcc3v3_sys>; + vcc6-supply =3D <&vcc3v3_sys>; + vcc7-supply =3D <&vcc3v3_sys>; + vcc8-supply =3D <&vcc3v3_sys>; + vcc9-supply =3D <&vcc3v3_sys>; + wakeup-source; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name =3D "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode =3D <0x2>; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-name =3D "vdd_gpu"; + regulator-always-on; + regulator-initial-mode =3D <0x2>; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name =3D "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode =3D <0x2>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_npu: DCDC_REG4 { + regulator-name =3D "vdd_npu"; + regulator-initial-mode =3D <0x2>; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-name =3D "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_image: LDO_REG1 { + regulator-name =3D "vdda0v9_image"; + regulator-always-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-name =3D "vdda_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-name =3D "vdda0v9_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-name =3D "vccio_acodec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name =3D "vccio_sd"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-name =3D "vcc3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-name =3D "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-name =3D "vcca1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + vcca1v8_image: LDO_REG9 { + regulator-name =3D "vcca1v8_image"; + regulator-always-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-name =3D "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-name =3D "vcc3v3_sd"; + /* + * turning this off, breaks access to both + * PCIe controllers, refclk generator perhaps + */ + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; + + vdd_cpu: regulator@40 { + compatible =3D "silergy,syr827"; + reg =3D <0x40>; + fcs,suspend-voltage-selector =3D <1>; + regulator-name =3D "vdd_cpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <712500>; + regulator-max-microvolt =3D <1390000>; + regulator-ramp-delay =3D <2300>; + vin-supply =3D <&vcc5v0_sys>; + }; +}; + +&i2c1 { + status =3D "okay"; + + rtc_rv8263: rtc@51 { + compatible =3D "microcrystal,rv8263"; + reg =3D <0x51>; + wakeup-source; + }; + + /* eeprom for vital-product-data on the mainboard */ + eeprom@54 { + compatible =3D "giantec,gt24c04a", "atmel,24c04"; + reg =3D <0x54>; + label =3D "VPD_MB"; + num-addresses =3D <2>; + pagesize =3D <16>; + read-only; + }; +}; + +&pinctrl { + keys { + copy_button_pin: copy-button-pin { + rockchip,pins =3D <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + reset_button_pin: reset-button-pin { + rockchip,pins =3D <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + leds { + hdd1_led_pin: hdd1-led-pin { + rockchip,pins =3D <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins =3D <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + usb { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins =3D <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + vcc5v0_otg_en: vcc5v0-otg-en { + rockchip,pins =3D <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pmu_io_domains { + vccio4-supply =3D <&vcc_1v8>; + vccio6-supply =3D <&vcc_1v8>; + status =3D "okay"; +}; + +&sata1 { + status =3D "okay"; +}; + +&sdhci { + bus-width =3D <8>; + max-frequency =3D <200000000>; + non-removable; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; + status =3D "okay"; +}; + +&tsadc { + rockchip,hw-tshut-mode =3D <1>; + rockchip,hw-tshut-polarity =3D <0>; + status =3D "okay"; +}; + +/* + * Connected to an MCU, that provides access to more LEDs, + * buzzer, fan control and more. + */ +&uart0 { + status =3D "okay"; + + mcu: mcu { + fan: fan-0 { + #cooling-cells =3D <2>; + cooling-levels =3D <0 64 89 128 166 204 221 238>; + }; + + nvmem-layout { + compatible =3D "fixed-layout"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + serial-number@0 { + reg =3D <0x0 0x13>; + }; + + ext-port@22 { + reg =3D <0x22 0x2>; + }; + + mac0: mac@24 { + compatible =3D "mac-base"; + reg =3D <0x24 0x11>; + #nvmem-cell-cells =3D <1>; + }; + + mac1: mac@35 { + compatible =3D "mac-base"; + reg =3D <0x35 0x11>; + #nvmem-cell-cells =3D <1>; + }; + + mac2: mac@46 { + compatible =3D "mac-base"; + reg =3D <0x46 0x11>; + #nvmem-cell-cells =3D <1>; + }; + + mac3: mac@57 { + compatible =3D "mac-base"; + reg =3D <0x57 0x11>; + #nvmem-cell-cells =3D <1>; + }; + + mac4: mac@68 { + compatible =3D "mac-base"; + reg =3D <0x68 0x11>; + #nvmem-cell-cells =3D <1>; + }; + + mac5: mac@79 { + compatible =3D "mac-base"; + reg =3D <0x79 0x11>; + #nvmem-cell-cells =3D <1>; + }; + + mac6: mac@8a { + compatible =3D "mac-base"; + reg =3D <0x8a 0x11>; + #nvmem-cell-cells =3D <1>; + }; + + mac7: mac@9b { + compatible =3D "mac-base"; + reg =3D <0x9b 0x11>; + #nvmem-cell-cells =3D <1>; + }; + }; + }; +}; + +/* + * Pins available on CN3 connector at TTL voltage level (3V3). + * ,_ _. + * |1234| 1=3DTX 2=3DVCC + * `----' 3=3DRX 4=3DGND + */ +&uart2 { + status =3D "okay"; +}; + +&usb2phy0 { + status =3D "okay"; +}; + +/* connected to usb_host0_xhci */ +&usb2phy0_otg { + phy-supply =3D <&vcc5v0_otg>; + status =3D "okay"; +}; + +/* front port */ +&usb_host0_xhci { + dr_mode =3D "host"; + status =3D "okay"; +}; --=20 2.47.2 From nobody Sun Feb 8 02:41:20 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B87C52E2846; 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Wed, 12 Nov 2025 22:42:18 +0100 From: Heiko Stuebner To: heiko@sntech.de Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, ukleinek@debian.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Conor Dooley Subject: [PATCH v2 4/5] dt-bindings: arm: rockchip: add TS233 to RK3568-based QNAP NAS devices Date: Wed, 12 Nov 2025 22:42:05 +0100 Message-ID: <20251112214206.423244-5-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20251112214206.423244-1-heiko@sntech.de> References: <20251112214206.423244-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" QNAP builds a number of variants of the RK3568-based NAS design. Add the 2-bay TS233 variant. Acked-by: Conor Dooley Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Document= ation/devicetree/bindings/arm/rockchip.yaml index 6aceaa8acbb2..790f910aa38b 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -868,9 +868,11 @@ properties: - const: prt,mecsbc - const: rockchip,rk3568 =20 - - description: QNAP TS-433-4G 4-Bay NAS + - description: QNAP TS-x33 NAS devices items: - - const: qnap,ts433 + - enum: + - qnap,ts233 + - qnap,ts433 - const: rockchip,rk3568 =20 - description: Radxa Compute Module 3 (CM3) --=20 2.47.2 From nobody Sun Feb 8 02:41:20 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 56DC62E339B; Wed, 12 Nov 2025 21:42:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762983751; cv=none; b=Td2dZJ8PdCw+2mxN6O/8L2pGT4odBwqnFRuSDyyqx5h3H7H/qY1lM1o/Iz4qQUP2edaX4nEt3rYMlTjozsB7EjdvYYp+iZL6+kc9Z3NN78rVFWBBSCXgWTzumw8WmoddNDeAceax5EyhxEyC3pDxkXNxmm6XPe37oDtvMXdzyIg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762983751; c=relaxed/simple; bh=suOMxoxsrDn9Qbk3yoCOOCXl2JF9jd0Jq5wWPUwICPU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=f0IiJ1EgvE0Cvo+/WqnrUF3IAkIGXZAB9wAvOs86AR4v0ZaWL4/9ARCr6zLVMfmhXxmEw7Y6BFk7r3BRdNoE+hH4HilhWIYwH1MzMN9eeoxfgK3IfBpIpYqjVHywkbb34rfkx+lNlV0j2lYA7FMtcs52bW0MGwi5izIiCyUAjQY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=03K0jtFL; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="03K0jtFL" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=zIMvkc+aUVzHtiIWLt+CuErIrmOBVHtQG23gZ5btGGw=; b=03K0jtFLU3fIFAIX/D9cUYTXAX NSV/viXR3UHmkrp5fEQ8NDk6v2M07kqK1nLXh+r2oYNXkzrt90zh+b0eaLzu5ABZtb1xmGq4zdOo+ XVHoA+2CHDH5cYLrqoAtN2frn5aFssIRlC+L/btG3fi0qHYM6rcgqhK1TadOuPC6H6M9tZ9658Rts S9dm8MUeuNONdrGWTRmxsLOfdLJiF8FYCe/w16Rug+3Ph4J2NvY9iHnQ6exsFqrpsyYT+YcABkzUU ywC1koskohmoY/yc52teo39XNzKMTuPSLQO+VWhZ4LRRL2xIk4+kDgaMbNWkdpkS6zvtlSDebnUFy kpaRZNkw==; Received: from i53875b63.versanet.de ([83.135.91.99] helo=phil..) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1vJIba-0003tg-Lj; Wed, 12 Nov 2025 22:42:18 +0100 From: Heiko Stuebner To: heiko@sntech.de Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, ukleinek@debian.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 5/5] arm64: dts: rockchip: add QNAP TS233 devicetree Date: Wed, 12 Nov 2025 22:42:06 +0100 Message-ID: <20251112214206.423244-6-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20251112214206.423244-1-heiko@sntech.de> References: <20251112214206.423244-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The TS233 is a 2 bay NAS similar to the TS433. Architecture-wise it really seems to be the same minus the additional PCIe connected components the TS433 has. So it just uses two of the SoCs SATA ports and the SoC's gigabit ethernet. Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3568-qnap-ts233.dts | 131 ++++++++++++++++++ 2 files changed, 132 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-qnap-ts233.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index ad684e3831bc..d1d384df00b7 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -142,6 +142,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-nanopi-r5c.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-nanopi-r5s.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-odroid-m1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-photonicat.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-qnap-ts233.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-qnap-ts433.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-radxa-e25.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-roc-pc.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts233.dts b/arch/arm6= 4/boot/dts/rockchip/rk3568-qnap-ts233.dts new file mode 100644 index 000000000000..f16d1c628793 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3568-qnap-ts233.dts @@ -0,0 +1,131 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. + * Copyright (c) 2024 Heiko Stuebner + */ + +/dts-v1/; + +#include "rk3568-qnap-tsx33.dtsi" + +/ { + model =3D "Qnap TS-233-2G NAS System 2-Bay"; + compatible =3D "qnap,ts233", "rockchip,rk3568"; + + aliases { + ethernet0 =3D &gmac0; + }; +}; + +/* connected to sata2 */ +&combphy2 { + status =3D "okay"; +}; + +&gmac0 { + assigned-clocks =3D <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; + assigned-clock-parents =3D <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_= 2TOP>; + assigned-clock-rates =3D <0>, <125000000>; + clock_in_out =3D "output"; + phy-handle =3D <&rgmii_phy0>; + phy-mode =3D "rgmii-id"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gmac0_miim + &gmac0_tx_bus2 + &gmac0_rx_bus2 + &gmac0_rgmii_clk + &gmac0_rgmii_bus>; + status =3D "okay"; +}; + +&i2c1 { + /* eeprom for vital-product-data on the backplane */ + eeprom@56 { + compatible =3D "giantec,gt24c04a", "atmel,24c04"; + reg =3D <0x56>; + label =3D "VPD_BP"; + num-addresses =3D <2>; + pagesize =3D <16>; + read-only; + }; +}; + +&leds { + led-1 { + color =3D ; + function =3D LED_FUNCTION_DISK; + gpios =3D <&gpio1 RK_PD6 GPIO_ACTIVE_LOW>; + label =3D "hdd2:green:disk"; + linux,default-trigger =3D "disk-activity"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hdd2_led_pin>; + }; +}; + +&mcu { + compatible =3D "qnap,ts233-mcu"; +}; + +&mdio0 { + rgmii_phy0: ethernet-phy@3 { + /* Motorcomm YT8521 phy */ + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x3>; + pinctrl-0 =3D <ð_phy0_reset_pin>; + pinctrl-names =3D "default"; + reset-assert-us =3D <10000>; + reset-gpios =3D <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>; + }; +}; + +&pinctrl { + gmac0 { + eth_phy0_reset_pin: eth-phy0-reset-pin { + rockchip,pins =3D <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + leds { + hdd2_led_pin: hdd2-led-pin { + rockchip,pins =3D <1 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&sata2 { + status =3D "okay"; +}; + +&usb2phy1 { + status =3D "okay"; +}; + +/* connected to usb_host1_ehci/ohci */ +&usb2phy1_host { + phy-supply =3D <&vcc5v0_host>; + status =3D "okay"; +}; + +/* connected to usb_host0_ehci/ohci */ +&usb2phy1_otg { + phy-supply =3D <&vcc5v0_host>; + status =3D "okay"; +}; + +/* right port backside */ +&usb_host0_ehci { + status =3D "okay"; +}; + +&usb_host0_ohci { + status =3D "okay"; +}; + +/* left port backside */ +&usb_host1_ehci { + status =3D "okay"; +}; + +&usb_host1_ohci { + status =3D "okay"; +}; --=20 2.47.2