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Wed, 12 Nov 2025 06:42:04 -0800 (PST) Received: from SMW024614.wbi.nxp.com ([128.77.115.158]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-64183bc4533sm8411180a12.4.2025.11.12.06.42.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Nov 2025 06:42:04 -0800 (PST) From: Laurentiu Mihalcea To: Liam Girdwood , Peter Ujfalusi , Bard Liao , Ranjani Sridharan , Daniel Baluta , Kai Vehmanen , Mark Brown Cc: linux-sound@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] ASoC: SOF: imx9: use SCMI API for LM management Date: Wed, 12 Nov 2025 06:41:24 -0800 Message-ID: <20251112144124.680-1-laurentiumihalcea111@gmail.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Laurentiu Mihalcea Linux supports NXP's LMM SCMI protocol so switch to using the appropriate API. The SIPs were intended to act as placeholders until the support for said protocol was upstreamed. The underlying CPU protocol command from IMX_SIP_SRC_M_RESET_ADDR_SET is replaced by a LMM protocol command with the same effect (i.e. setting the boot address) since using the CPU protocol would require additional permissions (which TF-A already had). Apart from this, the SIPs are replaced by their equivalent Linux LMM commands. Signed-off-by: Laurentiu Mihalcea --- sound/soc/sof/imx/imx9.c | 36 ++++++++---------------------------- 1 file changed, 8 insertions(+), 28 deletions(-) diff --git a/sound/soc/sof/imx/imx9.c b/sound/soc/sof/imx/imx9.c index 853155d5990a..e56e8a1c8022 100644 --- a/sound/soc/sof/imx/imx9.c +++ b/sound/soc/sof/imx/imx9.c @@ -3,19 +3,11 @@ * Copyright 2025 NXP */ =20 -#include +#include =20 #include "imx-common.h" =20 -#define IMX_SIP_SRC 0xC2000005 -#define IMX_SIP_SRC_M_RESET_ADDR_SET 0x03 - -#define IMX95_CPU_VEC_FLAGS_BOOT BIT(29) - -#define IMX_SIP_LMM 0xC200000F -#define IMX_SIP_LMM_BOOT 0x0 -#define IMX_SIP_LMM_SHUTDOWN 0x1 - +#define IMX95_M7_CPU_ID 0x1 #define IMX95_M7_LM_ID 0x1 =20 static struct snd_soc_dai_driver imx95_dai[] =3D { @@ -38,7 +30,6 @@ static int imx95_ops_init(struct snd_sof_dev *sdev) =20 static int imx95_chip_probe(struct snd_sof_dev *sdev) { - struct arm_smccc_res smc_res; struct platform_device *pdev; struct resource *res; =20 @@ -49,31 +40,20 @@ static int imx95_chip_probe(struct snd_sof_dev *sdev) return dev_err_probe(sdev->dev, -ENODEV, "failed to fetch SRAM region\n"); =20 - /* set core boot reset address */ - arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_M_RESET_ADDR_SET, res->start, - IMX95_CPU_VEC_FLAGS_BOOT, 0, 0, 0, 0, &smc_res); - - return smc_res.a0; + return scmi_imx_lmm_reset_vector_set(IMX95_M7_LM_ID, IMX95_M7_CPU_ID, + 0, res->start); } =20 static int imx95_core_kick(struct snd_sof_dev *sdev) { - struct arm_smccc_res smc_res; - - arm_smccc_smc(IMX_SIP_LMM, IMX_SIP_LMM_BOOT, - IMX95_M7_LM_ID, 0, 0, 0, 0, 0, &smc_res); - - return smc_res.a0; + return scmi_imx_lmm_operation(IMX95_M7_LM_ID, SCMI_IMX_LMM_BOOT, 0); } =20 static int imx95_core_shutdown(struct snd_sof_dev *sdev) { - struct arm_smccc_res smc_res; - - arm_smccc_smc(IMX_SIP_LMM, IMX_SIP_LMM_SHUTDOWN, - IMX95_M7_LM_ID, 0, 0, 0, 0, 0, &smc_res); - - return smc_res.a0; + return scmi_imx_lmm_operation(IMX95_M7_LM_ID, + SCMI_IMX_LMM_SHUTDOWN, + SCMI_IMX_LMM_OP_FORCEFUL); } =20 static const struct imx_chip_ops imx95_chip_ops =3D { --=20 2.43.0