From nobody Sun Feb 8 07:44:40 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 17BC72C11C4; Wed, 12 Nov 2025 03:41:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762918898; cv=none; b=Ec/nASRFmbMBiiY7XTf+6xjmuZVbKi2trHgWYZ2Oy64IoCZAm87iQyhNZChLErGXPHMMy22qAVxSmdMbvAZqeQVkrQm9Jf4CGPHUNVEvkcL+UivBMpgHZRb7SdOctkmRRRWkoJ0e169VY4nXTk08H7XFklZlk3QtpVMC8hn+sBc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762918898; c=relaxed/simple; bh=JcyC3jYPkYxGqLIHUa1cSPrnz2LGoNNjJ8bjhu8dicw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ioFtQW0ucS/Yy4nGQsP7Ve13Ngy5dBlsC02pb9wcBFDwTH78F4eYp4ichiGO08UD6u1jnQcKJT+imXOv9H+FhOdl4SZZQSLzgZ6avpkFVYDtGNo4yeNfVTbWFr2q1Zm/AlSwBLFraTm1vNRbehCtRGoMFd+UrSopg5E5bu3CkKs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=ZTocwu5/; arc=none smtp.client-ip=192.198.163.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="ZTocwu5/" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1762918896; x=1794454896; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=JcyC3jYPkYxGqLIHUa1cSPrnz2LGoNNjJ8bjhu8dicw=; b=ZTocwu5/sYxDmaSqVeXdEqSP5s/km+gP/AZV2SnakE5dciIX9QDH1f7A 1BNAy32soAhe5zYo0em8VZfxjht0Rw3UyEPpnT0YuAni13Y2CAnB63kmt 25ogyn4KqxqfOQEtq3amUB0ka96grHAHH34nu6+dFBf0F7MTETQr8hx0D gCfFPVmfsnJwu+0m+ndA8ErttUKfuQ8DLMqzHrsZf9ZgFexSl0w3dI0UB N7VB6SZfXgi31mN7pYj04MFcjUD4D5+7tuA4HXCIx5KBOiKsG+V8iFCnY Bufrs29BdTcCClFtRisuo2bQdDuitsQEuw5aMm6PL0jNMl0mPm3mQYXsi A==; X-CSE-ConnectionGUID: 4+8uIeLLSrCEvJK3OG2bMA== X-CSE-MsgGUID: 057Z0OouTA+XR/kv/kxkUw== X-IronPort-AV: E=McAfee;i="6800,10657,11610"; a="90450218" X-IronPort-AV: E=Sophos;i="6.19,298,1754982000"; d="scan'208";a="90450218" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2025 19:41:36 -0800 X-CSE-ConnectionGUID: n5VHYhqqSKGSXGTaO6BqqA== X-CSE-MsgGUID: azzac8KhR12BmwIYv7vthQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,298,1754982000"; d="scan'208";a="188752296" Received: from jraag-z790m-itx-wifi.iind.intel.com ([10.190.239.23]) by fmviesa007.fm.intel.com with ESMTP; 11 Nov 2025 19:41:33 -0800 From: Raag Jadav To: hansg@kernel.org, ilpo.jarvinen@linux.intel.com, andriy.shevchenko@linux.intel.com, linus.walleij@linaro.org, brgl@bgdev.pl Cc: platform-driver-x86@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Raag Jadav Subject: [PATCH v3 1/2] platform/x86/intel: Introduce Intel Elkhart Lake PSE I/O Date: Wed, 12 Nov 2025 09:10:10 +0530 Message-ID: <20251112034040.457801-2-raag.jadav@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251112034040.457801-1-raag.jadav@intel.com> References: <20251112034040.457801-1-raag.jadav@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Intel Elkhart Lake Programmable Service Engine (PSE) includes two PCI devices that expose two different capabilities of GPIO and Timed I/O as a single PCI function through shared MMIO with below layout. GPIO: 0x0000 - 0x1000 TIO: 0x1000 - 0x2000 This driver enumerates the PCI parent device and creates auxiliary child devices for these capabilities. The actual functionalities are provided by their respective auxiliary drivers. Signed-off-by: Raag Jadav Acked-by: Ilpo J=C3=A4rvinen --- MAINTAINERS | 7 ++ drivers/platform/x86/intel/Kconfig | 13 ++++ drivers/platform/x86/intel/Makefile | 1 + drivers/platform/x86/intel/ehl_pse_io.c | 86 +++++++++++++++++++++++++ include/linux/ehl_pse_io_aux.h | 24 +++++++ 5 files changed, 131 insertions(+) create mode 100644 drivers/platform/x86/intel/ehl_pse_io.c create mode 100644 include/linux/ehl_pse_io_aux.h diff --git a/MAINTAINERS b/MAINTAINERS index 46126ce2f968..bd2a009d73c6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12499,6 +12499,13 @@ F: drivers/gpu/drm/xe/ F: include/drm/intel/ F: include/uapi/drm/xe_drm.h =20 +INTEL ELKHART LAKE PSE I/O DRIVER +M: Raag Jadav +L: platform-driver-x86@vger.kernel.org +S: Supported +F: drivers/platform/x86/intel/ehl_pse_io.c +F: include/linux/ehl_pse_io_aux.h + INTEL ETHERNET DRIVERS M: Tony Nguyen M: Przemek Kitszel diff --git a/drivers/platform/x86/intel/Kconfig b/drivers/platform/x86/inte= l/Kconfig index 19a2246f2770..2900407d6095 100644 --- a/drivers/platform/x86/intel/Kconfig +++ b/drivers/platform/x86/intel/Kconfig @@ -41,6 +41,19 @@ config INTEL_VBTN To compile this driver as a module, choose M here: the module will be called intel_vbtn. =20 +config INTEL_EHL_PSE_IO + tristate "Intel Elkhart Lake PSE I/O driver" + depends on PCI + select AUXILIARY_BUS + help + Select this option to enable Intel Elkhart Lake PSE GPIO and Timed + I/O support. This driver enumerates the PCI parent device and + creates auxiliary child devices for these capabilities. The actual + functionalities are provided by their respective auxiliary drivers. + + To compile this driver as a module, choose M here: the module will + be called intel_ehl_pse_io. + config INTEL_INT0002_VGPIO tristate "Intel ACPI INT0002 Virtual GPIO driver" depends on GPIOLIB && ACPI && PM_SLEEP diff --git a/drivers/platform/x86/intel/Makefile b/drivers/platform/x86/int= el/Makefile index 78acb414e154..138b13756158 100644 --- a/drivers/platform/x86/intel/Makefile +++ b/drivers/platform/x86/intel/Makefile @@ -21,6 +21,7 @@ intel-target-$(CONFIG_INTEL_HID_EVENT) +=3D hid.o intel-target-$(CONFIG_INTEL_VBTN) +=3D vbtn.o =20 # Intel miscellaneous drivers +intel-target-$(CONFIG_INTEL_EHL_PSE_IO) +=3D ehl_pse_io.o intel-target-$(CONFIG_INTEL_INT0002_VGPIO) +=3D int0002_vgpio.o intel-target-$(CONFIG_INTEL_ISHTP_ECLITE) +=3D ishtp_eclite.o intel-target-$(CONFIG_INTEL_OAKTRAIL) +=3D oaktrail.o diff --git a/drivers/platform/x86/intel/ehl_pse_io.c b/drivers/platform/x86= /intel/ehl_pse_io.c new file mode 100644 index 000000000000..861e14808b35 --- /dev/null +++ b/drivers/platform/x86/intel/ehl_pse_io.c @@ -0,0 +1,86 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Intel Elkhart Lake Programmable Service Engine (PSE) I/O + * + * Copyright (c) 2025 Intel Corporation. + * + * Author: Raag Jadav + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define EHL_PSE_IO_DEV_SIZE SZ_4K + +static int ehl_pse_io_dev_create(struct pci_dev *pci, const char *name, in= t idx) +{ + struct device *dev =3D &pci->dev; + struct auxiliary_device *adev; + struct ehl_pse_io_data *data; + resource_size_t start, offset; + u32 id; + + data =3D devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + id =3D (pci_domain_nr(pci->bus) << 16) | pci_dev_id(pci); + start =3D pci_resource_start(pci, 0); + offset =3D EHL_PSE_IO_DEV_SIZE * idx; + + data->mem =3D DEFINE_RES_MEM(start + offset, EHL_PSE_IO_DEV_SIZE); + data->irq =3D pci_irq_vector(pci, idx); + + adev =3D __devm_auxiliary_device_create(dev, EHL_PSE_IO_NAME, name, data,= id); + + return adev ? 0 : -ENODEV; +} + +static int ehl_pse_io_probe(struct pci_dev *pci, const struct pci_device_i= d *id) +{ + int ret; + + ret =3D pcim_enable_device(pci); + if (ret) + return ret; + + pci_set_master(pci); + + ret =3D pci_alloc_irq_vectors(pci, 2, 2, PCI_IRQ_MSI); + if (ret < 0) + return ret; + + ret =3D ehl_pse_io_dev_create(pci, EHL_PSE_GPIO_NAME, 0); + if (ret) + return ret; + + return ehl_pse_io_dev_create(pci, EHL_PSE_TIO_NAME, 1); +} + +static const struct pci_device_id ehl_pse_io_ids[] =3D { + { PCI_VDEVICE(INTEL, 0x4b88) }, + { PCI_VDEVICE(INTEL, 0x4b89) }, + { } +}; +MODULE_DEVICE_TABLE(pci, ehl_pse_io_ids); + +static struct pci_driver ehl_pse_io_driver =3D { + .name =3D EHL_PSE_IO_NAME, + .id_table =3D ehl_pse_io_ids, + .probe =3D ehl_pse_io_probe, +}; +module_pci_driver(ehl_pse_io_driver); + +MODULE_AUTHOR("Raag Jadav "); +MODULE_DESCRIPTION("Intel Elkhart Lake PSE I/O driver"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/ehl_pse_io_aux.h b/include/linux/ehl_pse_io_aux.h new file mode 100644 index 000000000000..afb8587ee5fb --- /dev/null +++ b/include/linux/ehl_pse_io_aux.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Intel Elkhart Lake PSE I/O Auxiliary Device + * + * Copyright (c) 2025 Intel Corporation. + * + * Author: Raag Jadav + */ + +#ifndef _EHL_PSE_IO_AUX_H_ +#define _EHL_PSE_IO_AUX_H_ + +#include + +#define EHL_PSE_IO_NAME "ehl_pse_io" +#define EHL_PSE_GPIO_NAME "gpio" +#define EHL_PSE_TIO_NAME "pps_tio" + +struct ehl_pse_io_data { + struct resource mem; + int irq; +}; + +#endif /* _EHL_PSE_IO_AUX_H_ */ --=20 2.43.0 From nobody Sun Feb 8 07:44:40 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2C3122D29C2; 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a="90450223" X-IronPort-AV: E=Sophos;i="6.19,298,1754982000"; d="scan'208";a="90450223" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2025 19:41:39 -0800 X-CSE-ConnectionGUID: lfpfmXOETtawRYY8miIVmg== X-CSE-MsgGUID: puv8V+38RzqIHUbGz1pw+w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,298,1754982000"; d="scan'208";a="188752305" Received: from jraag-z790m-itx-wifi.iind.intel.com ([10.190.239.23]) by fmviesa007.fm.intel.com with ESMTP; 11 Nov 2025 19:41:36 -0800 From: Raag Jadav To: hansg@kernel.org, ilpo.jarvinen@linux.intel.com, andriy.shevchenko@linux.intel.com, linus.walleij@linaro.org, brgl@bgdev.pl Cc: platform-driver-x86@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Raag Jadav , Bartosz Golaszewski Subject: [PATCH v3 2/2] gpio: elkhartlake: Convert to auxiliary driver Date: Wed, 12 Nov 2025 09:10:11 +0530 Message-ID: <20251112034040.457801-3-raag.jadav@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251112034040.457801-1-raag.jadav@intel.com> References: <20251112034040.457801-1-raag.jadav@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Since PCI device should not be abusing platform device, MFD parent to platform child path is no longer being pursued for this driver. Convert it to auxiliary driver, which will be used by EHL PSE auxiliary device. Signed-off-by: Raag Jadav Acked-by: Bartosz Golaszewski Reviewed-by: Andy Shevchenko Reviewed-by: Ilpo J=C3=A4rvinen --- drivers/gpio/Kconfig | 2 +- drivers/gpio/gpio-elkhartlake.c | 36 +++++++++++++++++---------------- 2 files changed, 20 insertions(+), 18 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 7ee3afbc2b05..d4b4451b4696 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1413,7 +1413,7 @@ config HTC_EGPIO =20 config GPIO_ELKHARTLAKE tristate "Intel Elkhart Lake PSE GPIO support" - depends on X86 || COMPILE_TEST + depends on INTEL_EHL_PSE_IO select GPIO_TANGIER help Select this option to enable GPIO support for Intel Elkhart Lake diff --git a/drivers/gpio/gpio-elkhartlake.c b/drivers/gpio/gpio-elkhartlak= e.c index 95de52d2cc63..b96e7928b6e5 100644 --- a/drivers/gpio/gpio-elkhartlake.c +++ b/drivers/gpio/gpio-elkhartlake.c @@ -2,43 +2,46 @@ /* * Intel Elkhart Lake PSE GPIO driver * - * Copyright (c) 2023 Intel Corporation. + * Copyright (c) 2023, 2025 Intel Corporation. * * Authors: Pandith N * Raag Jadav */ =20 +#include #include #include #include -#include #include =20 +#include + #include "gpio-tangier.h" =20 /* Each Intel EHL PSE GPIO Controller has 30 GPIO pins */ #define EHL_PSE_NGPIO 30 =20 -static int ehl_gpio_probe(struct platform_device *pdev) +static int ehl_gpio_probe(struct auxiliary_device *adev, const struct auxi= liary_device_id *id) { - struct device *dev =3D &pdev->dev; + struct device *dev =3D &adev->dev; + struct ehl_pse_io_data *data; struct tng_gpio *priv; - int irq, ret; + int ret; =20 - irq =3D platform_get_irq(pdev, 0); - if (irq < 0) - return irq; + data =3D dev_get_platdata(dev); + if (!data) + return -ENODATA; =20 priv =3D devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) return -ENOMEM; =20 - priv->reg_base =3D devm_platform_ioremap_resource(pdev, 0); + priv->reg_base =3D devm_ioremap_resource(dev, &data->mem); if (IS_ERR(priv->reg_base)) return PTR_ERR(priv->reg_base); =20 priv->dev =3D dev; - priv->irq =3D irq; + priv->irq =3D data->irq; =20 priv->info.base =3D -1; priv->info.ngpio =3D EHL_PSE_NGPIO; @@ -51,25 +54,24 @@ static int ehl_gpio_probe(struct platform_device *pdev) if (ret) return dev_err_probe(dev, ret, "tng_gpio_probe error\n"); =20 - platform_set_drvdata(pdev, priv); + auxiliary_set_drvdata(adev, priv); return 0; } =20 -static const struct platform_device_id ehl_gpio_ids[] =3D { - { "gpio-elkhartlake" }, +static const struct auxiliary_device_id ehl_gpio_ids[] =3D { + { EHL_PSE_IO_NAME "." EHL_PSE_GPIO_NAME }, { } }; -MODULE_DEVICE_TABLE(platform, ehl_gpio_ids); +MODULE_DEVICE_TABLE(auxiliary, ehl_gpio_ids); =20 -static struct platform_driver ehl_gpio_driver =3D { +static struct auxiliary_driver ehl_gpio_driver =3D { .driver =3D { - .name =3D "gpio-elkhartlake", .pm =3D pm_sleep_ptr(&tng_gpio_pm_ops), }, .probe =3D ehl_gpio_probe, .id_table =3D ehl_gpio_ids, }; -module_platform_driver(ehl_gpio_driver); +module_auxiliary_driver(ehl_gpio_driver); =20 MODULE_AUTHOR("Pandith N "); MODULE_AUTHOR("Raag Jadav "); --=20 2.43.0