From nobody Fri Dec 19 10:56:10 2025 Received: from mail-wr1-f48.google.com (mail-wr1-f48.google.com [209.85.221.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C19ED28152D for ; Tue, 11 Nov 2025 09:27:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762853235; cv=none; b=S+KZQr9pSmMuXNR0nOUGBUIS2lbys1YHTjq1pmPKmyCVHmdpvs6gb91XKWpH1U0CR/rO1YkpmH6RSCyAkiixSPmdE98mzfiz1K81Bq3SCRcGQ/dmuG/fbYePIfbb26EqYN5GJBk9npOhDY57a3yQefbId58HWFHUHouJCHd6VQ0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762853235; c=relaxed/simple; bh=pCONCT1Mz2rcdeKnyJtzVqBxrE/ew++NH2w5XjdtUno=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=tExfwyEVGZvGX0ADXjcWay2gxdYmUWtKEaMMvD2set01NT9RKHM0kakmWMi2wZ/c+3ZmLogb8s6xonDQP5Rm3O4YfyAwJay3XbO8YsWgwWZ+UDpsogMZPEh+lpcUg6hVhYfb0VNC4b6AakzLORxVASkM5VBv4bVHoL0Hr9vA398= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=GOMq3Pnz; arc=none smtp.client-ip=209.85.221.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="GOMq3Pnz" Received: by mail-wr1-f48.google.com with SMTP id ffacd0b85a97d-42b2dc17965so2319599f8f.3 for ; Tue, 11 Nov 2025 01:27:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1762853231; x=1763458031; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=TTGHw2wYhtc4Y/i+QYoRz81XM72wiR9wQ453plCnIys=; b=GOMq3PnzBCLgrVUfjom3DUcYm9Dk+kwbySFMU6EwAZfsjLPk4b8760RlBmwi326tdm 7JQ3im3M0k7GtEQZe6zHsl15P+bfatwBFGnPWwmYDDRaOtK1RSyPk/ix1Qnqa8q5uaZO lfr6IOk8be60KGE6IIQ19o7PdQauN+YeCIlEnTu3ZPitGAToxvE4l62RVaoyyuzT75Vo o0wi8UJx3/aepg/YMB3ejbaMiM009k1soWOIia0F6HJhAZz2ZxQtzmOqhDB9wNxHz3lA G/2zEOevqyKQ8F7NoAM50TxkAClKkaxWeqab6boNf2Wnl7hXEVQDcwn7w9TyEUhGLYql dUaw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1762853231; x=1763458031; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=TTGHw2wYhtc4Y/i+QYoRz81XM72wiR9wQ453plCnIys=; b=ZwBt4K+HMnDjXRrbgyzP5LErsTJNlKz4RDGeNQhZtfiTBfSQYZrI4OkqkZtvX8jwoq jshZjU9rrmsgo76OzDNHAaOslqlKqxwEZjNH460wmpf9abqNRYhbpn6bKMzzNGkjuPfz qcbpWX1h1CEHboDGYDtjMnwXr1/peTJ5j06n7o+PKBVmx5FrUo5ubKex9K/bsuEJPAuP unGmmL0VLcRBngFMQul3cLA+AsHmWwGlYES/m/YojBB7jNXjSvIO+z743VpLfLlJenKu B/T6J72H6tpeVWdLQKgc8N5xaDQ9AfSaoI60WlsLDA1GW2ZNhqEcQbJ8pLN/BrjcsvZQ c3rA== X-Forwarded-Encrypted: i=1; AJvYcCXcb+6+V2mfCCZOYHKmzsa3ynSm/6aNi7/y37GoTymoXGT3H6ta/8p74qhw3/aII9ah+QUgC6rKdL1PdGQ=@vger.kernel.org X-Gm-Message-State: AOJu0Yx/+UXn6ixYSD6oeOUdK79hluTuuBEDU91XZghMVsqpTBL007EN UqthWMFYSBruWsqUv28dCX4qHenu8iHwuyMBLU9KMdr2iM2pNwRXFpkB X-Gm-Gg: ASbGnctE6aI7yiF6Z6DXX5R7UP895f9JNLFsQQgz4B+wUWhLNJL2AZ6Q6JZ0RC86+Au fpL+qPMkNEr/ch0nMmPX2azVJgTEWYg4J0TYWtSlXdt0+LlthE5ofF3zW+ARSWS43Nl6BWCTr5U iDFXcpEXI28VbHQEn28T3c1Rboz1cJ+/wZwJvn0QW9PMRuU18DVMnVBBXHqPkxbcHyli92siLE/ DlIZI/9ePrd3MO+nhMW2vMVhMC9NSK2UfkzlqRi5icfM0gMq0Pqa6hdzLZtKK1Z2c2VeeWBP3M7 ANp1MFVtmQFxMeoMZyijrgIkrXnJzSWggxbtEp1100fnNwkzoUWksU4Tg2as5puYUeUYGi8TP/s rs+Uc+p/Gf/JHKA+fnFq8jNkx0cSq63jAJLHfmGZkDmaV23K4xPfDyLhCdJtmGimkuPfLQW3Mo3 OuNWI= X-Google-Smtp-Source: AGHT+IGBifXqy242Ns3xjfBr9K2JFF4pKkxyiE/nclOky8SySYLr6IREuvFpJkHchyln+byC5Z2qSQ== X-Received: by 2002:a05:6000:2a8a:b0:42b:3825:2ac8 with SMTP id ffacd0b85a97d-42b382530a0mr5530778f8f.59.1762853230774; Tue, 11 Nov 2025 01:27:10 -0800 (PST) Received: from builder.. ([2001:9e8:f12a:4216:be24:11ff:fe30:5d85]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-42ac67921c3sm27464641f8f.40.2025.11.11.01.27.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Nov 2025 01:27:10 -0800 (PST) From: Jonas Jelonek To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Peter Rosin , Geert Uytterhoeven Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Thomas Richard , Jonas Jelonek , Conor Dooley Subject: [PATCH v6 1/2] dt-bindings: gpio: add gpio-line-mux controller Date: Tue, 11 Nov 2025 09:27:03 +0000 Message-ID: <20251111092705.196465-2-jelonek.jonas@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20251111092705.196465-1-jelonek.jonas@gmail.com> References: <20251111092705.196465-1-jelonek.jonas@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add dt-schema for a gpio-line-mux controller which exposes virtual GPIOs for a shared GPIO controlled by a multiplexer, e.g. a gpio-mux. The gpio-line-mux controller is a gpio-controller, thus has mostly the same semantics. However, it requires a mux-control to be specified upon which it will operate. Signed-off-by: Jonas Jelonek Reviewed-by: Conor Dooley Reviewed-by: Linus Walleij --- .../bindings/gpio/gpio-line-mux.yaml | 109 ++++++++++++++++++ 1 file changed, 109 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/gpio-line-mux.ya= ml diff --git a/Documentation/devicetree/bindings/gpio/gpio-line-mux.yaml b/Do= cumentation/devicetree/bindings/gpio/gpio-line-mux.yaml new file mode 100644 index 000000000000..0228e9915b92 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-line-mux.yaml @@ -0,0 +1,109 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/gpio-line-mux.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: GPIO line mux + +maintainers: + - Jonas Jelonek + +description: | + A GPIO controller to provide virtual GPIOs for a 1-to-many input-only ma= pping + backed by a single shared GPIO and a multiplexer. A simple illustrated + example is + + +----- A + IN / + <-----o------- B + / |\ + | | +----- C + | | \ + | | +--- D + | | + M1 M0 + + MUX CONTROL + + M1 M0 IN + 0 0 A + 0 1 B + 1 0 C + 1 1 D + + This can be used in case a real GPIO is connected to multiple inputs and + controlled by a multiplexer, and another subsystem/driver does not work + directly with the multiplexer subsystem. + +properties: + compatible: + const: gpio-line-mux + + gpio-controller: true + + "#gpio-cells": + const: 2 + + gpio-line-mux-states: + description: Mux states corresponding to the virtual GPIOs. + $ref: /schemas/types.yaml#/definitions/uint32-array + + gpio-line-names: true + + mux-controls: + $ref: /schemas/types.yaml#/definitions/phandle-array + maxItems: 1 + description: + Phandle to the multiplexer to control access to the GPIOs. + + ngpios: false + + muxed-gpios: + maxItems: 1 + description: + GPIO which is the '1' in 1-to-many and is shared by the virtual GPIOs + and controlled via the mux. + +required: + - compatible + - gpio-controller + - gpio-line-mux-states + - mux-controls + - muxed-gpios + +additionalProperties: false + +examples: + - | + #include + #include + + sfp_gpio_mux: mux-controller-1 { + compatible =3D "gpio-mux"; + mux-gpios =3D <&gpio0 0 GPIO_ACTIVE_HIGH>, + <&gpio0 1 GPIO_ACTIVE_HIGH>; + #mux-control-cells =3D <0>; + idle-state =3D ; + }; + + sfp1_gpio: sfp-gpio-1 { + compatible =3D "gpio-line-mux"; + gpio-controller; + #gpio-cells =3D <2>; + + mux-controls =3D <&sfp_gpio_mux>; + muxed-gpios =3D <&gpio0 2 GPIO_ACTIVE_HIGH>; + + gpio-line-names =3D "SFP1_LOS", "SFP1_MOD_ABS", "SFP1_TX_FAULT"; + gpio-line-mux-states =3D <0>, <1>, <3>; + }; + + sfp1: sfp-p1 { + compatible =3D "sff,sfp"; + + i2c-bus =3D <&sfp1_i2c>; + los-gpios =3D <&sfp1_gpio 0 GPIO_ACTIVE_HIGH>; + mod-def0-gpios =3D <&sfp1_gpio 1 GPIO_ACTIVE_LOW>; + tx-fault-gpios =3D <&sfp1_gpio 2 GPIO_ACTIVE_HIGH>; + }; --=20 2.48.1 From nobody Fri Dec 19 10:56:10 2025 Received: from mail-wr1-f45.google.com (mail-wr1-f45.google.com [209.85.221.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7FF81228CA9 for ; Tue, 11 Nov 2025 09:27:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762853235; cv=none; b=SnY7KOMdV20uMPzYlTS70Te3bDWYIBWo/YUV0uMFtElujqA1tNHpE7Hj2flppWQaDFMptcGMKn6+S56IgGMti/qfHpqM2XFRPEgAawNR5gLhUMoh/yY3kK99dpGgwur5Crx+KTEtTiWFT3PcPXT56PVO2wrxQ/O3T53OSePY7Jc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762853235; c=relaxed/simple; bh=+CVBWtoEqiNso8fK0OPIIuivfGYQiY/ibNKVSUF5xCU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=rX2RAtmiOPA8xtZd+hAwQd99TFykQNFCikckCsYOnquLIKoUEBx4TpHJAo9R0y9zJiIysskT47RbN5Wz4yJBz1aaO8F7OuznkGGHZlkZgT68mXCVs2RxLNjyyX38OEJ1ZV2DTalKzX7Tk8Pt/Fi0QwzQnhArnAO7tnRidJ6XqsE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=XQTtuPFH; arc=none smtp.client-ip=209.85.221.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="XQTtuPFH" Received: by mail-wr1-f45.google.com with SMTP id ffacd0b85a97d-42b3b0d76fcso1134339f8f.3 for ; Tue, 11 Nov 2025 01:27:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1762853232; x=1763458032; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=UeKzbt40uI8Z6nTzEM4JNROnGsdZUz7mRBsaMfIaT7M=; b=XQTtuPFHcf5HZLJYqOvQ4M8VRNHt8kUsZmrMjFr1ltqFJ6QYm0fhjEfFyGLQBTNMTP 8H1qOAX4m9R1OgTxp7ZvLb4NKp5PhN9NQoalGaa4X6gtRIokONND9xmtCwbyyvy+mNVM pzInDigyawMRTHKvqHhA5G0yfdARLFSD76QSJKYooEESNRVW2Fqg4OliN+e9a4agyCSx 1l68YMesxw8GCktecGtc/OtT+DIagKFdaPJmIAY3P1k1pwxmnHxSf2koQgcm0GvFXCs3 icQikUC8OMc0ZZ28OwsoinWRnxmJaoWztSVUNDVDe5HKbzGSJGP60wtP2kvAgtOTXr5H lXFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1762853232; x=1763458032; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=UeKzbt40uI8Z6nTzEM4JNROnGsdZUz7mRBsaMfIaT7M=; b=GOogS+tfDM5jwA3qt+pxR0bSQo+AhWI9qJA/KwMV46wkZj8+eIhLodssHws3pk0GJA WwueuOfM5XZRYy3Xo7Oy8O/ZQ8mMDy28S2D/c7IGuNKufSDZPDyXobwtoalYBUnE8yWe rZPU9eLb7uizIEE9sjouVRc9Vn6syxm2w/xvRQU4SaN5Gz+NleBA9XinV9fuzmyW1Lyz 1tdj70ojW2mnHOVgNV6fK6Z6aoMSyt05bDd3Tll2WJ5lD0eekmdVCNxOo4zwHcFBJpec YssJ+DVnyKpyIMuywIVLv9PXYvNn8QpLXxGf8mmDs7vFLK1wmI6qm+m/fTS0uHlS0EiX MKOw== X-Forwarded-Encrypted: i=1; AJvYcCXcjX0j2cICJBcgZNoNohZZBYISJ01fn2pJfSatuxBfRFBAN3GlkMl10aih9LGuacrXoR/QedOTw/EQDes=@vger.kernel.org X-Gm-Message-State: AOJu0YwjALW8eObN9MWWyaZPxtdVhq53STrYmgxJCwUbF2pZK9vhKmBb psSI3j7Wih5Swc7rtTBZ82pxu5dJsQnx0mElnFOIcUXj73ZujxjH+rwA X-Gm-Gg: ASbGncuwaNQquILkIoSqRz6bC7p4PTNNVmm11MIIcUDvh3Aa7ZHXcAAcxXWEu2ryosV jIjuhG7Zih37quKIbl30a4HDVIleLuEgBm1Ex6neHSvjMsZFx1uGUJyCObZPQzdeB6+mRPOUeSR caJ4skKOhRaBTAXh9CeyGS5HThMsCNCgFf0QpRgs+YmLCbOt5KHF3h5/RXt2zsKi17d6qckKIDk 7DrnsiKlKihIcdw0XtDylKzlkyeA41EpNIeZxmwtuqeX5WYKcawGBG1pHJewhyOwuS+kxMekpP8 c7W/QG+YEtxx81OE7TiRyFmpeWL7IXdAk5Bte/6ZBwgAhQynVxcC+o2QL88KdD8kmLNv83sIFXw k6dUOW2EZD9gpdObP+vNCfEoxS5a7b2qRClQTeautJCngU17Mw/E6KYHMhgiNvwjKonaGcVTY4O paEDxngQQBFVKtce8N6rhsgq8c X-Google-Smtp-Source: AGHT+IE9bVtPss6xMDYZ8Z9svDX3dsWvptBxWqqb99TTrnQYZhfM/ZD1vt3P+FWQVe7WddFS7DwtxA== X-Received: by 2002:a05:6000:3104:b0:429:ef82:585b with SMTP id ffacd0b85a97d-42b2dc16b17mr8823445f8f.9.1762853231629; Tue, 11 Nov 2025 01:27:11 -0800 (PST) Received: from builder.. ([2001:9e8:f12a:4216:be24:11ff:fe30:5d85]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-42ac67921c3sm27464641f8f.40.2025.11.11.01.27.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Nov 2025 01:27:11 -0800 (PST) From: Jonas Jelonek To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Peter Rosin , Geert Uytterhoeven Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Thomas Richard , Jonas Jelonek Subject: [PATCH v6 2/2] gpio: add gpio-line-mux driver Date: Tue, 11 Nov 2025 09:27:04 +0000 Message-ID: <20251111092705.196465-3-jelonek.jonas@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20251111092705.196465-1-jelonek.jonas@gmail.com> References: <20251111092705.196465-1-jelonek.jonas@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a new driver which provides a 1-to-many mapping for a single real GPIO using a multiplexer. Each virtual GPIO corresponds to a multiplexer state which, if set for the multiplexer, connects the real GPIO to the corresponding virtual GPIO. This can help in various usecases. One practical case is the special hardware design of the Realtek-based XS1930-10 switch from Zyxel. It features two SFP+ ports/cages whose signals are wired directly to the switch SoC. Although Realtek SoCs are short on GPIOs, there are usually enough the fit the SFP signals without any hacks. However, Zyxel did some weird design and connected RX_LOS, MOD_ABS and TX_FAULT of one SFP cage onto a single GPIO line controlled by a multiplexer (the same for the other SFP cage). The single multiplexer controls the lines for both SFP and depending on the state, the designated 'signal GPIO lines' are connected to one of the three SFP signals. Because the SFP core/driver doesn't support multiplexer but needs single GPIOs for each of the signals, this driver fills the gap between both. It registers a gpio_chip, provides multiple virtual GPIOs and sets the backing multiplexer accordingly. Due to several practical issues, this is input-only and doesn't support IRQs. Signed-off-by: Jonas Jelonek Reviewed-by: Thomas Richard Reviewed-by: Linus Walleij --- MAINTAINERS | 6 ++ drivers/gpio/Kconfig | 9 +++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-line-mux.c | 126 +++++++++++++++++++++++++++++++++++ 4 files changed, 142 insertions(+) create mode 100644 drivers/gpio/gpio-line-mux.c diff --git a/MAINTAINERS b/MAINTAINERS index 3da2c26a796b..66f8706d9b4b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -10653,6 +10653,12 @@ S: Maintained F: Documentation/devicetree/bindings/leds/irled/gpio-ir-tx.yaml F: drivers/media/rc/gpio-ir-tx.c =20 +GPIO LINE MUX +M: Jonas Jelonek +S: Maintained +F: Documentation/devicetree/bindings/gpio/gpio-line-mux.yaml +F: drivers/gpio/gpio-line-mux.c + GPIO MOCKUP DRIVER M: Bamvor Jian Zhang L: linux-gpio@vger.kernel.org diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index ce237398fa00..5f8082ae99cc 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1986,6 +1986,15 @@ config GPIO_LATCH Say yes here to enable a driver for GPIO multiplexers based on latches connected to other GPIOs. =20 +config GPIO_LINE_MUX + tristate "GPIO line mux driver" + depends on OF_GPIO + select MULTIPLEXER + help + Say Y here to support the GPIO line mux, which can provide virtual + GPIOs backed by a shared real GPIO and a multiplexer in a 1-to-many + fashion. + config GPIO_MOCKUP tristate "GPIO Testing Driver (DEPRECATED)" select IRQ_SIM diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index ee260a0809d3..6caee52b0356 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -89,6 +89,7 @@ obj-$(CONFIG_GPIO_IXP4XX) +=3D gpio-ixp4xx.o obj-$(CONFIG_GPIO_JANZ_TTL) +=3D gpio-janz-ttl.o obj-$(CONFIG_GPIO_KEMPLD) +=3D gpio-kempld.o obj-$(CONFIG_GPIO_LATCH) +=3D gpio-latch.o +obj-$(CONFIG_GPIO_LINE_MUX) +=3D gpio-line-mux.o obj-$(CONFIG_GPIO_LJCA) +=3D gpio-ljca.o obj-$(CONFIG_GPIO_LOGICVC) +=3D gpio-logicvc.o obj-$(CONFIG_GPIO_LOONGSON1) +=3D gpio-loongson1.o diff --git a/drivers/gpio/gpio-line-mux.c b/drivers/gpio/gpio-line-mux.c new file mode 100644 index 000000000000..a4f384306218 --- /dev/null +++ b/drivers/gpio/gpio-line-mux.c @@ -0,0 +1,126 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * GPIO line mux which acts as virtual gpiochip and provides a 1-to-many + * mapping between virtual GPIOs and a real GPIO + multiplexer. + * + * Copyright (c) 2025 Jonas Jelonek + */ + +#include +#include +#include +#include +#include +#include + +#define MUX_SELECT_DELAY_US 100 + +struct gpio_lmux { + struct gpio_chip gc; + struct mux_control *mux; + struct gpio_desc *muxed_gpio; + + u32 num_gpio_mux_states; + unsigned int gpio_mux_states[] __counted_by(num_gpio_mux_states); +}; + +static int gpio_lmux_gpio_get(struct gpio_chip *gc, unsigned int offset) +{ + struct gpio_lmux *glm =3D gpiochip_get_data(gc); + int ret; + + if (offset > gc->ngpio) + return -EINVAL; + + ret =3D mux_control_select_delay(glm->mux, glm->gpio_mux_states[offset], + MUX_SELECT_DELAY_US); + if (ret < 0) + return ret; + + ret =3D gpiod_get_raw_value_cansleep(glm->muxed_gpio); + mux_control_deselect(glm->mux); + return ret; +} + +static int gpio_lmux_gpio_set(struct gpio_chip *gc, unsigned int offset, + int value) +{ + return -EOPNOTSUPP; +} + +static int gpio_lmux_gpio_get_direction(struct gpio_chip *gc, + unsigned int offset) +{ + return GPIO_LINE_DIRECTION_IN; +} + +static int gpio_lmux_probe(struct platform_device *pdev) +{ + struct device *dev =3D &pdev->dev; + struct gpio_lmux *glm; + unsigned int ngpio; + size_t size; + int ret; + + ngpio =3D device_property_count_u32(dev, "gpio-line-mux-states"); + if (!ngpio) + return -EINVAL; + + size =3D struct_size(glm, gpio_mux_states, ngpio); + glm =3D devm_kzalloc(dev, size, GFP_KERNEL); + if (!glm) + return -ENOMEM; + + glm->gc.base =3D -1; + glm->gc.can_sleep =3D true; + glm->gc.fwnode =3D dev_fwnode(dev); + glm->gc.label =3D dev_name(dev); + glm->gc.ngpio =3D ngpio; + glm->gc.owner =3D THIS_MODULE; + glm->gc.parent =3D dev; + + glm->gc.get =3D gpio_lmux_gpio_get; + glm->gc.set =3D gpio_lmux_gpio_set; + glm->gc.get_direction =3D gpio_lmux_gpio_get_direction; + + glm->mux =3D devm_mux_control_get(dev, NULL); + if (IS_ERR(glm->mux)) + return dev_err_probe(dev, PTR_ERR(glm->mux), + "could not get mux controller\n"); + + glm->muxed_gpio =3D devm_gpiod_get(dev, "muxed", GPIOD_IN); + if (IS_ERR(glm->muxed_gpio)) + return dev_err_probe(dev, PTR_ERR(glm->muxed_gpio), + "could not get muxed-gpio\n"); + + glm->num_gpio_mux_states =3D ngpio; + ret =3D device_property_read_u32_array(dev, "gpio-line-mux-states", + &glm->gpio_mux_states[0], ngpio); + if (ret) + return dev_err_probe(dev, ret, "could not get mux states\n"); + + ret =3D devm_gpiochip_add_data(dev, &glm->gc, glm); + if (ret) + return dev_err_probe(dev, ret, "failed to add gpiochip\n"); + + return 0; +} + +static const struct of_device_id gpio_lmux_of_match[] =3D { + { .compatible =3D "gpio-line-mux" }, + { } +}; +MODULE_DEVICE_TABLE(of, gpio_lmux_of_match); + +static struct platform_driver gpio_lmux_driver =3D { + .driver =3D { + .name =3D "gpio-line-mux", + .of_match_table =3D gpio_lmux_of_match, + }, + .probe =3D gpio_lmux_probe, +}; +module_platform_driver(gpio_lmux_driver); + +MODULE_AUTHOR("Jonas Jelonek "); +MODULE_DESCRIPTION("GPIO line mux driver"); +MODULE_LICENSE("GPL"); --=20 2.48.1