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client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Received: from satlexmb08.amd.com (165.204.84.17) by CO1PEPF000044F5.mail.protection.outlook.com (10.167.241.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9320.13 via Frontend Transport; Tue, 11 Nov 2025 01:16:28 +0000 Received: from satlexmb10.amd.com (10.181.42.219) by satlexmb08.amd.com (10.181.42.217) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Mon, 10 Nov 2025 17:16:02 -0800 Received: from satlexmb08.amd.com (10.181.42.217) by satlexmb10.amd.com (10.181.42.219) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Mon, 10 Nov 2025 17:16:02 -0800 Received: from xsjdavidzha51.xilinx.com (10.180.168.240) by satlexmb08.amd.com (10.181.42.217) with Microsoft SMTP Server id 15.2.2562.17 via Frontend Transport; Mon, 10 Nov 2025 17:16:01 -0800 From: David Zhang To: , , , CC: David Zhang , , , , , Nishad Saraf Subject: [PATCH V1 4/5] accel/amd_vpci: Add Remote Management (RM) queue service APIs Date: Mon, 10 Nov 2025 17:15:49 -0800 Message-ID: <20251111011550.439157-5-yidong.zhang@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251111011550.439157-1-yidong.zhang@amd.com> References: <20251111011550.439157-1-yidong.zhang@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044F5:EE_|IA1PR12MB6042:EE_ X-MS-Office365-Filtering-Correlation-Id: f30db8da-451b-4c6c-bf93-08de20bff0d4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|376014|36860700013; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Nov 2025 01:16:28.3163 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f30db8da-451b-4c6c-bf93-08de20bff0d4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F5.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6042 Content-Type: text/plain; charset="utf-8" This patch introduces a set of APIs for allowing the PCIe driver submit commands, transfer binary payloads and retrieve firmware metadata. Key features: - RM queue command APIs: - create and destroy RM queue commands - Initialized command data payloads - Send and poll for command completion - Service-level operations: - Retrieve firmware ID - Program accelerator and APU firmware images - Periodic health monitoring Co-developed-by: Nishad Saraf Signed-off-by: Nishad Saraf Signed-off-by: David Zhang --- drivers/accel/amd_vpci/Makefile | 3 +- drivers/accel/amd_vpci/versal-pci-main.c | 43 +- drivers/accel/amd_vpci/versal-pci-rm-queue.c | 14 +- .../accel/amd_vpci/versal-pci-rm-service.c | 497 ++++++++++++++++++ .../accel/amd_vpci/versal-pci-rm-service.h | 20 + drivers/accel/amd_vpci/versal-pci.h | 1 + 6 files changed, 567 insertions(+), 11 deletions(-) create mode 100644 drivers/accel/amd_vpci/versal-pci-rm-service.c diff --git a/drivers/accel/amd_vpci/Makefile b/drivers/accel/amd_vpci/Makef= ile index 9e4e56ac2dee..bacd305783dd 100644 --- a/drivers/accel/amd_vpci/Makefile +++ b/drivers/accel/amd_vpci/Makefile @@ -4,4 +4,5 @@ obj-$(CONFIG_DRM_ACCEL_AMD_VPCI) :=3D versal-pci.o =20 versal-pci-y :=3D \ versal-pci-main.o \ - versal-pci-rm-queue.o + versal-pci-rm-queue.o \ + versal-pci-rm-service.o diff --git a/drivers/accel/amd_vpci/versal-pci-main.c b/drivers/accel/amd_v= pci/versal-pci-main.c index 4172f7ac9bd1..426651739a19 100644 --- a/drivers/accel/amd_vpci/versal-pci-main.c +++ b/drivers/accel/amd_vpci/versal-pci-main.c @@ -8,6 +8,8 @@ #include =20 #include "versal-pci.h" +#include "versal-pci-rm-service.h" +#include "versal-pci-rm-queue.h" =20 #define DRV_NAME "amd-versal-pci" =20 @@ -21,6 +23,29 @@ static inline u32 versal_pci_devid(struct versal_pci_dev= ice *vdev) PCI_DEVID(vdev->pdev->bus->number, vdev->pdev->devfn)); } =20 +static int versal_pci_upload_fw(struct versal_pci_device *vdev, + enum rm_queue_opcode opcode, + const char *data, + size_t size) +{ + struct rm_cmd *cmd; + int ret; + + ret =3D rm_queue_create_cmd(vdev->rdev, opcode, &cmd); + if (ret) + return ret; + + ret =3D rm_queue_data_init(cmd, data, size); + if (ret) + goto done; + + ret =3D rm_queue_send_cmd(cmd, RM_CMD_WAIT_DOWNLOAD_TIMEOUT); + +done: + rm_queue_destroy_cmd(cmd); + return ret; +} + static int versal_pci_load_shell(struct versal_pci_device *vdev, char *fw_= name) { const struct firmware *fw; @@ -57,7 +82,8 @@ static int versal_pci_load_shell(struct versal_pci_device= *vdev, char *fw_name) goto release_firmware; } =20 - /* TODO upload fw to card */ + ret =3D versal_pci_upload_fw(vdev, RM_QUEUE_OP_LOAD_FW, + (char *)xsabin, xsabin->header.length); if (ret) { vdev_err(vdev, "failed to load xsabin %s : %d", fw_name, ret); goto release_firmware; @@ -159,6 +185,7 @@ static void versal_pci_device_teardown(struct versal_pc= i_device *vdev) { versal_pci_cfs_fini(&vdev->cfs_subsys); versal_pci_fw_fini(vdev); + versal_pci_rm_fini(vdev->rdev); } =20 static int versal_pci_uuid_parse(struct versal_pci_device *vdev, uuid_t *u= uid) @@ -187,7 +214,11 @@ static int versal_pci_fw_init(struct versal_pci_device= *vdev) { int ret; =20 - /* TODO request compatible fw_id from card */ + ret =3D rm_queue_get_fw_id(vdev->rdev); + if (ret) { + vdev_warn(vdev, "Failed to get fw_id"); + return -EINVAL; + } =20 ret =3D versal_pci_uuid_parse(vdev, &vdev->intf_uuid); =20 @@ -198,6 +229,13 @@ static int versal_pci_device_setup(struct versal_pci_d= evice *vdev) { int ret; =20 + vdev->rdev =3D versal_pci_rm_init(vdev); + if (IS_ERR(vdev->rdev)) { + ret =3D PTR_ERR(vdev->rdev); + vdev_err(vdev, "Failed to init remote queue, err %d", ret); + return ret; + } + ret =3D versal_pci_fw_init(vdev); if (ret) { vdev_err(vdev, "Failed to init fw, err %d", ret); @@ -213,6 +251,7 @@ static int versal_pci_device_setup(struct versal_pci_de= vice *vdev) return 0; =20 comm_chan_fini: + versal_pci_rm_fini(vdev->rdev); =20 return ret; } diff --git a/drivers/accel/amd_vpci/versal-pci-rm-queue.c b/drivers/accel/a= md_vpci/versal-pci-rm-queue.c index e67c506af752..623ec4472f17 100644 --- a/drivers/accel/amd_vpci/versal-pci-rm-queue.c +++ b/drivers/accel/amd_vpci/versal-pci-rm-queue.c @@ -23,37 +23,35 @@ static inline struct rm_device *to_rdev_msg_timer(struc= t timer_list *t) =20 static inline u32 rm_io_read(struct rm_device *rdev, u32 offset) { - /* TODO */ - return 0; + return rm_reg_read(rdev, RM_PCI_IO_BAR_OFF + offset); } =20 static inline int rm_io_write(struct rm_device *rdev, u32 offset, u32 valu= e) { - /* TODO */ + rm_reg_write(rdev, RM_PCI_IO_BAR_OFF + offset, value); return 0; } =20 static inline u32 rm_queue_read(struct rm_device *rdev, u32 offset) { - /* TODO */ - return 0; + return rm_reg_read(rdev, RM_PCI_SHMEM_BAR_OFF + rdev->queue_base + offset= ); } =20 static inline void rm_queue_write(struct rm_device *rdev, u32 offset, u32 = value) { - /* TODO */ + rm_reg_write(rdev, RM_PCI_SHMEM_BAR_OFF + rdev->queue_base + offset, valu= e); } =20 static inline void rm_queue_bulk_read(struct rm_device *rdev, u32 offset, u32 *value, u32 size) { - /* TODO */ + rm_bulk_reg_read(rdev, RM_PCI_SHMEM_BAR_OFF + rdev->queue_base + offset, = value, size); } =20 static inline void rm_queue_bulk_write(struct rm_device *rdev, u32 offset, u32 *value, u32 size) { - /* TODO */ + rm_bulk_reg_write(rdev, RM_PCI_SHMEM_BAR_OFF + rdev->queue_base + offset,= value, size); } =20 static inline u32 rm_queue_get_cidx(struct rm_device *rdev, enum rm_queue_= type type) diff --git a/drivers/accel/amd_vpci/versal-pci-rm-service.c b/drivers/accel= /amd_vpci/versal-pci-rm-service.c new file mode 100644 index 000000000000..e01f5c9e6562 --- /dev/null +++ b/drivers/accel/amd_vpci/versal-pci-rm-service.c @@ -0,0 +1,497 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Driver for Versal PCIe device + * + * Copyright (C) 2025 Advanced Micro Devices, Inc. All rights reserved. + */ + +#include +#include +#include + +#include "versal-pci.h" +#include "versal-pci-rm-service.h" +#include "versal-pci-rm-queue.h" + +static DEFINE_IDA(rm_cmd_ids); + +static void rm_uninstall_health_monitor(struct rm_device *rdev); + +static inline struct rm_device *to_rdev_health_monitor(struct work_struct = *w) +{ + return container_of(w, struct rm_device, health_monitor); +} + +static inline struct rm_device *to_rdev_health_timer(struct timer_list *t) +{ + return container_of(t, struct rm_device, health_timer); +} + +u32 rm_reg_read(struct rm_device *rdev, u32 offset) +{ + return readl(rdev->vdev->io_regs + offset); +} + +void rm_reg_write(struct rm_device *rdev, u32 offset, const u32 value) +{ + writel(value, rdev->vdev->io_regs + offset); +} + +void rm_bulk_reg_read(struct rm_device *rdev, u32 offset, u32 *value, size= _t size) +{ + void __iomem *src =3D rdev->vdev->io_regs + offset; + void *dst =3D (void *)value; + + memcpy_fromio(dst, src, size); + /* Barrier after reading data from device */ + rmb(); +} + +void rm_bulk_reg_write(struct rm_device *rdev, u32 offset, const void *val= ue, size_t size) +{ + void __iomem *dst =3D rdev->vdev->io_regs + offset; + + memcpy_toio(dst, value, size); + /* Barrier after writing data to device */ + wmb(); +} + +static inline u32 rm_shmem_read(struct rm_device *rdev, u32 offset) +{ + return rm_reg_read(rdev, RM_PCI_SHMEM_BAR_OFF + offset); +} + +static inline void rm_shmem_bulk_read(struct rm_device *rdev, u32 offset, + u32 *value, u32 size) +{ + rm_bulk_reg_read(rdev, RM_PCI_SHMEM_BAR_OFF + offset, value, size); +} + +static inline void rm_shmem_bulk_write(struct rm_device *rdev, u32 offset, + const void *value, u32 size) +{ + rm_bulk_reg_write(rdev, RM_PCI_SHMEM_BAR_OFF + offset, value, size); +} + +void rm_queue_destroy_cmd(struct rm_cmd *cmd) +{ + ida_free(&rm_cmd_ids, cmd->sq_msg.hdr.id); + kfree(cmd); +} + +static int rm_queue_copy_response(struct rm_cmd *cmd, void *buffer, ssize_= t len) +{ + struct rm_cmd_cq_log_page *result =3D &cmd->cq_msg.data.page; + u64 off =3D cmd->sq_msg.data.page.address; + + if (!result->len || len < result->len) { + vdev_err(cmd->rdev->vdev, "Invalid response or buffer size"); + return -EINVAL; + } + + rm_shmem_bulk_read(cmd->rdev, off, (u32 *)buffer, result->len); + return 0; +} + +static void rm_queue_payload_fini(struct rm_cmd *cmd) +{ + up(&cmd->rdev->cq.data_lock); +} + +static int rm_queue_payload_init(struct rm_cmd *cmd, + enum rm_cmd_log_page_type type) +{ + struct rm_device *rdev =3D cmd->rdev; + int ret; + + ret =3D down_interruptible(&rdev->cq.data_lock); + if (ret) + return ret; + + cmd->sq_msg.data.page.address =3D rdev->cq.data_offset; + cmd->sq_msg.data.page.size =3D rdev->cq.data_size; + cmd->sq_msg.data.page.reserved1 =3D 0; + cmd->sq_msg.data.page.type =3D FIELD_PREP(RM_CMD_LOG_PAGE_TYPE_MASK, + type); + return 0; +} + +void rm_queue_data_fini(struct rm_cmd *cmd) +{ + up(&cmd->rdev->sq.data_lock); +} + +int rm_queue_data_init(struct rm_cmd *cmd, const char *buffer, ssize_t siz= e) +{ + struct rm_device *rdev =3D cmd->rdev; + int ret; + + if (!size || size > rdev->sq.data_size) { + vdev_err(rdev->vdev, "Unsupported file size"); + return -ENOMEM; + } + + ret =3D down_interruptible(&rdev->sq.data_lock); + if (ret) + return ret; + + rm_shmem_bulk_write(cmd->rdev, rdev->sq.data_offset, buffer, size); + + cmd->sq_msg.data.bin.address =3D rdev->sq.data_offset; + cmd->sq_msg.data.bin.size =3D size; + return 0; +} + +int rm_queue_create_cmd(struct rm_device *rdev, enum rm_queue_opcode opcod= e, + struct rm_cmd **cmd_ptr) +{ + struct rm_cmd *cmd =3D NULL; + int ret, id; + u16 size; + + if (rdev->firewall_tripped) + return -ENODEV; + + cmd =3D kzalloc(sizeof(*cmd), GFP_KERNEL); + if (!cmd) + return -ENOMEM; + cmd->rdev =3D rdev; + + switch (opcode) { + case RM_QUEUE_OP_LOAD_XCLBIN: + fallthrough; + case RM_QUEUE_OP_LOAD_FW: + fallthrough; + case RM_QUEUE_OP_LOAD_APU_FW: + size =3D sizeof(struct rm_cmd_sq_bin); + break; + case RM_QUEUE_OP_GET_LOG_PAGE: + size =3D sizeof(struct rm_cmd_sq_log_page); + break; + case RM_QUEUE_OP_IDENTIFY: + size =3D 0; + break; + case RM_QUEUE_OP_VMR_CONTROL: + size =3D sizeof(struct rm_cmd_sq_ctrl); + break; + default: + vdev_err(rdev->vdev, "Invalid cmd opcode %d", opcode); + ret =3D -EINVAL; + goto error; + } + + cmd->opcode =3D opcode; + cmd->sq_msg.hdr.opcode =3D FIELD_PREP(RM_CMD_SQ_HDR_OPS_MSK, opcode); + cmd->sq_msg.hdr.msg_size =3D FIELD_PREP(RM_CMD_SQ_HDR_SIZE_MSK, size); + + id =3D ida_alloc_range(&rm_cmd_ids, RM_CMD_ID_MIN, RM_CMD_ID_MAX, GFP_KER= NEL); + if (id < 0) { + vdev_err(rdev->vdev, "Failed to alloc cmd ID: %d", id); + ret =3D id; + goto error; + } + cmd->sq_msg.hdr.id =3D id; + + init_completion(&cmd->executed); + + *cmd_ptr =3D cmd; + return 0; +error: + kfree(cmd); + return ret; +} + +static int rm_queue_verify(struct rm_device *rdev) +{ + struct versal_pci_device *vdev =3D rdev->vdev; + struct rm_cmd_cq_identify *result; + struct rm_cmd *cmd; + u32 major, minor; + int ret; + + ret =3D rm_queue_create_cmd(rdev, RM_QUEUE_OP_IDENTIFY, &cmd); + if (ret) + return ret; + + ret =3D rm_queue_send_cmd(cmd, RM_CMD_WAIT_CONFIG_TIMEOUT); + if (ret) + goto error; + + result =3D &cmd->cq_msg.data.identify; + major =3D result->major; + minor =3D result->minor; + vdev_dbg(vdev, "VMR version %d.%d", major, minor); + if (!major) { + vdev_err(vdev, "VMR version is unsupported"); + ret =3D -EOPNOTSUPP; + } + +error: + rm_queue_destroy_cmd(cmd); + return ret; +} + +static int rm_check_apu_status(struct rm_device *rdev, bool *status) +{ + struct rm_cmd_cq_control *result; + struct rm_cmd *cmd; + int ret; + + ret =3D rm_queue_create_cmd(rdev, RM_QUEUE_OP_VMR_CONTROL, &cmd); + if (ret) + return ret; + + ret =3D rm_queue_send_cmd(cmd, RM_CMD_WAIT_CONFIG_TIMEOUT); + if (ret) + goto error; + + result =3D &cmd->cq_msg.data.ctrl; + *status =3D FIELD_GET(RM_CMD_VMR_CONTROL_PS_MASK, result->status); + + rm_queue_destroy_cmd(cmd); + return 0; + +error: + rm_queue_destroy_cmd(cmd); + return ret; +} + +static int rm_download_apu_fw(struct rm_device *rdev, char *data, ssize_t = size) +{ + struct rm_cmd *cmd; + int ret; + + ret =3D rm_queue_create_cmd(rdev, RM_QUEUE_OP_LOAD_APU_FW, &cmd); + if (ret) + return ret; + + ret =3D rm_queue_data_init(cmd, data, size); + if (ret) + goto destroy_cmd; + + ret =3D rm_queue_send_cmd(cmd, RM_CMD_WAIT_DOWNLOAD_TIMEOUT); + +destroy_cmd: + rm_queue_destroy_cmd(cmd); + return ret; +} + +int rm_queue_boot_apu(struct rm_device *rdev) +{ + char *bin =3D "xilinx/xrt-versal-apu.xsabin"; + const struct firmware *fw =3D NULL; + bool status; + int ret; + + ret =3D rm_check_apu_status(rdev, &status); + if (ret) { + vdev_err(rdev->vdev, "Failed to get APU status"); + return ret; + } + + if (status) { + vdev_dbg(rdev->vdev, "APU online. Skipping APU firmware download"); + return 0; + } + + ret =3D request_firmware(&fw, bin, &rdev->vdev->pdev->dev); + if (ret) { + vdev_warn(rdev->vdev, "Request APU firmware %s failed %d", bin, ret); + return ret; + } + + vdev_dbg(rdev->vdev, "Starting... APU firmware download"); + ret =3D rm_download_apu_fw(rdev, (char *)fw->data, fw->size); + vdev_dbg(rdev->vdev, "Finished... APU firmware download %d", ret); + + if (ret) + vdev_err(rdev->vdev, "Failed to download APU firmware, ret:%d", ret); + + release_firmware(fw); + + return ret; +} + +static void rm_check_health(struct work_struct *w) +{ + struct rm_device *rdev =3D to_rdev_health_monitor(w); + u32 max_len =3D PAGE_SIZE; + struct rm_cmd *cmd; + int ret; + + ret =3D rm_queue_create_cmd(rdev, RM_QUEUE_OP_GET_LOG_PAGE, &cmd); + if (ret) + return; + + ret =3D rm_queue_payload_init(cmd, RM_CMD_LOG_PAGE_AXI_TRIP_STATUS); + if (ret) + goto destroy_cmd; + + ret =3D rm_queue_send_cmd(cmd, RM_CMD_WAIT_CONFIG_TIMEOUT); + if (ret =3D=3D -ETIME || ret =3D=3D -EINVAL) + goto payload_fini; + + if (ret) { + u32 log_len =3D cmd->cq_msg.data.page.len; + + if (log_len > max_len) { + vdev_warn(rdev->vdev, "msg size %d is greater than requested %d", + log_len, max_len); + log_len =3D max_len; + } + + if (log_len) { + char *buffer =3D vzalloc(log_len); + + if (!buffer) + goto payload_fini; + + ret =3D rm_queue_copy_response(cmd, buffer, log_len); + if (ret) { + vfree(buffer); + goto payload_fini; + } + + vdev_err(rdev->vdev, "%s", buffer); + vfree(buffer); + + } else { + vdev_err(rdev->vdev, "firewall check ret%d", ret); + } + + rdev->firewall_tripped =3D 1; + } + +payload_fini: + rm_queue_payload_fini(cmd); +destroy_cmd: + rm_queue_destroy_cmd(cmd); + + vdev_dbg(rdev->vdev, "check result: %d", ret); +} + +static void rm_sched_health_check(struct timer_list *t) +{ + struct rm_device *rdev =3D to_rdev_health_timer(t); + + if (rdev->firewall_tripped) { + vdev_err(rdev->vdev, "Firewall tripped, health check paused. Please rese= t card"); + return; + } + /* Schedule a work in the general workqueue */ + schedule_work(&rdev->health_monitor); + /* Periodic timer */ + mod_timer(&rdev->health_timer, jiffies + RM_HEALTH_CHECK_TIMER); +} + +static void rm_uninstall_health_monitor(struct rm_device *rdev) +{ + timer_delete_sync(&rdev->health_timer); + cancel_work_sync(&rdev->health_monitor); +} + +static void rm_install_health_monitor(struct rm_device *rdev) +{ + INIT_WORK(&rdev->health_monitor, &rm_check_health); + timer_setup(&rdev->health_timer, &rm_sched_health_check, 0); + mod_timer(&rdev->health_timer, jiffies + RM_HEALTH_CHECK_TIMER); +} + +void versal_pci_rm_fini(struct rm_device *rdev) +{ + rm_uninstall_health_monitor(rdev); + rm_queue_fini(rdev); +} + +struct rm_device *versal_pci_rm_init(struct versal_pci_device *vdev) +{ + struct rm_header *header; + struct rm_device *rdev; + u32 status; + int ret; + + rdev =3D devm_kzalloc(&vdev->pdev->dev, sizeof(*rdev), GFP_KERNEL); + if (!rdev) + return ERR_PTR(-ENOMEM); + + rdev->vdev =3D vdev; + header =3D &rdev->rm_metadata; + + rm_shmem_bulk_read(rdev, RM_HDR_OFF, (u32 *)header, sizeof(*header)); + if (header->magic !=3D RM_HDR_MAGIC_NUM) { + vdev_err(vdev, "Invalid RM header 0x%x", header->magic); + ret =3D -ENODEV; + goto err; + } + + status =3D rm_shmem_read(rdev, header->status_off); + if (!status) { + vdev_err(vdev, "RM status %d is not ready", status); + ret =3D -ENODEV; + goto err; + } + + rdev->queue_buffer_size =3D header->data_end - header->data_start + 1; + rdev->queue_buffer_start =3D header->data_start; + rdev->queue_base =3D header->queue_base; + + ret =3D rm_queue_init(rdev); + if (ret) { + vdev_err(vdev, "Failed to init cmd queue, ret %d", ret); + ret =3D -ENODEV; + goto err; + } + + ret =3D rm_queue_verify(rdev); + if (ret) { + vdev_err(vdev, "Failed to verify cmd queue, ret %d", ret); + ret =3D -ENODEV; + goto queue_fini; + } + + ret =3D rm_queue_boot_apu(rdev); + if (ret) { + vdev_err(vdev, "Failed to bringup APU, ret %d", ret); + ret =3D -ENODEV; + goto queue_fini; + } + + rm_install_health_monitor(rdev); + + return rdev; +queue_fini: + rm_queue_fini(rdev); +err: + return ERR_PTR(ret); +} + +int rm_queue_get_fw_id(struct rm_device *rdev) +{ + struct rm_cmd *cmd; + int ret; + + ret =3D rm_queue_create_cmd(rdev, RM_QUEUE_OP_GET_LOG_PAGE, &cmd); + if (ret) + return ret; + + ret =3D rm_queue_payload_init(cmd, RM_CMD_LOG_PAGE_FW_ID); + if (ret) + goto destroy_cmd; + + ret =3D rm_queue_send_cmd(cmd, RM_CMD_WAIT_CONFIG_TIMEOUT); + if (ret) + goto payload_fini; + + ret =3D rm_queue_copy_response(cmd, rdev->vdev->fw_id, sizeof(rdev->vdev-= >fw_id)); + if (ret) + goto payload_fini; + + vdev_info(rdev->vdev, "fw_id %s", rdev->vdev->fw_id); + +payload_fini: + rm_queue_payload_fini(cmd); +destroy_cmd: + rm_queue_destroy_cmd(cmd); + + return ret; +} diff --git a/drivers/accel/amd_vpci/versal-pci-rm-service.h b/drivers/accel= /amd_vpci/versal-pci-rm-service.h index d2397a1a672c..57333bb1443c 100644 --- a/drivers/accel/amd_vpci/versal-pci-rm-service.h +++ b/drivers/accel/amd_vpci/versal-pci-rm-service.h @@ -206,4 +206,24 @@ struct rm_device { __u32 firewall_tripped; }; =20 +/* rm service init api */ +struct rm_device *versal_pci_rm_init(struct versal_pci_device *vdev); +void versal_pci_rm_fini(struct rm_device *rdev); + +/* rm services APIs */ +int rm_queue_create_cmd(struct rm_device *rdev, enum rm_queue_opcode opcod= e, + struct rm_cmd **cmd_ptr); +void rm_queue_destroy_cmd(struct rm_cmd *cmd); + +int rm_queue_data_init(struct rm_cmd *cmd, const char *buffer, ssize_t siz= e); +void rm_queue_data_fini(struct rm_cmd *cmd); +int rm_queue_get_fw_id(struct rm_device *rdev); +int rm_queue_boot_apu(struct rm_device *rdev); + +/* rm bar register operation APIs */ +u32 rm_reg_read(struct rm_device *rdev, u32 offset); +void rm_reg_write(struct rm_device *rdev, u32 offset, const u32 value); +void rm_bulk_reg_read(struct rm_device *rdev, u32 offset, u32 *value, size= _t size); +void rm_bulk_reg_write(struct rm_device *rdev, u32 offset, const void *val= ue, size_t size); + #endif /* __RM_SERVICE_H */ diff --git a/drivers/accel/amd_vpci/versal-pci.h b/drivers/accel/amd_vpci/v= ersal-pci.h index 33f0ef881a33..89f3590137ce 100644 --- a/drivers/accel/amd_vpci/versal-pci.h +++ b/drivers/accel/amd_vpci/versal-pci.h @@ -51,6 +51,7 @@ struct fw_info { struct versal_pci_device { struct pci_dev *pdev; =20 + struct rm_device *rdev; struct fw_info fw; =20 void __iomem *io_regs; --=20 2.34.1