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Sun, 09 Nov 2025 06:39:04 -0800 (PST) Received: from hu-spratap-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-341a68a68e6sm14845401a91.4.2025.11.09.06.38.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 09 Nov 2025 06:39:04 -0800 (PST) From: Shivendra Pratap Date: Sun, 09 Nov 2025 20:07:20 +0530 Subject: [PATCH v17 07/12] firmware: psci: Implement vendor-specific resets as reboot-mode Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251109-arm-psci-system_reset2-vendor-reboots-v17-7-46e085bca4cc@oss.qualcomm.com> References: <20251109-arm-psci-system_reset2-vendor-reboots-v17-0-46e085bca4cc@oss.qualcomm.com> In-Reply-To: <20251109-arm-psci-system_reset2-vendor-reboots-v17-0-46e085bca4cc@oss.qualcomm.com> To: Bartosz Golaszewski , Bjorn Andersson , Sebastian Reichel , Rob Herring , Sudeep Holla , Souvik Chakravarty , Krzysztof Kozlowski , Conor Dooley , Andy Yan , Mark Rutland , Lorenzo Pieralisi , Arnd Bergmann , Konrad Dybcio , cros-qcom-dts-watchers@chromium.org, Vinod Koul , Catalin Marinas , Will Deacon , Florian Fainelli , Moritz Fischer , John Stultz , Matthias Brugger , Krzysztof Kozlowski Cc: Dmitry Baryshkov , Mukesh Ojha , Stephen Boyd , Andre Draszik , Kathiravan Thirumoorthy , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Elliot Berman , Shivendra Pratap , Xin Liu , Srinivas Kandagatla , Umang Chheda , Nirmesh Kumar Singh X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1762699073; l=6623; i=shivendra.pratap@oss.qualcomm.com; s=20250710; h=from:subject:message-id; bh=gOqHkjWgXv2eEhKUz/L3I9ntPxQxM5L+0g6CBUJNCec=; b=gAySl5Mi53Gi7nfTHC/n9Cy9cFjThjpNi4Fl76P3IZkKi+5Z7ZEaKFx674fCUd4LmoI19chi8 GMsh0cHnyyTDm+EsnJOkw8XO1J1k3Z06hT0DJbRueMK1Sw/ND3+PFyc X-Developer-Key: i=shivendra.pratap@oss.qualcomm.com; a=ed25519; pk=CpsuL7yZ8NReDPhGgq6Xn/SRoa59mAvzWOW0QZoo4gw= X-Proofpoint-GUID: 4uid2RzprX1oo-4XKgxNDhBkjuREHj60 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTA5MDEyOSBTYWx0ZWRfX756ibELrBB5w 1MmbtSwkzOTGHeJsn7B23N30Ed29kYgjBXh+lJB4aFUhA4k8IJ2T7t93ehK5AUMYnQVTZ8pvAaI 4tDzC7/4r6pWogTScDive7mjd85SmFNeb0SlTB4bq0aM76v4PUuOBeEAauJmNkDJ2R5kTi719gy 5qEzMqfmzzzLLvav5rvKdahR4qMaNPHZveyKZEDw5t/9czL4+m2X3IcaEWQopmssTKMN0Bqj8Ia xkJnu5RRui/TSXdH4ixb5OUU7QNKlazJ77hrxDfiWtlN7sQxPXrUFC1333kx6t0qdax8IORXfp+ XxqvncxmxzS0hk4LAVjIs93qavuINL/Lu5bA5eSlSKNnVF083y7sUCi5b+FyrE7SwYYPt9B1ny7 hRZX5Pef/sZ9SHx/TvlJN2fskW46tg== X-Authority-Analysis: v=2.4 cv=LaoxKzfi c=1 sm=1 tr=0 ts=6910a78a cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=1Y-8vuCXXADn_sFn8ogA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 X-Proofpoint-ORIG-GUID: 4uid2RzprX1oo-4XKgxNDhBkjuREHj60 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-09_06,2025-11-06_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 lowpriorityscore=0 malwarescore=0 impostorscore=0 spamscore=0 adultscore=0 suspectscore=0 bulkscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511090129 SoC vendors have different types of resets which are controlled through various hardware registers. For instance, Qualcomm SoC may have a requirement that reboot with =E2=80=9Cbootloader=E2=80=9D command should reboot the device to bootloader flashing mode and reboot with =E2=80=9Cedl=E2=80=9D should reboot the device into Emergency flashing= mode. Setting up such reboots on Qualcomm devices can be inconsistent across SoC platforms and may require setting different HW registers, where some of these registers may not be accessible to HLOS. These knobs evolve over product generations and require more drivers. PSCI spec defines, SYSTEM_RESET2, vendor-specific reset which can help align this requirement. Add support for PSCI SYSTEM_RESET2, vendor-specific resets and align the implementation to allow user-space initiated reboots to trigger these resets. Implement the PSCI vendor-specific resets by registering to the reboot-mode framework. As psci init is done at early kernel init, reboot-mode registration cannot be done at the time of psci init. This is because reboot-mode creates a =E2=80=9Creboot-mode=E2=80=9D class f= or exposing sysfs, which can fail at early kernel init. To overcome this, introduce a late_initcall to register PSCI vendor-specific resets as reboot modes. Implement a reboot-mode write function that sets reset_type and cookie values during the reboot notifier callback. Introduce a firmware-based call for SYSTEM_RESET2 vendor-specific reset in the psci_sys_reset path, using reset_type and cookie if supported by secure firmware. Register a panic notifier and clear vendor_reset valid status during panic. This is needed for any kernel panic that occurs post reboot_notifiers. By using the above implementation, userspace will be able to issue such resets using the reboot() system call with the "*arg" parameter as a string based command. The commands can be defined in PSCI device tree node under =E2=80=9Creboot-mode=E2=80=9D and are based = on the reboot-mode based commands. Reviewed-by: Umang Chheda Reviewed-by: Kathiravan Thirumoorthy Reviewed-by: Nirmesh Kumar Singh Signed-off-by: Shivendra Pratap --- drivers/firmware/psci/Kconfig | 2 + drivers/firmware/psci/psci.c | 92 +++++++++++++++++++++++++++++++++++++++= +++- 2 files changed, 93 insertions(+), 1 deletion(-) diff --git a/drivers/firmware/psci/Kconfig b/drivers/firmware/psci/Kconfig index 97944168b5e66aea1e38a7eb2d4ced8348fce64b..93ff7b071a0c364a376699733e6= bc5654d56a17f 100644 --- a/drivers/firmware/psci/Kconfig +++ b/drivers/firmware/psci/Kconfig @@ -1,6 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-only config ARM_PSCI_FW bool + select POWER_RESET + select REBOOT_MODE =20 config ARM_PSCI_CHECKER bool "ARM PSCI checker" diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c index 38ca190d4a22d6e7e0f06420e8478a2b0ec2fe6f..ff82e7f4c27d1609a75cedc3a97= 90affaf839801 100644 --- a/drivers/firmware/psci/psci.c +++ b/drivers/firmware/psci/psci.c @@ -8,15 +8,18 @@ =20 #include #include +#include #include #include #include #include #include +#include #include #include #include #include +#include #include #include =20 @@ -51,6 +54,24 @@ static int resident_cpu =3D -1; struct psci_operations psci_ops; static enum arm_smccc_conduit psci_conduit =3D SMCCC_CONDUIT_NONE; =20 +struct psci_vendor_sysreset2 { + u32 reset_type; + u32 cookie; + bool valid; +}; + +static struct psci_vendor_sysreset2 vendor_reset; + +static int psci_panic_event(struct notifier_block *nb, unsigned long v, vo= id *p) +{ + vendor_reset.valid =3D false; + return NOTIFY_DONE; +} + +static struct notifier_block psci_panic_block =3D { + .notifier_call =3D psci_panic_event +}; + bool psci_tos_resident_on(int cpu) { return cpu =3D=3D resident_cpu; @@ -309,7 +330,10 @@ static int get_set_conduit_method(const struct device_= node *np) static int psci_sys_reset(struct notifier_block *nb, unsigned long action, void *data) { - if ((reboot_mode =3D=3D REBOOT_WARM || reboot_mode =3D=3D REBOOT_SOFT) && + if (vendor_reset.valid && psci_system_reset2_supported) { + invoke_psci_fn(PSCI_FN_NATIVE(1_1, SYSTEM_RESET2), vendor_reset.reset_ty= pe, + vendor_reset.cookie, 0); + } else if ((reboot_mode =3D=3D REBOOT_WARM || reboot_mode =3D=3D REBOOT_S= OFT) && psci_system_reset2_supported) { /* * reset_type[31] =3D 0 (architectural) @@ -547,6 +571,72 @@ static const struct platform_suspend_ops psci_suspend_= ops =3D { .enter =3D psci_system_suspend_enter, }; =20 +static int psci_set_vendor_sys_reset2(struct reboot_mode_driver *reboot, u= 64 magic) +{ + u32 magic_32; + + if (psci_system_reset2_supported) { + magic_32 =3D magic & GENMASK(31, 0); + vendor_reset.reset_type =3D PSCI_1_1_RESET_TYPE_VENDOR_START | magic_32; + vendor_reset.cookie =3D (magic >> 32) & GENMASK(31, 0); + vendor_reset.valid =3D true; + } + + return NOTIFY_DONE; +} + +static int __init psci_init_vendor_reset(void) +{ + struct reboot_mode_driver *reboot; + struct device_node *psci_np; + struct device_node *np; + int ret; + + if (!psci_system_reset2_supported) + return -EINVAL; + + psci_np =3D of_find_compatible_node(NULL, NULL, "arm,psci-1.0"); + if (!psci_np) + return -ENODEV; + + np =3D of_find_node_by_name(psci_np, "reboot-mode"); + if (!np) { + of_node_put(psci_np); + return -ENODEV; + } + + ret =3D atomic_notifier_chain_register(&panic_notifier_list, &psci_panic_= block); + if (ret) + goto err_notifier; + + reboot =3D kzalloc(sizeof(*reboot), GFP_KERNEL); + if (!reboot) { + ret =3D -ENOMEM; + goto err_kzalloc; + } + + reboot->write =3D psci_set_vendor_sys_reset2; + reboot->driver_name =3D "psci"; + + ret =3D reboot_mode_register(reboot, of_fwnode_handle(np)); + if (ret) + goto err_register; + + of_node_put(psci_np); + of_node_put(np); + return 0; + +err_register: + kfree(reboot); +err_kzalloc: + atomic_notifier_chain_unregister(&panic_notifier_list, &psci_panic_block); +err_notifier: + of_node_put(psci_np); + of_node_put(np); + return ret; +} +late_initcall(psci_init_vendor_reset) + static void __init psci_init_system_reset2(void) { int ret; --=20 2.34.1