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[2a02:3100:a9b3:6600:1e86:bff:fe2f:57b7]) by smtp.googlemail.com with ESMTPSA id 4fb4d7f45d1cf-6411f814164sm7642807a12.13.2025.11.08.15.13.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 08 Nov 2025 15:13:16 -0800 (PST) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, linux-mmc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, ulf.hansson@linaro.org, Martin Blumenstingl Subject: [PATCH v1 1/7] mmc: meson-mx-sdio: Switch to regmap for register access Date: Sun, 9 Nov 2025 00:12:47 +0100 Message-ID: <20251108231253.1641927-2-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.51.2 In-Reply-To: <20251108231253.1641927-1-martin.blumenstingl@googlemail.com> References: <20251108231253.1641927-1-martin.blumenstingl@googlemail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Switch the driver over to use regmap to access the registers. This makes it consistent with the other Amlogic MMC drivers. No functional changes intended. Signed-off-by: Martin Blumenstingl Reviewed-by: Neil Armstrong --- drivers/mmc/host/Kconfig | 1 + drivers/mmc/host/meson-mx-sdio.c | 125 ++++++++++++++++--------------- 2 files changed, 64 insertions(+), 62 deletions(-) diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index 2c963cb6724b..027ef2540913 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -504,6 +504,7 @@ config MMC_MESON_MX_SDIO depends on ARCH_MESON || COMPILE_TEST depends on COMMON_CLK depends on OF_ADDRESS + select REGMAP_MMIO help This selects support for the SD/MMC Host Controller on Amlogic Meson6, Meson8 and Meson8b SoCs. diff --git a/drivers/mmc/host/meson-mx-sdio.c b/drivers/mmc/host/meson-mx-s= dio.c index 8a49c32fd3f9..2448f21bd683 100644 --- a/drivers/mmc/host/meson-mx-sdio.c +++ b/drivers/mmc/host/meson-mx-sdio.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include =20 @@ -108,7 +109,7 @@ struct meson_mx_mmc_host { struct clk_fixed_factor fixed_factor; struct clk *fixed_factor_clk; =20 - void __iomem *base; + struct regmap *regmap; int irq; spinlock_t irq_lock; =20 @@ -122,22 +123,10 @@ struct meson_mx_mmc_host { int error; }; =20 -static void meson_mx_mmc_mask_bits(struct mmc_host *mmc, char reg, u32 mas= k, - u32 val) -{ - struct meson_mx_mmc_host *host =3D mmc_priv(mmc); - u32 regval; - - regval =3D readl(host->base + reg); - regval &=3D ~mask; - regval |=3D (val & mask); - - writel(regval, host->base + reg); -} - static void meson_mx_mmc_soft_reset(struct meson_mx_mmc_host *host) { - writel(MESON_MX_SDIO_IRQC_SOFT_RESET, host->base + MESON_MX_SDIO_IRQC); + regmap_write(host->regmap, MESON_MX_SDIO_IRQC, + MESON_MX_SDIO_IRQC_SOFT_RESET); udelay(2); } =20 @@ -158,7 +147,7 @@ static void meson_mx_mmc_start_cmd(struct mmc_host *mmc, struct meson_mx_mmc_host *host =3D mmc_priv(mmc); unsigned int pack_size; unsigned long irqflags, timeout; - u32 mult, send =3D 0, ext =3D 0; + u32 send =3D 0, ext =3D 0; =20 host->cmd =3D cmd; =20 @@ -215,25 +204,22 @@ static void meson_mx_mmc_start_cmd(struct mmc_host *m= mc, =20 spin_lock_irqsave(&host->irq_lock, irqflags); =20 - mult =3D readl(host->base + MESON_MX_SDIO_MULT); - mult &=3D ~MESON_MX_SDIO_MULT_PORT_SEL_MASK; - mult |=3D FIELD_PREP(MESON_MX_SDIO_MULT_PORT_SEL_MASK, host->slot_id); - mult |=3D BIT(31); - writel(mult, host->base + MESON_MX_SDIO_MULT); + regmap_update_bits(host->regmap, MESON_MX_SDIO_MULT, + MESON_MX_SDIO_MULT_PORT_SEL_MASK | BIT(31), + FIELD_PREP(MESON_MX_SDIO_MULT_PORT_SEL_MASK, + host->slot_id) | BIT(31)); =20 /* enable the CMD done interrupt */ - meson_mx_mmc_mask_bits(mmc, MESON_MX_SDIO_IRQC, - MESON_MX_SDIO_IRQC_ARC_CMD_INT_EN, - MESON_MX_SDIO_IRQC_ARC_CMD_INT_EN); + regmap_set_bits(host->regmap, MESON_MX_SDIO_IRQC, + MESON_MX_SDIO_IRQC_ARC_CMD_INT_EN); =20 /* clear pending interrupts */ - meson_mx_mmc_mask_bits(mmc, MESON_MX_SDIO_IRQS, - MESON_MX_SDIO_IRQS_CMD_INT, - MESON_MX_SDIO_IRQS_CMD_INT); + regmap_set_bits(host->regmap, MESON_MX_SDIO_IRQS, + MESON_MX_SDIO_IRQS_CMD_INT); =20 - writel(cmd->arg, host->base + MESON_MX_SDIO_ARGU); - writel(ext, host->base + MESON_MX_SDIO_EXT); - writel(send, host->base + MESON_MX_SDIO_SEND); + regmap_write(host->regmap, MESON_MX_SDIO_ARGU, cmd->arg); + regmap_write(host->regmap, MESON_MX_SDIO_EXT, ext); + regmap_write(host->regmap, MESON_MX_SDIO_SEND, send); =20 spin_unlock_irqrestore(&host->irq_lock, irqflags); =20 @@ -263,14 +249,13 @@ static void meson_mx_mmc_set_ios(struct mmc_host *mmc= , struct mmc_ios *ios) =20 switch (ios->bus_width) { case MMC_BUS_WIDTH_1: - meson_mx_mmc_mask_bits(mmc, MESON_MX_SDIO_CONF, - MESON_MX_SDIO_CONF_BUS_WIDTH, 0); + regmap_clear_bits(host->regmap, MESON_MX_SDIO_CONF, + MESON_MX_SDIO_CONF_BUS_WIDTH); break; =20 case MMC_BUS_WIDTH_4: - meson_mx_mmc_mask_bits(mmc, MESON_MX_SDIO_CONF, - MESON_MX_SDIO_CONF_BUS_WIDTH, - MESON_MX_SDIO_CONF_BUS_WIDTH); + regmap_set_bits(host->regmap, MESON_MX_SDIO_CONF, + MESON_MX_SDIO_CONF_BUS_WIDTH); break; =20 case MMC_BUS_WIDTH_8: @@ -351,8 +336,8 @@ static void meson_mx_mmc_request(struct mmc_host *mmc, = struct mmc_request *mrq) host->mrq =3D mrq; =20 if (mrq->data) - writel(sg_dma_address(mrq->data->sg), - host->base + MESON_MX_SDIO_ADDR); + regmap_write(host->regmap, MESON_MX_SDIO_ADDR, + sg_dma_address(mrq->data->sg)); =20 if (mrq->sbc) meson_mx_mmc_start_cmd(mmc, mrq->sbc); @@ -364,24 +349,26 @@ static void meson_mx_mmc_read_response(struct mmc_hos= t *mmc, struct mmc_command *cmd) { struct meson_mx_mmc_host *host =3D mmc_priv(mmc); - u32 mult; - int i, resp[4]; + unsigned int i, resp[4]; =20 - mult =3D readl(host->base + MESON_MX_SDIO_MULT); - mult |=3D MESON_MX_SDIO_MULT_WR_RD_OUT_INDEX; - mult &=3D ~MESON_MX_SDIO_MULT_RESP_READ_INDEX_MASK; - mult |=3D FIELD_PREP(MESON_MX_SDIO_MULT_RESP_READ_INDEX_MASK, 0); - writel(mult, host->base + MESON_MX_SDIO_MULT); + regmap_update_bits(host->regmap, MESON_MX_SDIO_MULT, + MESON_MX_SDIO_MULT_WR_RD_OUT_INDEX | + MESON_MX_SDIO_MULT_RESP_READ_INDEX_MASK, + MESON_MX_SDIO_MULT_WR_RD_OUT_INDEX | + FIELD_PREP(MESON_MX_SDIO_MULT_RESP_READ_INDEX_MASK, + 0)); =20 if (cmd->flags & MMC_RSP_136) { for (i =3D 0; i <=3D 3; i++) - resp[3 - i] =3D readl(host->base + MESON_MX_SDIO_ARGU); + regmap_read(host->regmap, MESON_MX_SDIO_ARGU, + &resp[3 - i]); + cmd->resp[0] =3D (resp[0] << 8) | ((resp[1] >> 24) & 0xff); cmd->resp[1] =3D (resp[1] << 8) | ((resp[2] >> 24) & 0xff); cmd->resp[2] =3D (resp[2] << 8) | ((resp[3] >> 24) & 0xff); cmd->resp[3] =3D (resp[3] << 8); } else if (cmd->flags & MMC_RSP_PRESENT) { - cmd->resp[0] =3D readl(host->base + MESON_MX_SDIO_ARGU); + regmap_read(host->regmap, MESON_MX_SDIO_ARGU, &cmd->resp[0]); } } =20 @@ -422,8 +409,8 @@ static irqreturn_t meson_mx_mmc_irq(int irq, void *data) =20 spin_lock(&host->irq_lock); =20 - irqs =3D readl(host->base + MESON_MX_SDIO_IRQS); - send =3D readl(host->base + MESON_MX_SDIO_SEND); + regmap_read(host->regmap, MESON_MX_SDIO_IRQS, &irqs); + regmap_read(host->regmap, MESON_MX_SDIO_SEND, &send); =20 if (irqs & MESON_MX_SDIO_IRQS_CMD_INT) ret =3D meson_mx_mmc_process_cmd_irq(host, irqs, send); @@ -431,7 +418,7 @@ static irqreturn_t meson_mx_mmc_irq(int irq, void *data) ret =3D IRQ_HANDLED; =20 /* finally ACK all pending interrupts */ - writel(irqs, host->base + MESON_MX_SDIO_IRQS); + regmap_write(host->regmap, MESON_MX_SDIO_IRQS, irqs); =20 spin_unlock(&host->irq_lock); =20 @@ -470,14 +457,13 @@ static void meson_mx_mmc_timeout(struct timer_list *t) struct meson_mx_mmc_host *host =3D timer_container_of(host, t, cmd_timeout); unsigned long irqflags; - u32 irqc; + u32 irqs, argu; =20 spin_lock_irqsave(&host->irq_lock, irqflags); =20 /* disable the CMD interrupt */ - irqc =3D readl(host->base + MESON_MX_SDIO_IRQC); - irqc &=3D ~MESON_MX_SDIO_IRQC_ARC_CMD_INT_EN; - writel(irqc, host->base + MESON_MX_SDIO_IRQC); + regmap_clear_bits(host->regmap, MESON_MX_SDIO_IRQC, + MESON_MX_SDIO_IRQC_ARC_CMD_INT_EN); =20 spin_unlock_irqrestore(&host->irq_lock, irqflags); =20 @@ -488,10 +474,12 @@ static void meson_mx_mmc_timeout(struct timer_list *t) if (!host->cmd) return; =20 + regmap_read(host->regmap, MESON_MX_SDIO_IRQS, &irqs); + regmap_read(host->regmap, MESON_MX_SDIO_ARGU, &argu); + dev_dbg(mmc_dev(host->mmc), "Timeout on CMD%u (IRQS =3D 0x%08x, ARGU =3D 0x%08x)\n", - host->cmd->opcode, readl(host->base + MESON_MX_SDIO_IRQS), - readl(host->base + MESON_MX_SDIO_ARGU)); + host->cmd->opcode, irqs, argu); =20 host->cmd->error =3D -ETIMEDOUT; =20 @@ -578,7 +566,8 @@ static int meson_mx_mmc_add_host(struct meson_mx_mmc_ho= st *host) return 0; } =20 -static int meson_mx_mmc_register_clks(struct meson_mx_mmc_host *host) +static int meson_mx_mmc_register_clks(struct meson_mx_mmc_host *host, + void __iomem *base) { struct clk_init_data init; const char *clk_div_parent, *clk_fixed_factor_parent; @@ -613,7 +602,7 @@ static int meson_mx_mmc_register_clks(struct meson_mx_m= mc_host *host) init.flags =3D CLK_SET_RATE_PARENT; init.parent_names =3D &clk_div_parent; init.num_parents =3D 1; - host->cfg_div.reg =3D host->base + MESON_MX_SDIO_CONF; + host->cfg_div.reg =3D base + MESON_MX_SDIO_CONF; host->cfg_div.shift =3D MESON_MX_SDIO_CONF_CMD_CLK_DIV_SHIFT; host->cfg_div.width =3D MESON_MX_SDIO_CONF_CMD_CLK_DIV_WIDTH; host->cfg_div.hw.init =3D &init; @@ -629,12 +618,23 @@ static int meson_mx_mmc_register_clks(struct meson_mx= _mmc_host *host) =20 static int meson_mx_mmc_probe(struct platform_device *pdev) { + const struct regmap_config meson_mx_sdio_regmap_config =3D { + .reg_bits =3D 8, + .val_bits =3D 32, + .reg_stride =3D 4, + .max_register =3D MESON_MX_SDIO_EXT, + }; struct platform_device *slot_pdev; struct mmc_host *mmc; struct meson_mx_mmc_host *host; + void __iomem *base; int ret, irq; u32 conf; =20 + base =3D devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(base)) + return PTR_ERR(base); + slot_pdev =3D meson_mx_mmc_slot_pdev(&pdev->dev); if (!slot_pdev) return -ENODEV; @@ -656,9 +656,10 @@ static int meson_mx_mmc_probe(struct platform_device *= pdev) =20 platform_set_drvdata(pdev, host); =20 - host->base =3D devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(host->base)) { - ret =3D PTR_ERR(host->base); + host->regmap =3D devm_regmap_init_mmio(&pdev->dev, base, + &meson_mx_sdio_regmap_config); + if (IS_ERR(host->regmap)) { + ret =3D PTR_ERR(host->regmap); goto error_free_mmc; } =20 @@ -687,7 +688,7 @@ static int meson_mx_mmc_probe(struct platform_device *p= dev) goto error_free_mmc; } =20 - ret =3D meson_mx_mmc_register_clks(host); + ret =3D meson_mx_mmc_register_clks(host, base); if (ret) goto error_free_mmc; =20 @@ -708,7 +709,7 @@ static int meson_mx_mmc_probe(struct platform_device *p= dev) conf |=3D FIELD_PREP(MESON_MX_SDIO_CONF_M_ENDIAN_MASK, 0x3); conf |=3D FIELD_PREP(MESON_MX_SDIO_CONF_WRITE_NWR_MASK, 0x2); conf |=3D FIELD_PREP(MESON_MX_SDIO_CONF_WRITE_CRC_OK_STATUS_MASK, 0x2); - writel(conf, host->base + MESON_MX_SDIO_CONF); + regmap_write(host->regmap, MESON_MX_SDIO_CONF, conf); =20 meson_mx_mmc_soft_reset(host); =20 --=20 2.51.2