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Sat, 8 Nov 2025 12:42:47 -0500 From: Antoniu Miclaus To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , CC: Antoniu Miclaus Subject: [PATCH v2 1/2] dt-bindings: gpio: adg1712: add adg1712 support Date: Sat, 8 Nov 2025 17:40:28 +0000 Message-ID: <20251108174055.3665-2-antoniu.miclaus@analog.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251108174055.3665-1-antoniu.miclaus@analog.com> References: <20251108174055.3665-1-antoniu.miclaus@analog.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-ORIG-GUID: up0sQhsK5ATwet5h0p1XnxqnlY2rxG0f X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTA4MDE0MyBTYWx0ZWRfX7QkU9Mnic1cE QtOSvLaElwy6YvayLYYI23OeITffcBej1rBrXhigbYrIdR9TtmK2eUWOsLw99BTBG5J6a+/Y8z2 eNhbr6Eoikj62bpOyncTUbYAgKXOE7yOD8L4YN/AZYRYcX2PPJSW28rEvQI5eKzUFiMb9mbAj1S Yf2/lOBsgWvndslcQ5KOfXV3LIFcXIE2gjqDm47BWNiNJCCTCEWzShCSR/e+GaCstyrqto7zilf Eqb6OnNjlHvFZsv0vWUU+fVT3UzlFoF7/nbyoGiflGRtASdgNMDAi+ieodm78pNE80/6i11Q575 qkzxHrSzvzaCDfG1SPdMR3kY7QwzjLEkYDzib2MXZIkllF+vjxGia+jnhQuDoiFxWcLlkRUJvXn v4QdEjCJC+2oF4wN03/4nKzKsH4iXQ== X-Authority-Analysis: v=2.4 cv=Ao/jHe9P c=1 sm=1 tr=0 ts=690f811d cx=c_pps a=3WNzaoukacrqR9RwcOSAdA==:117 a=3WNzaoukacrqR9RwcOSAdA==:17 a=6UeiqGixMTsA:10 a=VkNPw1HP01LnGYTKEx00:22 a=gEfo2CItAAAA:8 a=gAnH3GRIAAAA:8 a=rKaqALp09OgZ7UrXzpoA:9 a=sptkURWiP4Gy88Gu7hUp:22 a=cPQSjfK2_nFv0Q5t_7PE:22 X-Proofpoint-GUID: up0sQhsK5ATwet5h0p1XnxqnlY2rxG0f X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-08_05,2025-11-06_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 malwarescore=0 phishscore=0 lowpriorityscore=0 adultscore=0 bulkscore=0 suspectscore=0 spamscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511080143 Content-Type: text/plain; charset="utf-8" Add devicetree bindings for adg1712 SPST quad switch. Signed-off-by: Antoniu Miclaus --- Changes in v2: - Replace individual GPIO properties (switch1-gpios, switch2-gpios, etc.) with a single GPIO array property (switch-gpios) - Update required properties list accordingly - Simplify device tree example to use array notation --- .../devicetree/bindings/gpio/adi,adg1712.yaml | 65 +++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/adi,adg1712.yaml diff --git a/Documentation/devicetree/bindings/gpio/adi,adg1712.yaml b/Docu= mentation/devicetree/bindings/gpio/adi,adg1712.yaml new file mode 100644 index 000000000000..d6000a788d6e --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/adi,adg1712.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/adi,adg1712.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices ADG1712 quad SPST switch GPIO controller + +maintainers: + - Antoniu Miclaus + +description: | + Bindings for Analog Devices ADG1712 quad single-pole, single-throw (SPST) + switch controlled by GPIOs. The device features four independent switche= s, + each controlled by a dedicated GPIO input pin. + + Each GPIO line exposed by this controller corresponds to one of the four + switches (SW1-SW4) on the ADG1712. Setting a GPIO line high enables the + corresponding switch, while setting it low disables the switch. + +properties: + compatible: + const: adi,adg1712 + + switch-gpios: + description: | + Array of GPIOs connected to the IN1-IN4 control pins. + Index 0 corresponds to IN1 (controls SW1), + Index 1 corresponds to IN2 (controls SW2), + Index 2 corresponds to IN3 (controls SW3), + Index 3 corresponds to IN4 (controls SW4). + minItems: 4 + maxItems: 4 + + gpio-controller: true + + "#gpio-cells": + const: 2 + description: | + The first cell is the GPIO number (0-3 corresponding to SW1-SW4). + The second cell specifies GPIO flags. + +required: + - compatible + - switch-gpios + - gpio-controller + - "#gpio-cells" + +additionalProperties: false + +examples: + - | + #include + + adg1712: gpio-expander { + compatible =3D "adi,adg1712"; + gpio-controller; + #gpio-cells =3D <2>; + + switch-gpios =3D <&gpio 10 GPIO_ACTIVE_HIGH>, + <&gpio 11 GPIO_ACTIVE_HIGH>, + <&gpio 12 GPIO_ACTIVE_HIGH>, + <&gpio 13 GPIO_ACTIVE_HIGH>; + }; +... --=20 2.43.0