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([2600:1007:b0b8:8420:9895:3669:27c4:c1d6]) by smtp.gmail.com with ESMTPSA id 8926c6da1cb9f-5b74698d5bdsm2954694173.61.2025.11.08.02.28.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 08 Nov 2025 02:28:21 -0800 (PST) From: George Kelly To: Tony Lindgren , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-omap@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, George Kelly Subject: [PATCH] ARM: dts: ti/omap: fix incorrect compatible string in internal eeprom node Date: Sat, 8 Nov 2025 05:27:41 -0500 Message-ID: <20251108102741.47628-1-george.kelly1097@gmail.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" While the Beaglebone capes have the Atmel AT24C256 chip (256kbit or 32kB), the internal Beaglebone eeprom chip (i2c bus 0, addr 0x50), is an AT24C32 (32kbit or 4kB). Yet the device tree lists AT24C256 as the compatible chip prior to this patch. You can confirm this by running `sudo hexdump -C /sys/bus/nvmem/devices/0-00500/nvmem`. You can see the factory data is repeated every 0x1000 addresses (every 4096 bytes or 32768 bits). This is because the read command wraps around to reading 0x0000 when a user requests address 0x1000. This is not a huge issue for reading, but it is for writing to the EEPROM for two reasons: 1) If a user writes to addresses 0x1000 - 0x104e, they'll accidentally overwrite the factory data stored at 0x0000 - 0x104e. This also is an issue for writing to 0x2000 - 0x204e, and so on. 2) AT24C256 has 64-byte pages, but AT24C32 only has 32 byte pages. Thus, if you attempt to write more than 32 bytes, bytes 32-64 will wrap around. This causes your data in the actual EEPROM chip's bytes 0-32 to be overwritten by the data in your request's bytes 32-64, while the EEPROM chip's bytes 32-64 remain 0xFF (unwritten). Lastly, the Beaglebone Black's user manual does correctly mention that the internal EEPROM is 4kB (while capes are 32kB or 256kbit). It's just this bit of code that does not match. Signed-off-by: George Kelly --- arch/arm/boot/dts/ti/omap/am335x-bone-common.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/ti/omap/am335x-bone-common.dtsi b/arch/arm/b= oot/dts/ti/omap/am335x-bone-common.dtsi index ad1e60a9b6fde..73a571c135f81 100644 --- a/arch/arm/boot/dts/ti/omap/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/ti/omap/am335x-bone-common.dtsi @@ -217,7 +217,7 @@ tps: pmic@24 { }; baseboard_eeprom: eeprom@50 { - compatible =3D "atmel,24c256"; + compatible =3D "atmel,24c32"; reg =3D <0x50>; vcc-supply =3D <&ldo4_reg>; -- 2.43.0