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[2.205.18.238]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6411f713970sm3633299a12.8.2025.11.07.00.08.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 07 Nov 2025 00:08:06 -0800 (PST) From: Jonas Gorski To: Florian Fainelli , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 7/8] net: dsa: b53: add support for 5389/5397/5398 ARL entry format Date: Fri, 7 Nov 2025 09:07:48 +0100 Message-ID: <20251107080749.26936-8-jonas.gorski@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251107080749.26936-1-jonas.gorski@gmail.com> References: <20251107080749.26936-1-jonas.gorski@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" BCM5389, BCM5397 and BCM5398 use a different ARL entry format with just a 16 bit fwdentry register, as well as different search control and data offsets. So add appropriate ops for them and switch those chips to use them. Signed-off-by: Jonas Gorski Reviewed-by: Florian Fainelli --- drivers/net/dsa/b53/b53_common.c | 53 ++++++++++++++++++++++++++++++-- drivers/net/dsa/b53/b53_priv.h | 26 ++++++++++++++++ drivers/net/dsa/b53/b53_regs.h | 13 ++++++++ 3 files changed, 89 insertions(+), 3 deletions(-) diff --git a/drivers/net/dsa/b53/b53_common.c b/drivers/net/dsa/b53/b53_com= mon.c index c69022cc85bf..73ea9adb95b7 100644 --- a/drivers/net/dsa/b53/b53_common.c +++ b/drivers/net/dsa/b53/b53_common.c @@ -1870,6 +1870,31 @@ static void b53_arl_write_entry_25(struct b53_device= *dev, mac_vid); } =20 +static void b53_arl_read_entry_89(struct b53_device *dev, + struct b53_arl_entry *ent, u8 idx) +{ + u64 mac_vid; + u16 fwd_entry; + + b53_read64(dev, B53_ARLIO_PAGE, B53_ARLTBL_MAC_VID_ENTRY(idx), + &mac_vid); + b53_read16(dev, B53_ARLIO_PAGE, B53_ARLTBL_DATA_ENTRY(idx), &fwd_entry); + b53_arl_to_entry_89(ent, mac_vid, fwd_entry); +} + +static void b53_arl_write_entry_89(struct b53_device *dev, + const struct b53_arl_entry *ent, u8 idx) +{ + u32 fwd_entry; + u64 mac_vid; + + b53_arl_from_entry_89(&mac_vid, &fwd_entry, ent); + b53_write64(dev, B53_ARLIO_PAGE, + B53_ARLTBL_MAC_VID_ENTRY(idx), mac_vid); + b53_write16(dev, B53_ARLIO_PAGE, + B53_ARLTBL_DATA_ENTRY(idx), fwd_entry); +} + static void b53_arl_read_entry_95(struct b53_device *dev, struct b53_arl_entry *ent, u8 idx) { @@ -2033,6 +2058,8 @@ static void b53_read_arl_srch_ctl(struct b53_device *= dev, u8 *val) =20 if (is5325(dev) || is5365(dev)) offset =3D B53_ARL_SRCH_CTL_25; + else if (dev->chip_id =3D=3D BCM5389_DEVICE_ID || is5397_98(dev)) + offset =3D B53_ARL_SRCH_CTL_89; else offset =3D B53_ARL_SRCH_CTL; =20 @@ -2045,6 +2072,8 @@ static void b53_write_arl_srch_ctl(struct b53_device = *dev, u8 val) =20 if (is5325(dev) || is5365(dev)) offset =3D B53_ARL_SRCH_CTL_25; + else if (dev->chip_id =3D=3D BCM5389_DEVICE_ID || is5397_98(dev)) + offset =3D B53_ARL_SRCH_CTL_89; else offset =3D B53_ARL_SRCH_CTL; =20 @@ -2090,6 +2119,18 @@ static void b53_arl_search_read_65(struct b53_device= *dev, u8 idx, b53_arl_to_entry_25(ent, mac_vid); } =20 +static void b53_arl_search_read_89(struct b53_device *dev, u8 idx, + struct b53_arl_entry *ent) +{ + u16 fwd_entry; + u64 mac_vid; + + b53_read64(dev, B53_ARLIO_PAGE, B53_ARL_SRCH_RSLT_MACVID_89, + &mac_vid); + b53_read16(dev, B53_ARLIO_PAGE, B53_ARL_SRCH_RSLT_89, &fwd_entry); + b53_arl_to_entry_89(ent, mac_vid, fwd_entry); +} + static void b53_arl_search_read_95(struct b53_device *dev, u8 idx, struct b53_arl_entry *ent) { @@ -2683,6 +2724,12 @@ static const struct b53_arl_ops b53_arl_ops_65 =3D { .arl_search_read =3D b53_arl_search_read_65, }; =20 +static const struct b53_arl_ops b53_arl_ops_89 =3D { + .arl_read_entry =3D b53_arl_read_entry_89, + .arl_write_entry =3D b53_arl_write_entry_89, + .arl_search_read =3D b53_arl_search_read_89, +}; + static const struct b53_arl_ops b53_arl_ops_95 =3D { .arl_read_entry =3D b53_arl_read_entry_95, .arl_write_entry =3D b53_arl_write_entry_95, @@ -2747,7 +2794,7 @@ static const struct b53_chip_data b53_switch_chips[] = =3D { .duplex_reg =3D B53_DUPLEX_STAT_GE, .jumbo_pm_reg =3D B53_JUMBO_PORT_MASK, .jumbo_size_reg =3D B53_JUMBO_MAX_SIZE, - .arl_ops =3D &b53_arl_ops_95, + .arl_ops =3D &b53_arl_ops_89, }, { .chip_id =3D BCM5395_DEVICE_ID, @@ -2775,7 +2822,7 @@ static const struct b53_chip_data b53_switch_chips[] = =3D { .duplex_reg =3D B53_DUPLEX_STAT_GE, .jumbo_pm_reg =3D B53_JUMBO_PORT_MASK, .jumbo_size_reg =3D B53_JUMBO_MAX_SIZE, - .arl_ops =3D &b53_arl_ops_95, + .arl_ops =3D &b53_arl_ops_89, }, { .chip_id =3D BCM5398_DEVICE_ID, @@ -2789,7 +2836,7 @@ static const struct b53_chip_data b53_switch_chips[] = =3D { .duplex_reg =3D B53_DUPLEX_STAT_GE, .jumbo_pm_reg =3D B53_JUMBO_PORT_MASK, .jumbo_size_reg =3D B53_JUMBO_MAX_SIZE, - .arl_ops =3D &b53_arl_ops_95, + .arl_ops =3D &b53_arl_ops_89, }, { .chip_id =3D BCM53101_DEVICE_ID, diff --git a/drivers/net/dsa/b53/b53_priv.h b/drivers/net/dsa/b53/b53_priv.h index ef2413509b5d..d6d25bb3945b 100644 --- a/drivers/net/dsa/b53/b53_priv.h +++ b/drivers/net/dsa/b53/b53_priv.h @@ -353,6 +353,18 @@ static inline void b53_arl_to_entry_25(struct b53_arl_= entry *ent, ent->vid =3D mac_vid >> ARLTBL_VID_S_65; } =20 +static inline void b53_arl_to_entry_89(struct b53_arl_entry *ent, + u64 mac_vid, u16 fwd_entry) +{ + memset(ent, 0, sizeof(*ent)); + ent->port =3D fwd_entry & ARLTBL_DATA_PORT_ID_MASK_89; + ent->is_valid =3D !!(fwd_entry & ARLTBL_VALID_89); + ent->is_age =3D !!(fwd_entry & ARLTBL_AGE_89); + ent->is_static =3D !!(fwd_entry & ARLTBL_STATIC_89); + u64_to_ether_addr(mac_vid, ent->mac); + ent->vid =3D mac_vid >> ARLTBL_VID_S; +} + static inline void b53_arl_from_entry(u64 *mac_vid, u32 *fwd_entry, const struct b53_arl_entry *ent) { @@ -383,6 +395,20 @@ static inline void b53_arl_from_entry_25(u64 *mac_vid, *mac_vid |=3D ARLTBL_AGE_25; } =20 +static inline void b53_arl_from_entry_89(u64 *mac_vid, u32 *fwd_entry, + const struct b53_arl_entry *ent) +{ + *mac_vid =3D ether_addr_to_u64(ent->mac); + *mac_vid |=3D (u64)(ent->vid & ARLTBL_VID_MASK) << ARLTBL_VID_S; + *fwd_entry =3D ent->port & ARLTBL_DATA_PORT_ID_MASK_89; + if (ent->is_valid) + *fwd_entry |=3D ARLTBL_VALID_89; + if (ent->is_static) + *fwd_entry |=3D ARLTBL_STATIC_89; + if (ent->is_age) + *fwd_entry |=3D ARLTBL_AGE_89; +} + static inline void b53_arl_read_entry(struct b53_device *dev, struct b53_arl_entry *ent, u8 idx) { diff --git a/drivers/net/dsa/b53/b53_regs.h b/drivers/net/dsa/b53/b53_regs.h index c36a3dfb2ee8..c303507d3034 100644 --- a/drivers/net/dsa/b53/b53_regs.h +++ b/drivers/net/dsa/b53/b53_regs.h @@ -346,12 +346,20 @@ #define ARLTBL_STATIC BIT(15) #define ARLTBL_VALID BIT(16) =20 +/* BCM5389 ARL Table Data Entry N Register format (16 bit) */ +#define ARLTBL_DATA_PORT_ID_MASK_89 GENMASK(8, 0) +#define ARLTBL_TC_MASK_89 GENMASK(12, 10) +#define ARLTBL_AGE_89 BIT(13) +#define ARLTBL_STATIC_89 BIT(14) +#define ARLTBL_VALID_89 BIT(15) + /* Maximum number of bin entries in the ARL for all switches */ #define B53_ARLTBL_MAX_BIN_ENTRIES 4 =20 /* ARL Search Control Register (8 bit) */ #define B53_ARL_SRCH_CTL 0x50 #define B53_ARL_SRCH_CTL_25 0x20 +#define B53_ARL_SRCH_CTL_89 0x30 #define ARL_SRCH_VLID BIT(0) #define ARL_SRCH_STDN BIT(7) =20 @@ -359,10 +367,12 @@ #define B53_ARL_SRCH_ADDR 0x51 #define B53_ARL_SRCH_ADDR_25 0x22 #define B53_ARL_SRCH_ADDR_65 0x24 +#define B53_ARL_SRCH_ADDR_89 0x31 #define ARL_ADDR_MASK GENMASK(14, 0) =20 /* ARL Search MAC/VID Result (64 bit) */ #define B53_ARL_SRCH_RSTL_0_MACVID 0x60 +#define B53_ARL_SRCH_RSLT_MACVID_89 0x33 =20 /* Single register search result on 5325 */ #define B53_ARL_SRCH_RSTL_0_MACVID_25 0x24 @@ -372,6 +382,9 @@ /* ARL Search Data Result (32 bit) */ #define B53_ARL_SRCH_RSTL_0 0x68 =20 +/* BCM5389 ARL Search Data Result (16 bit) */ +#define B53_ARL_SRCH_RSLT_89 0x3b + #define B53_ARL_SRCH_RSTL_MACVID(x) (B53_ARL_SRCH_RSTL_0_MACVID + ((x) * 0= x10)) #define B53_ARL_SRCH_RSTL(x) (B53_ARL_SRCH_RSTL_0 + ((x) * 0x10)) =20 --=20 2.43.0