From nobody Fri Dec 19 19:07:43 2025 Received: from out-170.mta0.migadu.com (out-170.mta0.migadu.com [91.218.175.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 810C4242D84 for ; Fri, 7 Nov 2025 06:34:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.170 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762497248; cv=none; b=ajHcAiCTCNHAClw9On+hm7m50Edl+t4IP+Ao/zD3u8IKvlub5FXX2yf5JAV5Qa9/sQvnK/wfCdU9X2MHfXaaKQHNYyd0EEE+ZIide7zJG1FAkwQImMM8/1m7No1+2gDIrsKv7+IIH3v8YB0Ho02GDJzjbzria7Ow6SRHV5jWSEE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762497248; c=relaxed/simple; bh=KBjlpyefpfDjzjvcp2b0XsuLHdk2q32I+eBMxeTlbq4=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=B/su/TS7Ur/rZ0fRf5njjiATFBOgX0vw07BfOucAHEKXckjVIszTduWGvUenL/+3x9jtgTeDeas0zV1nqbR6cbT1XfpuLVr5mrxAKNAp8GREPRwgDkwxdb6zL1/Eux+JJdccCtC/4Xn389gtPc/lmmHAcLmV1dte6vAAZHj8z1Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=bQdP75aO; arc=none smtp.client-ip=91.218.175.170 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="bQdP75aO" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1762497239; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=w3G6GlUab3e6f4TFCVq8d6T8r0SZ5EJKyXqe5fy/Vgs=; b=bQdP75aOsgI+a8SNUTYqvrM/S6ozyeWpzoROrsCt86/JAAI6P0ZpOjenj8PUGIa6fHQzti VYCX4YIIYn2BaI712sSz0xGTd5GPiYONfZYzyot57wwYYuF0TRjvB9Nv0+8Tp/PMDAsD3I /lHUg867cYMAC56u4oi3TvTFdAf9Id4= From: Enlin Mu To: mani@kernel.org, daniel.lezcano@linaro.org, tglx@linutronix.de, linux-arm-kernel@lists.infradead.org, linux-unisoc@lists.infradead.org, linux-kernel@vger.kernel.org, enlin.mu@unisoc.com, enlin.mu@linux.dev Subject: [PATCH V2] clocksource/drivers/rda: Add sched_clock_register for RDA8810PL SoC Date: Fri, 7 Nov 2025 14:33:47 +0800 Message-Id: <20251107063347.3692-1-enlin.mu@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" From: Enlin Mu The current system log timestamp accuracy is tick, which can not meet the usage requirements and needs to reach nanoseconds. Therefore, the sched_clock_register funciton needs to be add. Signed-off-by: Enlin Mu --- drivers/clocksource/timer-rda.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/clocksource/timer-rda.c b/drivers/clocksource/timer-rd= a.c index fd1199c189bf..0be8e05970e2 100644 --- a/drivers/clocksource/timer-rda.c +++ b/drivers/clocksource/timer-rda.c @@ -13,6 +13,7 @@ =20 #include #include +#include =20 #include "timer-of.h" =20 @@ -153,7 +154,7 @@ static struct timer_of rda_ostimer_of =3D { }, }; =20 -static u64 rda_hwtimer_read(struct clocksource *cs) +static u64 rda_hwtimer_clocksource_read(void) { void __iomem *base =3D timer_of_base(&rda_ostimer_of); u32 lo, hi; @@ -167,6 +168,11 @@ static u64 rda_hwtimer_read(struct clocksource *cs) return ((u64)hi << 32) | lo; } =20 +static u64 rda_hwtimer_read(struct clocksource *cs) +{ + return rda_hwtimer_clocksource_read(); +} + static struct clocksource rda_hwtimer_clocksource =3D { .name =3D "rda-timer", .rating =3D 400, @@ -185,6 +191,7 @@ static int __init rda_timer_init(struct device_node *np) return ret; =20 clocksource_register_hz(&rda_hwtimer_clocksource, rate); + sched_clock_register(rda_hwtimer_clocksource_read, 64, rate); =20 clockevents_config_and_register(&rda_ostimer_of.clkevt, rate, 0x2, UINT_MAX); --=20 2.39.5